2021-03-31 17:52:26 +00:00
|
|
|
#include "cc1101.h"
|
|
|
|
#include <cmsis_os2.h>
|
2021-08-08 18:03:25 +00:00
|
|
|
#include <furi-hal-delay.h>
|
2021-03-31 17:52:26 +00:00
|
|
|
#include <assert.h>
|
|
|
|
#include <string.h>
|
|
|
|
|
2021-11-30 12:09:43 +00:00
|
|
|
CC1101Status cc1101_strobe(FuriHalSpiBusHandle* handle, uint8_t strobe) {
|
2021-03-31 17:52:26 +00:00
|
|
|
uint8_t tx[1] = { strobe };
|
|
|
|
CC1101Status rx[1] = { 0 };
|
|
|
|
|
2021-11-30 12:09:43 +00:00
|
|
|
while(hal_gpio_read(handle->miso));
|
|
|
|
furi_hal_spi_bus_trx(handle, tx, (uint8_t*)rx, 1, CC1101_TIMEOUT);
|
2021-03-31 17:52:26 +00:00
|
|
|
|
|
|
|
assert(rx[0].CHIP_RDYn == 0);
|
|
|
|
return rx[0];
|
|
|
|
}
|
|
|
|
|
2021-11-30 12:09:43 +00:00
|
|
|
CC1101Status cc1101_write_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t data) {
|
2021-03-31 17:52:26 +00:00
|
|
|
uint8_t tx[2] = { reg, data };
|
|
|
|
CC1101Status rx[2] = { 0 };
|
|
|
|
|
2021-11-30 12:09:43 +00:00
|
|
|
while(hal_gpio_read(handle->miso));
|
|
|
|
furi_hal_spi_bus_trx(handle, tx, (uint8_t*)rx, 2, CC1101_TIMEOUT);
|
2021-03-31 17:52:26 +00:00
|
|
|
|
2021-12-01 15:44:39 +00:00
|
|
|
assert((rx[0].CHIP_RDYn | rx[1].CHIP_RDYn) == 0);
|
2021-03-31 17:52:26 +00:00
|
|
|
return rx[1];
|
|
|
|
}
|
|
|
|
|
2021-11-30 12:09:43 +00:00
|
|
|
CC1101Status cc1101_read_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t* data) {
|
2021-03-31 17:52:26 +00:00
|
|
|
assert(sizeof(CC1101Status) == 1);
|
2021-12-01 15:44:39 +00:00
|
|
|
uint8_t tx[2] = {reg | CC1101_READ, 0};
|
|
|
|
CC1101Status rx[2] = {0};
|
2021-03-31 17:52:26 +00:00
|
|
|
|
2021-11-30 12:09:43 +00:00
|
|
|
while(hal_gpio_read(handle->miso));
|
|
|
|
furi_hal_spi_bus_trx(handle, tx, (uint8_t*)rx, 2, CC1101_TIMEOUT);
|
2021-03-31 17:52:26 +00:00
|
|
|
|
|
|
|
assert((rx[0].CHIP_RDYn) == 0);
|
|
|
|
*data = *(uint8_t*)&rx[1];
|
|
|
|
return rx[0];
|
|
|
|
}
|
|
|
|
|
2021-11-30 12:09:43 +00:00
|
|
|
uint8_t cc1101_get_partnumber(FuriHalSpiBusHandle* handle) {
|
2021-03-31 17:52:26 +00:00
|
|
|
uint8_t partnumber=0;
|
2021-11-30 12:09:43 +00:00
|
|
|
cc1101_read_reg(handle, CC1101_STATUS_PARTNUM|CC1101_BURST, &partnumber);
|
2021-03-31 17:52:26 +00:00
|
|
|
return partnumber;
|
|
|
|
}
|
|
|
|
|
2021-11-30 12:09:43 +00:00
|
|
|
uint8_t cc1101_get_version(FuriHalSpiBusHandle* handle) {
|
2021-03-31 17:52:26 +00:00
|
|
|
uint8_t version=0;
|
2021-11-30 12:09:43 +00:00
|
|
|
cc1101_read_reg(handle, CC1101_STATUS_VERSION|CC1101_BURST, &version);
|
2021-03-31 17:52:26 +00:00
|
|
|
return version;
|
|
|
|
}
|
|
|
|
|
2021-11-30 12:09:43 +00:00
|
|
|
uint8_t cc1101_get_rssi(FuriHalSpiBusHandle* handle) {
|
2021-03-31 17:52:26 +00:00
|
|
|
uint8_t rssi=0;
|
2021-11-30 12:09:43 +00:00
|
|
|
cc1101_read_reg(handle, CC1101_STATUS_RSSI|CC1101_BURST, &rssi);
|
2021-03-31 17:52:26 +00:00
|
|
|
return rssi;
|
|
|
|
}
|
|
|
|
|
2021-11-30 12:09:43 +00:00
|
|
|
void cc1101_reset(FuriHalSpiBusHandle* handle) {
|
|
|
|
cc1101_strobe(handle, CC1101_STROBE_SRES);
|
2021-03-31 17:52:26 +00:00
|
|
|
}
|
|
|
|
|
2021-11-30 12:09:43 +00:00
|
|
|
CC1101Status cc1101_get_status(FuriHalSpiBusHandle* handle) {
|
|
|
|
return cc1101_strobe(handle, CC1101_STROBE_SNOP);
|
2021-06-08 09:51:16 +00:00
|
|
|
}
|
|
|
|
|
2021-11-30 12:09:43 +00:00
|
|
|
void cc1101_shutdown(FuriHalSpiBusHandle* handle) {
|
|
|
|
cc1101_strobe(handle, CC1101_STROBE_SPWD);
|
2021-03-31 17:52:26 +00:00
|
|
|
}
|
|
|
|
|
2021-11-30 12:09:43 +00:00
|
|
|
void cc1101_calibrate(FuriHalSpiBusHandle* handle) {
|
|
|
|
cc1101_strobe(handle, CC1101_STROBE_SCAL);
|
2021-03-31 17:52:26 +00:00
|
|
|
}
|
|
|
|
|
2021-11-30 12:09:43 +00:00
|
|
|
void cc1101_switch_to_idle(FuriHalSpiBusHandle* handle) {
|
|
|
|
cc1101_strobe(handle, CC1101_STROBE_SIDLE);
|
2021-03-31 17:52:26 +00:00
|
|
|
}
|
|
|
|
|
2021-11-30 12:09:43 +00:00
|
|
|
void cc1101_switch_to_rx(FuriHalSpiBusHandle* handle) {
|
|
|
|
cc1101_strobe(handle, CC1101_STROBE_SRX);
|
2021-03-31 17:52:26 +00:00
|
|
|
}
|
|
|
|
|
2021-11-30 12:09:43 +00:00
|
|
|
void cc1101_switch_to_tx(FuriHalSpiBusHandle* handle) {
|
|
|
|
cc1101_strobe(handle, CC1101_STROBE_STX);
|
2021-03-31 17:52:26 +00:00
|
|
|
}
|
|
|
|
|
2021-11-30 12:09:43 +00:00
|
|
|
void cc1101_flush_rx(FuriHalSpiBusHandle* handle) {
|
|
|
|
cc1101_strobe(handle, CC1101_STROBE_SFRX);
|
2021-03-31 17:52:26 +00:00
|
|
|
}
|
|
|
|
|
2021-11-30 12:09:43 +00:00
|
|
|
void cc1101_flush_tx(FuriHalSpiBusHandle* handle) {
|
|
|
|
cc1101_strobe(handle, CC1101_STROBE_SFTX);
|
2021-03-31 17:52:26 +00:00
|
|
|
}
|
|
|
|
|
2021-11-30 12:09:43 +00:00
|
|
|
uint32_t cc1101_set_frequency(FuriHalSpiBusHandle* handle, uint32_t value) {
|
2021-06-29 21:19:20 +00:00
|
|
|
uint64_t real_value = (uint64_t)value * CC1101_FDIV / CC1101_QUARTZ;
|
2021-03-31 17:52:26 +00:00
|
|
|
|
|
|
|
// Sanity check
|
2021-06-29 21:19:20 +00:00
|
|
|
assert((real_value & CC1101_FMASK) == real_value);
|
2021-03-31 17:52:26 +00:00
|
|
|
|
2021-11-30 12:09:43 +00:00
|
|
|
cc1101_write_reg(handle, CC1101_FREQ2, (real_value >> 16) & 0xFF);
|
|
|
|
cc1101_write_reg(handle, CC1101_FREQ1, (real_value >> 8 ) & 0xFF);
|
|
|
|
cc1101_write_reg(handle, CC1101_FREQ0, (real_value >> 0 ) & 0xFF);
|
2021-03-31 17:52:26 +00:00
|
|
|
|
2021-06-29 21:19:20 +00:00
|
|
|
uint64_t real_frequency = real_value * CC1101_QUARTZ / CC1101_FDIV;
|
2021-03-31 17:52:26 +00:00
|
|
|
|
|
|
|
return (uint32_t)real_frequency;
|
|
|
|
}
|
|
|
|
|
2021-11-30 12:09:43 +00:00
|
|
|
uint32_t cc1101_set_intermediate_frequency(FuriHalSpiBusHandle* handle, uint32_t value) {
|
2021-06-29 21:19:20 +00:00
|
|
|
uint64_t real_value = value * CC1101_IFDIV / CC1101_QUARTZ;
|
2021-03-31 17:52:26 +00:00
|
|
|
assert((real_value & 0xFF) == real_value);
|
|
|
|
|
2021-11-30 12:09:43 +00:00
|
|
|
cc1101_write_reg(handle, CC1101_FSCTRL0, (real_value >> 0 ) & 0xFF);
|
2021-03-31 17:52:26 +00:00
|
|
|
|
2021-06-29 21:19:20 +00:00
|
|
|
uint64_t real_frequency = real_value * CC1101_QUARTZ / CC1101_IFDIV;
|
2021-03-31 17:52:26 +00:00
|
|
|
|
|
|
|
return (uint32_t)real_frequency;
|
|
|
|
}
|
|
|
|
|
2021-11-30 12:09:43 +00:00
|
|
|
void cc1101_set_pa_table(FuriHalSpiBusHandle* handle, const uint8_t value[8]) {
|
2021-03-31 17:52:26 +00:00
|
|
|
uint8_t tx[9] = { CC1101_PATABLE | CC1101_BURST };
|
|
|
|
CC1101Status rx[9] = { 0 };
|
|
|
|
|
|
|
|
memcpy(&tx[1], &value[0], 8);
|
|
|
|
|
2021-11-30 12:09:43 +00:00
|
|
|
while(hal_gpio_read(handle->miso));
|
|
|
|
furi_hal_spi_bus_trx(handle, tx, (uint8_t*)rx, sizeof(rx), CC1101_TIMEOUT);
|
2021-03-31 17:52:26 +00:00
|
|
|
|
2021-12-01 15:44:39 +00:00
|
|
|
assert((rx[0].CHIP_RDYn | rx[8].CHIP_RDYn) == 0);
|
2021-03-31 17:52:26 +00:00
|
|
|
}
|
|
|
|
|
2021-11-30 12:09:43 +00:00
|
|
|
uint8_t cc1101_write_fifo(FuriHalSpiBusHandle* handle, const uint8_t* data, uint8_t size) {
|
2021-06-08 09:51:16 +00:00
|
|
|
uint8_t buff_tx[64];
|
|
|
|
uint8_t buff_rx[64];
|
|
|
|
buff_tx[0] = CC1101_FIFO | CC1101_BURST;
|
|
|
|
memcpy(&buff_tx[1], data, size);
|
2021-03-31 17:52:26 +00:00
|
|
|
|
|
|
|
// Start transaction
|
|
|
|
// Wait IC to become ready
|
2021-11-30 12:09:43 +00:00
|
|
|
while(hal_gpio_read(handle->miso));
|
2021-03-31 17:52:26 +00:00
|
|
|
// Tell IC what we want
|
2021-11-30 12:09:43 +00:00
|
|
|
furi_hal_spi_bus_trx(handle, buff_tx, (uint8_t*) buff_rx, size + 1, CC1101_TIMEOUT);
|
2021-03-31 17:52:26 +00:00
|
|
|
|
|
|
|
return size;
|
|
|
|
}
|
|
|
|
|
2021-11-30 12:09:43 +00:00
|
|
|
uint8_t cc1101_read_fifo(FuriHalSpiBusHandle* handle, uint8_t* data, uint8_t* size) {
|
2021-06-08 09:51:16 +00:00
|
|
|
uint8_t buff_tx[64];
|
|
|
|
buff_tx[0] = CC1101_FIFO | CC1101_READ | CC1101_BURST;
|
|
|
|
uint8_t buff_rx[2];
|
|
|
|
|
|
|
|
// Start transaction
|
|
|
|
// Wait IC to become ready
|
2021-11-30 12:09:43 +00:00
|
|
|
while(hal_gpio_read(handle->miso));
|
2021-06-08 09:51:16 +00:00
|
|
|
|
|
|
|
// First byte - packet length
|
2021-11-30 12:09:43 +00:00
|
|
|
furi_hal_spi_bus_trx(handle, buff_tx, buff_rx, 2, CC1101_TIMEOUT);
|
2021-12-01 15:44:39 +00:00
|
|
|
|
|
|
|
// Check that the packet is placed in the receive buffer
|
|
|
|
if(buff_rx[1] > 64) {
|
|
|
|
*size = 64;
|
|
|
|
} else {
|
|
|
|
*size = buff_rx[1];
|
|
|
|
}
|
2021-11-30 12:09:43 +00:00
|
|
|
furi_hal_spi_bus_trx(handle, &buff_tx[1], data, *size, CC1101_TIMEOUT);
|
2021-06-08 09:51:16 +00:00
|
|
|
|
|
|
|
return *size;
|
2021-03-31 17:52:26 +00:00
|
|
|
}
|