2021-08-08 18:03:25 +00:00
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#include "furi-hal-spi.h"
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#include <furi-hal-resources.h>
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2021-05-18 09:23:14 +00:00
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#include <stdbool.h>
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#include <string.h>
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#include <spi.h>
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#include <furi.h>
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extern void Enable_SPI(SPI_HandleTypeDef* spi);
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2021-08-08 18:03:25 +00:00
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void furi_hal_spi_init() {
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2021-05-18 09:23:14 +00:00
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// Spi structure is const, but mutex is not
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// Need some hell-ish casting to make it work
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*(osMutexId_t*)spi_r.mutex = osMutexNew(NULL);
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*(osMutexId_t*)spi_d.mutex = osMutexNew(NULL);
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//
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2021-08-08 18:03:25 +00:00
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for (size_t i=0; i<FuriHalSpiDeviceIdMax; ++i) {
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hal_gpio_init(
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furi_hal_spi_devices[i].chip_select,
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GpioModeOutputPushPull,
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GpioPullNo,
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GpioSpeedVeryHigh
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);
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}
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2021-07-28 08:45:42 +00:00
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FURI_LOG_I("FuriHalSpi", "Init OK");
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}
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2021-08-08 18:03:25 +00:00
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void furi_hal_spi_bus_lock(const FuriHalSpiBus* bus) {
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furi_assert(bus);
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if (bus->mutex) {
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osMutexAcquire(*bus->mutex, osWaitForever);
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}
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}
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2021-08-08 18:03:25 +00:00
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void furi_hal_spi_bus_unlock(const FuriHalSpiBus* bus) {
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furi_assert(bus);
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if (bus->mutex) {
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osMutexRelease(*bus->mutex);
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}
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}
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2021-08-08 18:03:25 +00:00
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void furi_hal_spi_bus_configure(const FuriHalSpiBus* bus, const SPI_InitTypeDef* config) {
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2021-05-26 15:42:12 +00:00
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furi_assert(bus);
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if(memcmp(&bus->spi->Init, config, sizeof(SPI_InitTypeDef))) {
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memcpy((SPI_InitTypeDef*)&bus->spi->Init, config, sizeof(SPI_InitTypeDef));
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if(HAL_SPI_Init((SPI_HandleTypeDef*)bus->spi) != HAL_OK) {
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Error_Handler();
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}
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Enable_SPI((SPI_HandleTypeDef*)bus->spi);
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}
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}
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2021-08-08 18:03:25 +00:00
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void furi_hal_spi_bus_reset(const FuriHalSpiBus* bus) {
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2021-05-26 15:42:12 +00:00
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furi_assert(bus);
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HAL_SPI_DeInit((SPI_HandleTypeDef*)bus->spi);
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HAL_SPI_Init((SPI_HandleTypeDef*)bus->spi);
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Enable_SPI((SPI_HandleTypeDef*)bus->spi);
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}
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2021-08-08 18:03:25 +00:00
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bool furi_hal_spi_bus_rx(const FuriHalSpiBus* bus, uint8_t* buffer, size_t size, uint32_t timeout) {
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furi_assert(bus);
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furi_assert(buffer);
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furi_assert(size > 0);
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HAL_StatusTypeDef ret = HAL_SPI_Receive((SPI_HandleTypeDef *)bus->spi, buffer, size, HAL_MAX_DELAY);
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return ret == HAL_OK;
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}
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2021-08-08 18:03:25 +00:00
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bool furi_hal_spi_bus_tx(const FuriHalSpiBus* bus, uint8_t* buffer, size_t size, uint32_t timeout) {
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furi_assert(bus);
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furi_assert(buffer);
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furi_assert(size > 0);
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HAL_StatusTypeDef ret = HAL_SPI_Transmit((SPI_HandleTypeDef *)bus->spi, buffer, size, HAL_MAX_DELAY);
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return ret == HAL_OK;
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}
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2021-08-08 18:03:25 +00:00
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bool furi_hal_spi_bus_trx(const FuriHalSpiBus* bus, uint8_t* tx_buffer, uint8_t* rx_buffer, size_t size, uint32_t timeout) {
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furi_assert(bus);
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furi_assert(tx_buffer);
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furi_assert(rx_buffer);
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furi_assert(size > 0);
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HAL_StatusTypeDef ret = HAL_SPI_TransmitReceive((SPI_HandleTypeDef *)bus->spi, tx_buffer, rx_buffer, size, HAL_MAX_DELAY);
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return ret == HAL_OK;
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}
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2021-08-08 18:03:25 +00:00
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const FuriHalSpiDevice* furi_hal_spi_device_get(FuriHalSpiDeviceId device_id) {
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furi_assert(device_id < FuriHalSpiDeviceIdMax);
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const FuriHalSpiDevice* device = &furi_hal_spi_devices[device_id];
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assert(device);
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furi_hal_spi_bus_lock(device->bus);
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if (device->config) {
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memcpy((SPI_InitTypeDef*)&device->bus->spi->Init, device->config, sizeof(SPI_InitTypeDef));
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if(HAL_SPI_Init((SPI_HandleTypeDef *)device->bus->spi) != HAL_OK) {
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Error_Handler();
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}
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Enable_SPI((SPI_HandleTypeDef *)device->bus->spi);
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}
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return device;
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}
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2021-08-08 18:03:25 +00:00
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void furi_hal_spi_device_return(const FuriHalSpiDevice* device) {
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furi_hal_spi_bus_unlock(device->bus);
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}
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bool furi_hal_spi_device_rx(const FuriHalSpiDevice* device, uint8_t* buffer, size_t size, uint32_t timeout) {
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furi_assert(device);
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furi_assert(buffer);
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furi_assert(size > 0);
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if (device->chip_select) {
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hal_gpio_write(device->chip_select, false);
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}
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2021-08-08 18:03:25 +00:00
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bool ret = furi_hal_spi_bus_rx(device->bus, buffer, size, HAL_MAX_DELAY);
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2021-05-18 09:23:14 +00:00
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if (device->chip_select) {
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hal_gpio_write(device->chip_select, true);
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}
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return ret;
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}
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2021-08-08 18:03:25 +00:00
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bool furi_hal_spi_device_tx(const FuriHalSpiDevice* device, uint8_t* buffer, size_t size, uint32_t timeout) {
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2021-05-18 09:23:14 +00:00
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furi_assert(device);
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furi_assert(buffer);
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furi_assert(size > 0);
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if (device->chip_select) {
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hal_gpio_write(device->chip_select, false);
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}
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2021-08-08 18:03:25 +00:00
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bool ret = furi_hal_spi_bus_tx(device->bus, buffer, size, HAL_MAX_DELAY);
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if (device->chip_select) {
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hal_gpio_write(device->chip_select, true);
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}
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return ret;
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}
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2021-08-08 18:03:25 +00:00
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bool furi_hal_spi_device_trx(const FuriHalSpiDevice* device, uint8_t* tx_buffer, uint8_t* rx_buffer, size_t size, uint32_t timeout) {
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2021-05-18 09:23:14 +00:00
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furi_assert(device);
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furi_assert(tx_buffer);
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furi_assert(rx_buffer);
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furi_assert(size > 0);
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if (device->chip_select) {
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hal_gpio_write(device->chip_select, false);
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}
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2021-08-08 18:03:25 +00:00
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bool ret = furi_hal_spi_bus_trx(device->bus, tx_buffer, rx_buffer, size, HAL_MAX_DELAY);
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if (device->chip_select) {
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hal_gpio_write(device->chip_select, true);
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}
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return ret;
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}
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