2022-01-05 16:10:18 +00:00
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#include "rfid_writer.h"
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#include <furi_hal.h>
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#include "protocols/protocol_emmarin.h"
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#include "protocols/protocol_hid_h10301.h"
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#include "protocols/protocol_indala_40134.h"
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2021-05-18 08:37:47 +00:00
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/**
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* @brief all timings are specified in field clocks (field clock = 125 kHz, 8 us)
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*
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*/
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class T55xxTiming {
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public:
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constexpr static const uint16_t wait_time = 400;
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2021-06-28 14:42:30 +00:00
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constexpr static const uint8_t start_gap = 30;
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constexpr static const uint8_t write_gap = 18;
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2021-05-18 08:37:47 +00:00
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constexpr static const uint8_t data_0 = 24;
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constexpr static const uint8_t data_1 = 56;
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constexpr static const uint16_t program = 700;
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};
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class T55xxCmd {
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public:
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constexpr static const uint8_t opcode_page_0 = 0b10;
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constexpr static const uint8_t opcode_page_1 = 0b11;
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constexpr static const uint8_t opcode_reset = 0b00;
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};
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RfidWriter::RfidWriter() {
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}
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RfidWriter::~RfidWriter() {
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}
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void RfidWriter::start() {
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2021-08-08 18:03:25 +00:00
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furi_hal_rfid_tim_read(125000, 0.5);
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furi_hal_rfid_pins_read();
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furi_hal_rfid_tim_read_start();
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2021-12-12 11:03:39 +00:00
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// do not ground the antenna
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furi_hal_rfid_pin_pull_release();
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2021-05-18 08:37:47 +00:00
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}
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void RfidWriter::stop() {
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2021-08-08 18:03:25 +00:00
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furi_hal_rfid_tim_read_stop();
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furi_hal_rfid_tim_reset();
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furi_hal_rfid_pins_reset();
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2021-05-18 08:37:47 +00:00
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}
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void RfidWriter::write_gap(uint32_t gap_time) {
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2021-08-08 18:03:25 +00:00
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furi_hal_rfid_tim_read_stop();
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2021-05-18 08:37:47 +00:00
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delay_us(gap_time * 8);
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2021-08-08 18:03:25 +00:00
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furi_hal_rfid_tim_read_start();
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2021-05-18 08:37:47 +00:00
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}
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void RfidWriter::write_bit(bool value) {
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if(value) {
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delay_us(T55xxTiming::data_1 * 8);
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} else {
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delay_us(T55xxTiming::data_0 * 8);
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}
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write_gap(T55xxTiming::write_gap);
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}
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void RfidWriter::write_byte(uint8_t value) {
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for(uint8_t i = 0; i < 8; i++) {
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write_bit((value >> i) & 1);
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}
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}
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void RfidWriter::write_block(uint8_t page, uint8_t block, bool lock_bit, uint32_t data) {
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delay_us(T55xxTiming::wait_time * 8);
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// start gap
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write_gap(T55xxTiming::start_gap);
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// opcode
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switch(page) {
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case 0:
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write_bit(1);
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write_bit(0);
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break;
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case 1:
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write_bit(1);
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write_bit(1);
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break;
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default:
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furi_check(false);
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break;
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}
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// lock bit
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write_bit(lock_bit);
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// data
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for(uint8_t i = 0; i < 32; i++) {
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write_bit((data >> (31 - i)) & 1);
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}
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// block address
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write_bit((block >> 2) & 1);
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write_bit((block >> 1) & 1);
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write_bit((block >> 0) & 1);
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delay_us(T55xxTiming::program * 8);
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2021-06-28 14:42:30 +00:00
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delay_us(T55xxTiming::wait_time * 8);
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write_reset();
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}
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void RfidWriter::write_reset() {
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write_gap(T55xxTiming::start_gap);
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write_bit(1);
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write_bit(0);
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2021-05-18 08:37:47 +00:00
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}
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2021-06-30 12:02:46 +00:00
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void RfidWriter::write_em(const uint8_t em_data[5]) {
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2021-05-18 08:37:47 +00:00
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ProtocolEMMarin em_card;
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uint64_t em_encoded_data;
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em_card.encode(em_data, 5, reinterpret_cast<uint8_t*>(&em_encoded_data), sizeof(uint64_t));
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2021-08-01 22:11:18 +00:00
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const uint32_t em_config_block_data = 0b00000000000101001000000001000000;
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2021-05-18 08:37:47 +00:00
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2022-02-10 11:20:50 +00:00
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FURI_CRITICAL_ENTER();
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2021-05-18 08:37:47 +00:00
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write_block(0, 0, false, em_config_block_data);
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write_block(0, 1, false, em_encoded_data);
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write_block(0, 2, false, em_encoded_data >> 32);
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2021-06-28 14:42:30 +00:00
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write_reset();
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2022-02-10 11:20:50 +00:00
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FURI_CRITICAL_EXIT();
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2021-06-28 14:42:30 +00:00
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}
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2021-06-30 12:02:46 +00:00
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void RfidWriter::write_hid(const uint8_t hid_data[3]) {
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2021-06-28 14:42:30 +00:00
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ProtocolHID10301 hid_card;
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uint32_t card_data[3];
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hid_card.encode(hid_data, 3, reinterpret_cast<uint8_t*>(&card_data), sizeof(card_data) * 3);
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const uint32_t hid_config_block_data = 0b00000000000100000111000001100000;
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2022-02-10 11:20:50 +00:00
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FURI_CRITICAL_ENTER();
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2021-06-28 14:42:30 +00:00
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write_block(0, 0, false, hid_config_block_data);
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write_block(0, 1, false, card_data[0]);
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write_block(0, 2, false, card_data[1]);
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write_block(0, 3, false, card_data[2]);
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write_reset();
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2022-02-10 11:20:50 +00:00
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FURI_CRITICAL_EXIT();
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2021-05-18 08:37:47 +00:00
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}
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2021-08-01 22:11:18 +00:00
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void RfidWriter::write_indala(const uint8_t indala_data[3]) {
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ProtocolIndala40134 indala_card;
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uint32_t card_data[2];
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indala_card.encode(
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indala_data, 3, reinterpret_cast<uint8_t*>(&card_data), sizeof(card_data) * 2);
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const uint32_t indala_config_block_data = 0b00000000000010000001000001000000;
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2022-02-10 11:20:50 +00:00
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FURI_CRITICAL_ENTER();
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2021-08-01 22:11:18 +00:00
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write_block(0, 0, false, indala_config_block_data);
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write_block(0, 1, false, card_data[0]);
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write_block(0, 2, false, card_data[1]);
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write_reset();
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2022-02-10 11:20:50 +00:00
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FURI_CRITICAL_EXIT();
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2021-08-01 22:11:18 +00:00
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}
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