2022-05-26 12:55:29 +00:00
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#include <limits.h>
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2022-01-05 16:10:18 +00:00
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#include "furi_hal_nfc.h"
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2021-09-10 02:19:02 +00:00
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#include <st25r3916.h>
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2022-05-24 14:00:15 +00:00
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#include <st25r3916_irq.h>
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2022-02-02 19:59:28 +00:00
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#include <rfal_rf.h>
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#include <furi.h>
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#include <m-string.h>
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2022-05-24 14:00:15 +00:00
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#include <lib/digital_signal/digital_signal.h>
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2022-07-03 14:51:50 +00:00
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#include <furi_hal_spi.h>
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#include <furi_hal_gpio.h>
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2022-07-20 10:56:33 +00:00
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#include <furi_hal_cortex.h>
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2022-07-03 14:51:50 +00:00
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#include <furi_hal_resources.h>
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2021-09-10 02:19:02 +00:00
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2021-11-12 13:04:35 +00:00
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#define TAG "FuriHalNfc"
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2021-09-10 02:19:02 +00:00
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static const uint32_t clocks_in_ms = 64 * 1000;
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2022-07-20 10:56:33 +00:00
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FuriEventFlag* event = NULL;
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2022-02-02 19:59:28 +00:00
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#define EVENT_FLAG_INTERRUPT (1UL << 0)
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#define EVENT_FLAG_STATE_CHANGED (1UL << 1)
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#define EVENT_FLAG_STOP (1UL << 2)
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#define EVENT_FLAG_ALL (EVENT_FLAG_INTERRUPT | EVENT_FLAG_STATE_CHANGED | EVENT_FLAG_STOP)
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2022-07-03 14:51:50 +00:00
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#define FURI_HAL_NFC_UID_INCOMPLETE (0x04)
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2021-09-10 02:19:02 +00:00
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void furi_hal_nfc_init() {
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ReturnCode ret = rfalNfcInitialize();
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if(ret == ERR_NONE) {
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furi_hal_nfc_start_sleep();
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2022-07-20 10:56:33 +00:00
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event = furi_event_flag_alloc();
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2021-11-12 13:04:35 +00:00
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FURI_LOG_I(TAG, "Init OK");
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2021-09-10 02:19:02 +00:00
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} else {
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2021-11-12 13:04:35 +00:00
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FURI_LOG_W(TAG, "Initialization failed, RFAL returned: %d", ret);
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2021-09-10 02:19:02 +00:00
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}
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}
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bool furi_hal_nfc_is_busy() {
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return rfalNfcGetState() != RFAL_NFC_STATE_IDLE;
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}
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void furi_hal_nfc_field_on() {
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furi_hal_nfc_exit_sleep();
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st25r3916TxRxOn();
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}
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void furi_hal_nfc_field_off() {
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st25r3916TxRxOff();
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furi_hal_nfc_start_sleep();
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}
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void furi_hal_nfc_start_sleep() {
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rfalLowPowerModeStart();
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}
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void furi_hal_nfc_exit_sleep() {
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rfalLowPowerModeStop();
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}
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2022-04-19 15:23:58 +00:00
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bool furi_hal_nfc_detect(FuriHalNfcDevData* nfc_data, uint32_t timeout) {
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furi_assert(nfc_data);
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rfalNfcDevice* dev_list = NULL;
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uint8_t dev_cnt = 0;
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bool detected = false;
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2021-09-10 02:19:02 +00:00
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rfalLowPowerModeStop();
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rfalNfcState state = rfalNfcGetState();
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2022-05-26 13:00:59 +00:00
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rfalNfcState state_old = 0;
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2021-09-10 02:19:02 +00:00
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if(state == RFAL_NFC_STATE_NOTINIT) {
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rfalNfcInitialize();
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}
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rfalNfcDiscoverParam params;
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params.compMode = RFAL_COMPLIANCE_MODE_EMV;
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params.techs2Find = RFAL_NFC_POLL_TECH_A | RFAL_NFC_POLL_TECH_B | RFAL_NFC_POLL_TECH_F |
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RFAL_NFC_POLL_TECH_V | RFAL_NFC_POLL_TECH_AP2P | RFAL_NFC_POLL_TECH_ST25TB;
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params.totalDuration = 1000;
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params.devLimit = 3;
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params.wakeupEnabled = false;
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params.wakeupConfigDefault = true;
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params.nfcfBR = RFAL_BR_212;
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params.ap2pBR = RFAL_BR_424;
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params.maxBR = RFAL_BR_KEEP;
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params.GBLen = RFAL_NFCDEP_GB_MAX_LEN;
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params.notifyCb = NULL;
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uint32_t start = DWT->CYCCNT;
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rfalNfcDiscover(¶ms);
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2022-04-19 15:23:58 +00:00
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while(true) {
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2021-09-10 02:19:02 +00:00
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rfalNfcWorker();
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state = rfalNfcGetState();
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2022-05-26 13:00:59 +00:00
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if(state != state_old) {
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FURI_LOG_T(TAG, "State change %d -> %d", state_old, state);
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}
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state_old = state;
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2022-04-19 15:23:58 +00:00
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if(state == RFAL_NFC_STATE_ACTIVATED) {
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detected = true;
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break;
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}
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2021-09-10 02:19:02 +00:00
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if(state == RFAL_NFC_STATE_POLL_ACTIVATION) {
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start = DWT->CYCCNT;
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continue;
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}
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if(state == RFAL_NFC_STATE_POLL_SELECT) {
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rfalNfcSelect(0);
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}
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if(DWT->CYCCNT - start > timeout * clocks_in_ms) {
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rfalNfcDeactivate(true);
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2021-12-15 19:07:37 +00:00
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FURI_LOG_T(TAG, "Timeout");
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2022-04-19 15:23:58 +00:00
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break;
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2021-09-10 02:19:02 +00:00
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}
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2022-07-20 10:56:33 +00:00
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furi_delay_tick(1);
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2021-09-10 02:19:02 +00:00
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}
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2022-04-19 15:23:58 +00:00
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rfalNfcGetDevicesFound(&dev_list, &dev_cnt);
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if(detected) {
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if(dev_list[0].type == RFAL_NFC_LISTEN_TYPE_NFCA) {
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nfc_data->type = FuriHalNfcTypeA;
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nfc_data->atqa[0] = dev_list[0].dev.nfca.sensRes.anticollisionInfo;
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nfc_data->atqa[1] = dev_list[0].dev.nfca.sensRes.platformInfo;
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nfc_data->sak = dev_list[0].dev.nfca.selRes.sak;
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uint8_t* cuid_start = dev_list[0].nfcid;
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if(dev_list[0].nfcidLen == 7) {
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cuid_start = &dev_list[0].nfcid[3];
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}
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nfc_data->cuid = (cuid_start[0] << 24) | (cuid_start[1] << 16) | (cuid_start[2] << 8) |
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(cuid_start[3]);
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} else if(dev_list[0].type == RFAL_NFC_LISTEN_TYPE_NFCB) {
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nfc_data->type = FuriHalNfcTypeB;
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} else if(dev_list[0].type == RFAL_NFC_LISTEN_TYPE_NFCF) {
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nfc_data->type = FuriHalNfcTypeF;
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} else if(dev_list[0].type == RFAL_NFC_LISTEN_TYPE_NFCV) {
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nfc_data->type = FuriHalNfcTypeV;
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}
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if(dev_list[0].rfInterface == RFAL_NFC_INTERFACE_RF) {
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nfc_data->interface = FuriHalNfcInterfaceRf;
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} else if(dev_list[0].rfInterface == RFAL_NFC_INTERFACE_ISODEP) {
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nfc_data->interface = FuriHalNfcInterfaceIsoDep;
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} else if(dev_list[0].rfInterface == RFAL_NFC_INTERFACE_NFCDEP) {
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nfc_data->interface = FuriHalNfcInterfaceNfcDep;
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}
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nfc_data->uid_len = dev_list[0].nfcidLen;
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memcpy(nfc_data->uid, dev_list[0].nfcid, nfc_data->uid_len);
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2021-09-10 02:19:02 +00:00
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}
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2022-04-19 15:23:58 +00:00
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return detected;
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2021-09-10 02:19:02 +00:00
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}
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2022-03-23 22:14:34 +00:00
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bool furi_hal_nfc_activate_nfca(uint32_t timeout, uint32_t* cuid) {
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rfalNfcDevice* dev_list;
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uint8_t dev_cnt = 0;
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rfalLowPowerModeStop();
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rfalNfcState state = rfalNfcGetState();
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if(state == RFAL_NFC_STATE_NOTINIT) {
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rfalNfcInitialize();
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}
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rfalNfcDiscoverParam params = {
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.compMode = RFAL_COMPLIANCE_MODE_NFC,
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.techs2Find = RFAL_NFC_POLL_TECH_A,
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.totalDuration = 1000,
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.devLimit = 3,
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.wakeupEnabled = false,
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.wakeupConfigDefault = true,
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.nfcfBR = RFAL_BR_212,
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.ap2pBR = RFAL_BR_424,
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.maxBR = RFAL_BR_KEEP,
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.GBLen = RFAL_NFCDEP_GB_MAX_LEN,
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.notifyCb = NULL,
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};
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uint32_t start = DWT->CYCCNT;
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rfalNfcDiscover(¶ms);
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while(state != RFAL_NFC_STATE_ACTIVATED) {
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rfalNfcWorker();
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state = rfalNfcGetState();
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FURI_LOG_T(TAG, "Current state %d", state);
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if(state == RFAL_NFC_STATE_POLL_ACTIVATION) {
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start = DWT->CYCCNT;
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continue;
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}
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if(state == RFAL_NFC_STATE_POLL_SELECT) {
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rfalNfcSelect(0);
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}
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if(DWT->CYCCNT - start > timeout * clocks_in_ms) {
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rfalNfcDeactivate(true);
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FURI_LOG_T(TAG, "Timeout");
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return false;
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}
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2022-06-20 14:54:48 +00:00
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furi_thread_yield();
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2022-03-23 22:14:34 +00:00
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}
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rfalNfcGetDevicesFound(&dev_list, &dev_cnt);
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// Take first device and set cuid
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if(cuid) {
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uint8_t* cuid_start = dev_list[0].nfcid;
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if(dev_list[0].nfcidLen == 7) {
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cuid_start = &dev_list[0].nfcid[3];
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}
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*cuid = (cuid_start[0] << 24) | (cuid_start[1] << 16) | (cuid_start[2] << 8) |
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(cuid_start[3]);
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FURI_LOG_T(TAG, "Activated tag with cuid: %lX", *cuid);
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}
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return true;
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}
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2022-01-05 16:10:18 +00:00
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bool furi_hal_nfc_listen(
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uint8_t* uid,
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uint8_t uid_len,
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uint8_t* atqa,
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uint8_t sak,
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bool activate_after_sak,
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uint32_t timeout) {
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2021-09-10 02:19:02 +00:00
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rfalNfcState state = rfalNfcGetState();
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if(state == RFAL_NFC_STATE_NOTINIT) {
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rfalNfcInitialize();
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} else if(state >= RFAL_NFC_STATE_ACTIVATED) {
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rfalNfcDeactivate(false);
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}
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rfalLowPowerModeStop();
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rfalNfcDiscoverParam params = {
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.compMode = RFAL_COMPLIANCE_MODE_NFC,
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.techs2Find = RFAL_NFC_LISTEN_TECH_A,
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.totalDuration = 1000,
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.devLimit = 1,
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.wakeupEnabled = false,
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.wakeupConfigDefault = true,
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.nfcfBR = RFAL_BR_212,
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.ap2pBR = RFAL_BR_424,
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.maxBR = RFAL_BR_KEEP,
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.GBLen = RFAL_NFCDEP_GB_MAX_LEN,
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.notifyCb = NULL,
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.activate_after_sak = activate_after_sak,
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};
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params.lmConfigPA.nfcidLen = uid_len;
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memcpy(params.lmConfigPA.nfcid, uid, uid_len);
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params.lmConfigPA.SENS_RES[0] = atqa[0];
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params.lmConfigPA.SENS_RES[1] = atqa[1];
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params.lmConfigPA.SEL_RES = sak;
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rfalNfcDiscover(¶ms);
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uint32_t start = DWT->CYCCNT;
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while(state != RFAL_NFC_STATE_ACTIVATED) {
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rfalNfcWorker();
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state = rfalNfcGetState();
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if(DWT->CYCCNT - start > timeout * clocks_in_ms) {
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rfalNfcDeactivate(true);
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return false;
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}
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2022-07-20 10:56:33 +00:00
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furi_delay_tick(1);
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2021-09-10 02:19:02 +00:00
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}
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return true;
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}
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2022-07-03 14:51:50 +00:00
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static void furi_hal_nfc_read_fifo(uint8_t* data, uint16_t* bits) {
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uint8_t fifo_status[2];
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uint8_t rx_buff[64];
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st25r3916ReadMultipleRegisters(
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ST25R3916_REG_FIFO_STATUS1, fifo_status, ST25R3916_FIFO_STATUS_LEN);
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uint16_t rx_bytes =
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((((uint16_t)fifo_status[1] & ST25R3916_REG_FIFO_STATUS2_fifo_b_mask) >>
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ST25R3916_REG_FIFO_STATUS2_fifo_b_shift)
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<< 8);
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rx_bytes |= (((uint16_t)fifo_status[0]) & 0x00FFU);
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st25r3916ReadFifo(rx_buff, rx_bytes);
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memcpy(data, rx_buff, rx_bytes);
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*bits = rx_bytes * 8;
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}
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void furi_hal_nfc_listen_sleep() {
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st25r3916ExecuteCommand(ST25R3916_CMD_GOTO_SLEEP);
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}
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bool furi_hal_nfc_listen_rx(FuriHalNfcTxRxContext* tx_rx, uint32_t timeout_ms) {
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furi_assert(tx_rx);
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// Wait for interrupts
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2022-07-20 10:56:33 +00:00
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uint32_t start = furi_get_tick();
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2022-07-03 14:51:50 +00:00
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bool data_received = false;
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while(true) {
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if(furi_hal_gpio_read(&gpio_nfc_irq_rfid_pull) == true) {
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st25r3916CheckForReceivedInterrupts();
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if(st25r3916GetInterrupt(ST25R3916_IRQ_MASK_RXE)) {
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furi_hal_nfc_read_fifo(tx_rx->rx_data, &tx_rx->rx_bits);
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data_received = true;
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break;
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}
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continue;
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}
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2022-07-20 10:56:33 +00:00
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if(furi_get_tick() - start > timeout_ms) {
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2022-07-12 14:56:56 +00:00
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FURI_LOG_T(TAG, "Interrupt waiting timeout");
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2022-07-20 10:56:33 +00:00
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furi_delay_tick(1);
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2022-07-03 14:51:50 +00:00
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break;
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}
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}
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return data_received;
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}
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|
|
|
|
|
void furi_hal_nfc_listen_start(FuriHalNfcDevData* nfc_data) {
|
|
|
|
furi_assert(nfc_data);
|
|
|
|
|
|
|
|
furi_hal_gpio_init(&gpio_nfc_irq_rfid_pull, GpioModeInput, GpioPullDown, GpioSpeedVeryHigh);
|
|
|
|
// Clear interrupts
|
|
|
|
st25r3916ClearInterrupts();
|
|
|
|
// Mask all interrupts
|
|
|
|
st25r3916DisableInterrupts(ST25R3916_IRQ_MASK_ALL);
|
|
|
|
// RESET
|
|
|
|
st25r3916ExecuteCommand(ST25R3916_CMD_STOP);
|
|
|
|
// Setup registers
|
|
|
|
st25r3916WriteRegister(
|
|
|
|
ST25R3916_REG_OP_CONTROL,
|
|
|
|
ST25R3916_REG_OP_CONTROL_en | ST25R3916_REG_OP_CONTROL_rx_en |
|
|
|
|
ST25R3916_REG_OP_CONTROL_en_fd_auto_efd);
|
|
|
|
st25r3916WriteRegister(
|
|
|
|
ST25R3916_REG_MODE,
|
|
|
|
ST25R3916_REG_MODE_targ_targ | ST25R3916_REG_MODE_om3 | ST25R3916_REG_MODE_om0);
|
|
|
|
st25r3916WriteRegister(
|
|
|
|
ST25R3916_REG_PASSIVE_TARGET,
|
|
|
|
ST25R3916_REG_PASSIVE_TARGET_fdel_2 | ST25R3916_REG_PASSIVE_TARGET_fdel_0 |
|
|
|
|
ST25R3916_REG_PASSIVE_TARGET_d_ac_ap2p | ST25R3916_REG_PASSIVE_TARGET_d_212_424_1r);
|
|
|
|
st25r3916WriteRegister(ST25R3916_REG_MASK_RX_TIMER, 0x02);
|
|
|
|
|
|
|
|
// Mask interrupts
|
|
|
|
uint32_t clear_irq_mask =
|
|
|
|
(ST25R3916_IRQ_MASK_RXE | ST25R3916_IRQ_MASK_RXE_PTA | ST25R3916_IRQ_MASK_WU_A_X |
|
|
|
|
ST25R3916_IRQ_MASK_WU_A);
|
|
|
|
st25r3916EnableInterrupts(clear_irq_mask);
|
|
|
|
|
|
|
|
// Set 4 or 7 bytes UID
|
|
|
|
if(nfc_data->uid_len == 4) {
|
|
|
|
st25r3916ChangeRegisterBits(
|
|
|
|
ST25R3916_REG_AUX, ST25R3916_REG_AUX_nfc_id_mask, ST25R3916_REG_AUX_nfc_id_4bytes);
|
|
|
|
} else {
|
|
|
|
st25r3916ChangeRegisterBits(
|
|
|
|
ST25R3916_REG_AUX, ST25R3916_REG_AUX_nfc_id_mask, ST25R3916_REG_AUX_nfc_id_7bytes);
|
|
|
|
}
|
|
|
|
// Write PT Memory
|
|
|
|
uint8_t pt_memory[15] = {};
|
|
|
|
memcpy(pt_memory, nfc_data->uid, nfc_data->uid_len);
|
|
|
|
pt_memory[10] = nfc_data->atqa[0];
|
|
|
|
pt_memory[11] = nfc_data->atqa[1];
|
|
|
|
if(nfc_data->uid_len == 4) {
|
|
|
|
pt_memory[12] = nfc_data->sak & ~FURI_HAL_NFC_UID_INCOMPLETE;
|
|
|
|
} else {
|
2022-08-09 15:45:52 +00:00
|
|
|
pt_memory[12] = FURI_HAL_NFC_UID_INCOMPLETE;
|
2022-07-03 14:51:50 +00:00
|
|
|
}
|
|
|
|
pt_memory[13] = nfc_data->sak & ~FURI_HAL_NFC_UID_INCOMPLETE;
|
|
|
|
pt_memory[14] = nfc_data->sak & ~FURI_HAL_NFC_UID_INCOMPLETE;
|
|
|
|
|
|
|
|
st25r3916WritePTMem(pt_memory, sizeof(pt_memory));
|
2022-08-09 15:45:52 +00:00
|
|
|
// Go to sense
|
2022-07-03 14:51:50 +00:00
|
|
|
st25r3916ExecuteCommand(ST25R3916_CMD_GOTO_SENSE);
|
|
|
|
}
|
|
|
|
|
2022-02-02 19:59:28 +00:00
|
|
|
void rfal_interrupt_callback_handler() {
|
2022-07-20 10:56:33 +00:00
|
|
|
furi_event_flag_set(event, EVENT_FLAG_INTERRUPT);
|
2022-02-02 19:59:28 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
void rfal_state_changed_callback(void* context) {
|
2022-05-06 13:37:10 +00:00
|
|
|
UNUSED(context);
|
2022-07-20 10:56:33 +00:00
|
|
|
furi_event_flag_set(event, EVENT_FLAG_STATE_CHANGED);
|
2022-02-02 19:59:28 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
void furi_hal_nfc_stop() {
|
|
|
|
if(event) {
|
2022-07-20 10:56:33 +00:00
|
|
|
furi_event_flag_set(event, EVENT_FLAG_STOP);
|
2022-02-02 19:59:28 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
bool furi_hal_nfc_emulate_nfca(
|
|
|
|
uint8_t* uid,
|
|
|
|
uint8_t uid_len,
|
|
|
|
uint8_t* atqa,
|
|
|
|
uint8_t sak,
|
|
|
|
FuriHalNfcEmulateCallback callback,
|
|
|
|
void* context,
|
|
|
|
uint32_t timeout) {
|
|
|
|
rfalSetUpperLayerCallback(rfal_interrupt_callback_handler);
|
|
|
|
rfal_set_state_changed_callback(rfal_state_changed_callback);
|
|
|
|
|
|
|
|
rfalLmConfPA config;
|
|
|
|
config.nfcidLen = uid_len;
|
|
|
|
memcpy(config.nfcid, uid, uid_len);
|
|
|
|
memcpy(config.SENS_RES, atqa, RFAL_LM_SENS_RES_LEN);
|
|
|
|
config.SEL_RES = sak;
|
|
|
|
uint8_t buff_rx[256];
|
|
|
|
uint16_t buff_rx_size = 256;
|
|
|
|
uint16_t buff_rx_len = 0;
|
2022-06-21 15:04:35 +00:00
|
|
|
uint8_t buff_tx[1040];
|
2022-02-02 19:59:28 +00:00
|
|
|
uint16_t buff_tx_len = 0;
|
|
|
|
uint32_t data_type = FURI_HAL_NFC_TXRX_DEFAULT;
|
|
|
|
|
|
|
|
rfalLowPowerModeStop();
|
|
|
|
if(rfalListenStart(
|
|
|
|
RFAL_LM_MASK_NFCA,
|
|
|
|
&config,
|
|
|
|
NULL,
|
|
|
|
NULL,
|
|
|
|
buff_rx,
|
|
|
|
rfalConvBytesToBits(buff_rx_size),
|
|
|
|
&buff_rx_len)) {
|
|
|
|
rfalListenStop();
|
|
|
|
FURI_LOG_E(TAG, "Failed to start listen mode");
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
while(true) {
|
|
|
|
buff_rx_len = 0;
|
|
|
|
buff_tx_len = 0;
|
2022-07-20 10:56:33 +00:00
|
|
|
uint32_t flag = furi_event_flag_wait(event, EVENT_FLAG_ALL, FuriFlagWaitAny, timeout);
|
|
|
|
if(flag == FuriFlagErrorTimeout || flag == EVENT_FLAG_STOP) {
|
2022-02-02 19:59:28 +00:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
bool data_received = false;
|
|
|
|
buff_rx_len = 0;
|
|
|
|
rfalWorker();
|
|
|
|
rfalLmState state = rfalListenGetState(&data_received, NULL);
|
|
|
|
if(data_received) {
|
|
|
|
rfalTransceiveBlockingRx();
|
|
|
|
if(nfca_emulation_handler(buff_rx, buff_rx_len, buff_tx, &buff_tx_len)) {
|
|
|
|
if(rfalListenSleepStart(
|
|
|
|
RFAL_LM_STATE_SLEEP_A,
|
|
|
|
buff_rx,
|
|
|
|
rfalConvBytesToBits(buff_rx_size),
|
|
|
|
&buff_rx_len)) {
|
|
|
|
FURI_LOG_E(TAG, "Failed to enter sleep mode");
|
|
|
|
break;
|
|
|
|
} else {
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if(buff_tx_len) {
|
|
|
|
ReturnCode ret = rfalTransceiveBitsBlockingTx(
|
|
|
|
buff_tx,
|
|
|
|
buff_tx_len,
|
|
|
|
buff_rx,
|
|
|
|
sizeof(buff_rx),
|
|
|
|
&buff_rx_len,
|
|
|
|
data_type,
|
|
|
|
RFAL_FWT_NONE);
|
|
|
|
if(ret) {
|
|
|
|
FURI_LOG_E(TAG, "Tranceive failed with status %d", ret);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
if((state == RFAL_LM_STATE_ACTIVE_A || state == RFAL_LM_STATE_ACTIVE_Ax)) {
|
|
|
|
if(callback) {
|
|
|
|
callback(buff_rx, buff_rx_len, buff_tx, &buff_tx_len, &data_type, context);
|
|
|
|
}
|
|
|
|
if(!rfalIsExtFieldOn()) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
if(buff_tx_len) {
|
2022-05-26 12:55:29 +00:00
|
|
|
if(buff_tx_len == UINT16_MAX) buff_tx_len = 0;
|
|
|
|
|
2022-02-02 19:59:28 +00:00
|
|
|
ReturnCode ret = rfalTransceiveBitsBlockingTx(
|
|
|
|
buff_tx,
|
|
|
|
buff_tx_len,
|
|
|
|
buff_rx,
|
|
|
|
sizeof(buff_rx),
|
|
|
|
&buff_rx_len,
|
|
|
|
data_type,
|
|
|
|
RFAL_FWT_NONE);
|
|
|
|
if(ret) {
|
|
|
|
FURI_LOG_E(TAG, "Tranceive failed with status %d", ret);
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
rfalListenStop();
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2022-05-24 14:00:15 +00:00
|
|
|
static bool furi_hal_nfc_transparent_tx_rx(FuriHalNfcTxRxContext* tx_rx, uint16_t timeout_ms) {
|
|
|
|
furi_assert(tx_rx->nfca_signal);
|
|
|
|
|
|
|
|
bool ret = false;
|
|
|
|
|
|
|
|
// Start transparent mode
|
|
|
|
st25r3916ExecuteCommand(ST25R3916_CMD_TRANSPARENT_MODE);
|
2022-07-03 14:51:50 +00:00
|
|
|
// Reconfigure gpio for Transparent mode
|
2022-05-24 14:00:15 +00:00
|
|
|
furi_hal_spi_bus_handle_deinit(&furi_hal_spi_bus_handle_nfc);
|
|
|
|
|
|
|
|
// Send signal
|
2022-07-03 14:51:50 +00:00
|
|
|
FURI_CRITICAL_ENTER();
|
2022-05-24 14:00:15 +00:00
|
|
|
nfca_signal_encode(tx_rx->nfca_signal, tx_rx->tx_data, tx_rx->tx_bits, tx_rx->tx_parity);
|
|
|
|
digital_signal_send(tx_rx->nfca_signal->tx_signal, &gpio_spi_r_mosi);
|
2022-07-03 14:51:50 +00:00
|
|
|
FURI_CRITICAL_EXIT();
|
2022-05-24 14:00:15 +00:00
|
|
|
furi_hal_gpio_write(&gpio_spi_r_mosi, false);
|
|
|
|
|
|
|
|
// Configure gpio back to SPI and exit transparent
|
|
|
|
furi_hal_spi_bus_handle_init(&furi_hal_spi_bus_handle_nfc);
|
|
|
|
st25r3916ExecuteCommand(ST25R3916_CMD_UNMASK_RECEIVE_DATA);
|
|
|
|
|
2022-06-14 01:14:13 +00:00
|
|
|
if(tx_rx->sniff_tx) {
|
|
|
|
tx_rx->sniff_tx(tx_rx->tx_data, tx_rx->tx_bits, false, tx_rx->sniff_context);
|
|
|
|
}
|
|
|
|
|
2022-05-24 14:00:15 +00:00
|
|
|
// Manually wait for interrupt
|
2022-06-20 14:54:48 +00:00
|
|
|
furi_hal_gpio_init(&gpio_nfc_irq_rfid_pull, GpioModeInput, GpioPullDown, GpioSpeedVeryHigh);
|
2022-05-24 14:00:15 +00:00
|
|
|
st25r3916ClearAndEnableInterrupts(ST25R3916_IRQ_MASK_RXE);
|
|
|
|
|
|
|
|
uint32_t irq = 0;
|
|
|
|
uint8_t rxe = 0;
|
|
|
|
uint32_t start = DWT->CYCCNT;
|
|
|
|
while(true) {
|
2022-08-09 15:45:52 +00:00
|
|
|
if(!rfalIsExtFieldOn()) {
|
|
|
|
return false;
|
|
|
|
}
|
2022-06-20 14:54:48 +00:00
|
|
|
if(furi_hal_gpio_read(&gpio_nfc_irq_rfid_pull) == true) {
|
2022-05-24 14:00:15 +00:00
|
|
|
st25r3916ReadRegister(ST25R3916_REG_IRQ_MAIN, &rxe);
|
|
|
|
if(rxe & (1 << 4)) {
|
|
|
|
irq = 1;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
uint32_t timeout = DWT->CYCCNT - start;
|
2022-07-20 10:56:33 +00:00
|
|
|
if(timeout / furi_hal_cortex_instructions_per_microsecond() > timeout_ms * 1000) {
|
2022-05-24 14:00:15 +00:00
|
|
|
FURI_LOG_D(TAG, "Interrupt waiting timeout");
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if(irq) {
|
|
|
|
uint8_t fifo_stat[2];
|
|
|
|
st25r3916ReadMultipleRegisters(
|
|
|
|
ST25R3916_REG_FIFO_STATUS1, fifo_stat, ST25R3916_FIFO_STATUS_LEN);
|
|
|
|
uint16_t len =
|
|
|
|
((((uint16_t)fifo_stat[1] & ST25R3916_REG_FIFO_STATUS2_fifo_b_mask) >>
|
|
|
|
ST25R3916_REG_FIFO_STATUS2_fifo_b_shift)
|
|
|
|
<< RFAL_BITS_IN_BYTE);
|
|
|
|
len |= (((uint16_t)fifo_stat[0]) & 0x00FFU);
|
|
|
|
uint8_t rx[100];
|
|
|
|
st25r3916ReadFifo(rx, len);
|
|
|
|
|
|
|
|
tx_rx->rx_bits = len * 8;
|
|
|
|
memcpy(tx_rx->rx_data, rx, len);
|
|
|
|
|
2022-06-14 01:14:13 +00:00
|
|
|
if(tx_rx->sniff_rx) {
|
|
|
|
tx_rx->sniff_rx(tx_rx->rx_data, tx_rx->rx_bits, false, tx_rx->sniff_context);
|
|
|
|
}
|
|
|
|
|
2022-05-24 14:00:15 +00:00
|
|
|
ret = true;
|
|
|
|
} else {
|
|
|
|
FURI_LOG_E(TAG, "Timeout error");
|
|
|
|
ret = false;
|
|
|
|
}
|
|
|
|
|
|
|
|
st25r3916ClearInterrupts();
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2022-04-19 15:23:58 +00:00
|
|
|
static uint32_t furi_hal_nfc_tx_rx_get_flag(FuriHalNfcTxRxType type) {
|
|
|
|
uint32_t flags = 0;
|
|
|
|
|
|
|
|
if(type == FuriHalNfcTxRxTypeRxNoCrc) {
|
|
|
|
flags = RFAL_TXRX_FLAGS_CRC_RX_KEEP;
|
|
|
|
} else if(type == FuriHalNfcTxRxTypeRxKeepPar) {
|
|
|
|
flags = RFAL_TXRX_FLAGS_CRC_TX_MANUAL | RFAL_TXRX_FLAGS_CRC_RX_KEEP |
|
|
|
|
RFAL_TXRX_FLAGS_PAR_RX_KEEP;
|
|
|
|
} else if(type == FuriHalNfcTxRxTypeRaw) {
|
|
|
|
flags = RFAL_TXRX_FLAGS_CRC_TX_MANUAL | RFAL_TXRX_FLAGS_CRC_RX_KEEP |
|
|
|
|
RFAL_TXRX_FLAGS_PAR_RX_KEEP | RFAL_TXRX_FLAGS_PAR_TX_NONE;
|
2022-05-24 14:00:15 +00:00
|
|
|
} else if(type == FuriHalNfcTxRxTypeRxRaw) {
|
|
|
|
flags = RFAL_TXRX_FLAGS_CRC_TX_MANUAL | RFAL_TXRX_FLAGS_CRC_RX_KEEP |
|
|
|
|
RFAL_TXRX_FLAGS_PAR_RX_KEEP | RFAL_TXRX_FLAGS_PAR_TX_NONE;
|
2022-04-19 15:23:58 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
return flags;
|
|
|
|
}
|
|
|
|
|
2022-03-23 22:14:34 +00:00
|
|
|
static uint16_t furi_hal_nfc_data_and_parity_to_bitstream(
|
|
|
|
uint8_t* data,
|
|
|
|
uint16_t len,
|
|
|
|
uint8_t* parity,
|
|
|
|
uint8_t* out) {
|
|
|
|
furi_assert(data);
|
|
|
|
furi_assert(out);
|
|
|
|
|
|
|
|
uint8_t next_par_bit = 0;
|
|
|
|
uint16_t curr_bit_pos = 0;
|
|
|
|
for(uint16_t i = 0; i < len; i++) {
|
|
|
|
next_par_bit = FURI_BIT(parity[i / 8], 7 - (i % 8));
|
|
|
|
if(curr_bit_pos % 8 == 0) {
|
|
|
|
out[curr_bit_pos / 8] = data[i];
|
|
|
|
curr_bit_pos += 8;
|
|
|
|
out[curr_bit_pos / 8] = next_par_bit;
|
|
|
|
curr_bit_pos++;
|
|
|
|
} else {
|
|
|
|
out[curr_bit_pos / 8] |= data[i] << curr_bit_pos % 8;
|
|
|
|
out[curr_bit_pos / 8 + 1] = data[i] >> (8 - curr_bit_pos % 8);
|
|
|
|
out[curr_bit_pos / 8 + 1] |= next_par_bit << curr_bit_pos % 8;
|
|
|
|
curr_bit_pos += 9;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return curr_bit_pos;
|
|
|
|
}
|
|
|
|
|
|
|
|
uint16_t furi_hal_nfc_bitstream_to_data_and_parity(
|
|
|
|
uint8_t* in_buff,
|
|
|
|
uint16_t in_buff_bits,
|
|
|
|
uint8_t* out_data,
|
|
|
|
uint8_t* out_parity) {
|
|
|
|
if(in_buff_bits % 9 != 0) {
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
uint8_t curr_byte = 0;
|
|
|
|
uint16_t bit_processed = 0;
|
|
|
|
memset(out_parity, 0, in_buff_bits / 9);
|
|
|
|
while(bit_processed < in_buff_bits) {
|
|
|
|
out_data[curr_byte] = in_buff[bit_processed / 8] >> bit_processed % 8;
|
|
|
|
out_data[curr_byte] |= in_buff[bit_processed / 8 + 1] << (8 - bit_processed % 8);
|
|
|
|
out_parity[curr_byte / 8] |= FURI_BIT(in_buff[bit_processed / 8 + 1], bit_processed % 8)
|
|
|
|
<< (7 - curr_byte % 8);
|
|
|
|
bit_processed += 9;
|
|
|
|
curr_byte++;
|
|
|
|
}
|
|
|
|
return curr_byte;
|
|
|
|
}
|
|
|
|
|
2022-04-19 15:23:58 +00:00
|
|
|
bool furi_hal_nfc_tx_rx(FuriHalNfcTxRxContext* tx_rx, uint16_t timeout_ms) {
|
|
|
|
furi_assert(tx_rx);
|
2021-12-21 12:33:17 +00:00
|
|
|
|
|
|
|
ReturnCode ret;
|
|
|
|
rfalNfcState state = RFAL_NFC_STATE_ACTIVATED;
|
2022-03-23 22:14:34 +00:00
|
|
|
uint8_t temp_tx_buff[FURI_HAL_NFC_DATA_BUFF_SIZE] = {};
|
|
|
|
uint16_t temp_tx_bits = 0;
|
|
|
|
uint8_t* temp_rx_buff = NULL;
|
|
|
|
uint16_t* temp_rx_bits = NULL;
|
|
|
|
|
2022-05-24 14:00:15 +00:00
|
|
|
if(tx_rx->tx_rx_type == FuriHalNfcTxRxTransparent) {
|
|
|
|
return furi_hal_nfc_transparent_tx_rx(tx_rx, timeout_ms);
|
|
|
|
}
|
|
|
|
|
2022-03-23 22:14:34 +00:00
|
|
|
// Prepare data for FIFO if necessary
|
2022-04-19 15:23:58 +00:00
|
|
|
uint32_t flags = furi_hal_nfc_tx_rx_get_flag(tx_rx->tx_rx_type);
|
|
|
|
if(tx_rx->tx_rx_type == FuriHalNfcTxRxTypeRaw) {
|
2022-03-23 22:14:34 +00:00
|
|
|
temp_tx_bits = furi_hal_nfc_data_and_parity_to_bitstream(
|
2022-04-19 15:23:58 +00:00
|
|
|
tx_rx->tx_data, tx_rx->tx_bits / 8, tx_rx->tx_parity, temp_tx_buff);
|
2022-03-23 22:14:34 +00:00
|
|
|
ret = rfalNfcDataExchangeCustomStart(
|
2022-04-19 15:23:58 +00:00
|
|
|
temp_tx_buff, temp_tx_bits, &temp_rx_buff, &temp_rx_bits, RFAL_FWT_NONE, flags);
|
2022-03-23 22:14:34 +00:00
|
|
|
} else {
|
|
|
|
ret = rfalNfcDataExchangeCustomStart(
|
2022-04-19 15:23:58 +00:00
|
|
|
tx_rx->tx_data, tx_rx->tx_bits, &temp_rx_buff, &temp_rx_bits, RFAL_FWT_NONE, flags);
|
2022-03-23 22:14:34 +00:00
|
|
|
}
|
2021-09-10 02:19:02 +00:00
|
|
|
if(ret != ERR_NONE) {
|
2022-04-19 15:23:58 +00:00
|
|
|
FURI_LOG_E(TAG, "Failed to start data exchange");
|
2022-03-23 22:14:34 +00:00
|
|
|
return false;
|
2021-09-10 02:19:02 +00:00
|
|
|
}
|
2022-06-09 08:35:34 +00:00
|
|
|
|
|
|
|
if(tx_rx->sniff_tx) {
|
|
|
|
bool crc_dropped = !(flags & RFAL_TXRX_FLAGS_CRC_TX_MANUAL);
|
|
|
|
tx_rx->sniff_tx(tx_rx->tx_data, tx_rx->tx_bits, crc_dropped, tx_rx->sniff_context);
|
|
|
|
}
|
|
|
|
|
2021-09-10 02:19:02 +00:00
|
|
|
uint32_t start = DWT->CYCCNT;
|
|
|
|
while(state != RFAL_NFC_STATE_DATAEXCHANGE_DONE) {
|
|
|
|
rfalNfcWorker();
|
|
|
|
state = rfalNfcGetState();
|
|
|
|
ret = rfalNfcDataExchangeGetStatus();
|
|
|
|
if(ret == ERR_BUSY) {
|
2022-04-19 15:23:58 +00:00
|
|
|
if(DWT->CYCCNT - start > timeout_ms * clocks_in_ms) {
|
|
|
|
FURI_LOG_D(TAG, "Timeout during data exchange");
|
2022-03-23 22:14:34 +00:00
|
|
|
return false;
|
2021-09-10 02:19:02 +00:00
|
|
|
}
|
|
|
|
continue;
|
|
|
|
} else {
|
|
|
|
start = DWT->CYCCNT;
|
|
|
|
}
|
2022-07-20 10:56:33 +00:00
|
|
|
furi_delay_tick(1);
|
2021-09-10 02:19:02 +00:00
|
|
|
}
|
2022-03-23 22:14:34 +00:00
|
|
|
|
2022-05-24 14:00:15 +00:00
|
|
|
if(tx_rx->tx_rx_type == FuriHalNfcTxRxTypeRaw ||
|
|
|
|
tx_rx->tx_rx_type == FuriHalNfcTxRxTypeRxRaw) {
|
2022-04-19 15:23:58 +00:00
|
|
|
tx_rx->rx_bits = 8 * furi_hal_nfc_bitstream_to_data_and_parity(
|
|
|
|
temp_rx_buff, *temp_rx_bits, tx_rx->rx_data, tx_rx->rx_parity);
|
2022-03-23 22:14:34 +00:00
|
|
|
} else {
|
2022-04-19 15:23:58 +00:00
|
|
|
memcpy(tx_rx->rx_data, temp_rx_buff, MIN(*temp_rx_bits / 8, FURI_HAL_NFC_DATA_BUFF_SIZE));
|
|
|
|
tx_rx->rx_bits = *temp_rx_bits;
|
2021-09-10 02:19:02 +00:00
|
|
|
}
|
2022-03-23 22:14:34 +00:00
|
|
|
|
2022-06-09 08:35:34 +00:00
|
|
|
if(tx_rx->sniff_rx) {
|
|
|
|
bool crc_dropped = !(flags & RFAL_TXRX_FLAGS_CRC_RX_KEEP);
|
|
|
|
tx_rx->sniff_rx(tx_rx->rx_data, tx_rx->rx_bits, crc_dropped, tx_rx->sniff_context);
|
|
|
|
}
|
|
|
|
|
2022-03-23 22:14:34 +00:00
|
|
|
return true;
|
2021-09-10 02:19:02 +00:00
|
|
|
}
|
|
|
|
|
2022-06-09 08:35:34 +00:00
|
|
|
bool furi_hal_nfc_tx_rx_full(FuriHalNfcTxRxContext* tx_rx) {
|
2022-04-19 15:23:58 +00:00
|
|
|
uint16_t part_len_bytes;
|
|
|
|
|
2022-06-09 08:35:34 +00:00
|
|
|
if(!furi_hal_nfc_tx_rx(tx_rx, 1000)) {
|
|
|
|
return false;
|
2022-04-19 15:23:58 +00:00
|
|
|
}
|
2022-06-09 08:35:34 +00:00
|
|
|
while(tx_rx->rx_bits && tx_rx->rx_data[0] == 0xAF) {
|
|
|
|
FuriHalNfcTxRxContext tmp = *tx_rx;
|
|
|
|
tmp.tx_data[0] = 0xAF;
|
|
|
|
tmp.tx_bits = 8;
|
|
|
|
if(!furi_hal_nfc_tx_rx(&tmp, 1000)) {
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
part_len_bytes = tmp.rx_bits / 8;
|
|
|
|
if(part_len_bytes > FURI_HAL_NFC_DATA_BUFF_SIZE - tx_rx->rx_bits / 8) {
|
|
|
|
FURI_LOG_W(TAG, "Overrun rx buf");
|
|
|
|
return false;
|
2022-04-19 15:23:58 +00:00
|
|
|
}
|
|
|
|
if(part_len_bytes == 0) {
|
2022-06-09 08:35:34 +00:00
|
|
|
FURI_LOG_W(TAG, "Empty 0xAF response");
|
|
|
|
return false;
|
2022-04-19 15:23:58 +00:00
|
|
|
}
|
2022-06-09 08:35:34 +00:00
|
|
|
memcpy(tx_rx->rx_data + tx_rx->rx_bits / 8, tmp.rx_data + 1, part_len_bytes - 1);
|
|
|
|
tx_rx->rx_data[0] = tmp.rx_data[0];
|
|
|
|
tx_rx->rx_bits += 8 * (part_len_bytes - 1);
|
2022-04-19 15:23:58 +00:00
|
|
|
}
|
|
|
|
|
2022-06-09 08:35:34 +00:00
|
|
|
return true;
|
2022-04-19 15:23:58 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
void furi_hal_nfc_sleep() {
|
2021-09-10 02:19:02 +00:00
|
|
|
rfalNfcDeactivate(false);
|
|
|
|
rfalLowPowerModeStart();
|
|
|
|
}
|