2021-09-10 02:19:02 +00:00
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#pragma once
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#include <furi.h>
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#include <stm32wbxx.h>
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#include <stm32wbxx_ll_gpio.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Input Related Constants */
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2022-11-12 08:46:04 +00:00
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#define INPUT_DEBOUNCE_TICKS 4
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2021-09-10 02:19:02 +00:00
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/* Input Keys */
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typedef enum {
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InputKeyUp,
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InputKeyDown,
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InputKeyRight,
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InputKeyLeft,
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InputKeyOk,
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InputKeyBack,
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2022-11-02 14:36:17 +00:00
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InputKeyMAX, /**< Special value */
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2021-09-10 02:19:02 +00:00
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} InputKey;
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/* Light */
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typedef enum {
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2022-06-09 07:33:46 +00:00
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LightRed = (1 << 0),
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LightGreen = (1 << 1),
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LightBlue = (1 << 2),
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LightBacklight = (1 << 3),
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2021-09-10 02:19:02 +00:00
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} Light;
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typedef struct {
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2022-03-30 15:23:40 +00:00
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const GpioPin* gpio;
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2021-09-10 02:19:02 +00:00
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const InputKey key;
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const bool inverted;
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const char* name;
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} InputPin;
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2022-03-30 15:23:40 +00:00
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extern const InputPin input_pins[];
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extern const size_t input_pins_count;
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2021-09-10 02:19:02 +00:00
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extern const GpioPin vibro_gpio;
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extern const GpioPin ibutton_gpio;
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extern const GpioPin gpio_cc1101_g0;
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extern const GpioPin gpio_rf_sw_0;
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extern const GpioPin gpio_subghz_cs;
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extern const GpioPin gpio_display_cs;
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[FL-2399, FL-2261] Tickless sleep shenanigans (#1168)
* Disable USART in sleep
* Restore UART state on suspend/resume
* FuriHal: Enable stop mode and add insomnia to I2C and SPI
* Remove IDLE interrupt
* FuriHal: add FPU isr and disable all FPU interrupt, add core2 stop mode configuration on deep sleep
* FuriHal: tie stop mode debug with debug rtc flag
* FuriHal: adjust flash latency on clock switch, tie mcu debug with RTC debug flag
* FuriHal: move resource init to early stage
* Add EXTI pending check, enable debug traps with compile-time flag
* Wrap sleep debug functions in conditional compilation
* Remove erroneous changed
* Do not use CSS, remove it from everywhere
* Enable/disable USB on VBUS connect (prototype)
* FuriHal: add LPMS and DEEPSLEEP magic, workaround state inconsistency between cores
* FuriHal: honor c1 LMPS
* USB mode switch fix
* Applications: add flags and insomnia bypass system
* Correct spelling
* FuriHal: cleanup insomnia usage, reset sleep flags on wakeup, add shutdown api
* FuriHal: extra check on reinit request
* FuriHal: rename gpio_display_rst pin to gpio_display_rst_n
* FuriHal: add debug HAL
* FuriHal: add some magic to core2 reload procedure, fix issue with crash on ble keyboard exit
* FuriHal: cleanup ble glue, add BLE_GLUE_DEBUG flag
* FuriHal: ble reinit API, move os timer to LPTIM1 for deep sleep capability, shutdown that works
* FuriHal: take insomnia while shutdown
* Remove USB switch on/off on VBUS change
* Better tick skew handling
* Improve tick consistency under load
* Add USB_HP dummy IRQ handler
* Move interrupt check closer to sleep
* Clean up includes
* Re-enable Insomnia globally
* FuriHal: enable CSS
* FuriHal: remove questionable core2 clock shenanigans
* FuriHal: use core1 RCC registers in idle timer config
* FuriHal: return back CSS handlers, add lptim isr dispatching
Co-authored-by: Aleksandr Kutuzov <alleteam@gmail.com>
Co-authored-by: nminaylov <nm29719@gmail.com>
2022-04-29 13:29:51 +00:00
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extern const GpioPin gpio_display_rst_n;
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2021-09-10 02:19:02 +00:00
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extern const GpioPin gpio_display_di;
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extern const GpioPin gpio_sdcard_cs;
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2022-03-30 15:23:40 +00:00
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extern const GpioPin gpio_sdcard_cd;
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2021-09-10 02:19:02 +00:00
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extern const GpioPin gpio_nfc_cs;
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2022-04-13 20:50:25 +00:00
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extern const GpioPin gpio_button_up;
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extern const GpioPin gpio_button_down;
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extern const GpioPin gpio_button_right;
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extern const GpioPin gpio_button_left;
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extern const GpioPin gpio_button_ok;
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extern const GpioPin gpio_button_back;
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2021-09-10 02:19:02 +00:00
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extern const GpioPin gpio_spi_d_miso;
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extern const GpioPin gpio_spi_d_mosi;
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extern const GpioPin gpio_spi_d_sck;
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extern const GpioPin gpio_spi_r_miso;
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extern const GpioPin gpio_spi_r_mosi;
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extern const GpioPin gpio_spi_r_sck;
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extern const GpioPin gpio_ext_pc0;
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extern const GpioPin gpio_ext_pc1;
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extern const GpioPin gpio_ext_pc3;
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extern const GpioPin gpio_ext_pb2;
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extern const GpioPin gpio_ext_pb3;
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extern const GpioPin gpio_ext_pa4;
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extern const GpioPin gpio_ext_pa6;
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extern const GpioPin gpio_ext_pa7;
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2022-06-20 14:54:48 +00:00
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extern const GpioPin gpio_nfc_irq_rfid_pull;
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2021-09-10 02:19:02 +00:00
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extern const GpioPin gpio_rfid_carrier_out;
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extern const GpioPin gpio_rfid_data_in;
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extern const GpioPin gpio_rfid_carrier;
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2022-02-25 15:22:58 +00:00
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extern const GpioPin gpio_infrared_rx;
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extern const GpioPin gpio_infrared_tx;
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2021-09-10 02:19:02 +00:00
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extern const GpioPin gpio_usart_tx;
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extern const GpioPin gpio_usart_rx;
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2021-11-28 18:28:19 +00:00
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extern const GpioPin gpio_i2c_power_sda;
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extern const GpioPin gpio_i2c_power_scl;
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2022-03-23 17:59:20 +00:00
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extern const GpioPin gpio_speaker;
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2022-03-30 15:23:40 +00:00
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extern const GpioPin periph_power;
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2022-04-13 20:50:25 +00:00
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extern const GpioPin gpio_usb_dm;
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extern const GpioPin gpio_usb_dp;
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2022-03-30 15:23:40 +00:00
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#define BUTTON_BACK_GPIO_Port GPIOC
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#define BUTTON_BACK_Pin LL_GPIO_PIN_13
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#define BUTTON_DOWN_GPIO_Port GPIOC
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#define BUTTON_DOWN_Pin LL_GPIO_PIN_6
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#define BUTTON_LEFT_GPIO_Port GPIOB
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#define BUTTON_LEFT_Pin LL_GPIO_PIN_11
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#define BUTTON_OK_GPIO_Port GPIOH
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#define BUTTON_OK_Pin LL_GPIO_PIN_3
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#define BUTTON_RIGHT_GPIO_Port GPIOB
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#define BUTTON_RIGHT_Pin LL_GPIO_PIN_12
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#define BUTTON_UP_GPIO_Port GPIOB
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#define BUTTON_UP_Pin LL_GPIO_PIN_10
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#define CC1101_CS_GPIO_Port GPIOD
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#define CC1101_CS_Pin LL_GPIO_PIN_0
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#define CC1101_G0_GPIO_Port GPIOA
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#define CC1101_G0_Pin LL_GPIO_PIN_1
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#define DISPLAY_CS_GPIO_Port GPIOC
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#define DISPLAY_CS_Pin LL_GPIO_PIN_11
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#define DISPLAY_DI_GPIO_Port GPIOB
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#define DISPLAY_DI_Pin LL_GPIO_PIN_1
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#define DISPLAY_RST_GPIO_Port GPIOB
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#define DISPLAY_RST_Pin LL_GPIO_PIN_0
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#define IR_RX_GPIO_Port GPIOA
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#define IR_RX_Pin LL_GPIO_PIN_0
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#define IR_TX_GPIO_Port GPIOB
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#define IR_TX_Pin LL_GPIO_PIN_9
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#define NFC_CS_GPIO_Port GPIOE
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#define NFC_CS_Pin LL_GPIO_PIN_4
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#define PA4_GPIO_Port GPIOA
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#define PA4_Pin LL_GPIO_PIN_4
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#define PA6_GPIO_Port GPIOA
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#define PA6_Pin LL_GPIO_PIN_6
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#define PA7_GPIO_Port GPIOA
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#define PA7_Pin LL_GPIO_PIN_7
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#define PB2_GPIO_Port GPIOB
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#define PB2_Pin LL_GPIO_PIN_2
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#define PB3_GPIO_Port GPIOB
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#define PB3_Pin LL_GPIO_PIN_3
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#define PC0_GPIO_Port GPIOC
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#define PC0_Pin LL_GPIO_PIN_0
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#define PC1_GPIO_Port GPIOC
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#define PC1_Pin LL_GPIO_PIN_1
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#define PC3_GPIO_Port GPIOC
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#define PC3_Pin LL_GPIO_PIN_3
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#define QUARTZ_32MHZ_IN_GPIO_Port GPIOC
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#define QUARTZ_32MHZ_IN_Pin LL_GPIO_PIN_14
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#define QUARTZ_32MHZ_OUT_GPIO_Port GPIOC
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#define QUARTZ_32MHZ_OUT_Pin LL_GPIO_PIN_15
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#define RFID_OUT_GPIO_Port GPIOB
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#define RFID_OUT_Pin LL_GPIO_PIN_13
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#define RFID_PULL_GPIO_Port GPIOA
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#define RFID_PULL_Pin LL_GPIO_PIN_2
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#define RFID_RF_IN_GPIO_Port GPIOC
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#define RFID_RF_IN_Pin LL_GPIO_PIN_5
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#define RFID_CARRIER_GPIO_Port GPIOA
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#define RFID_CARRIER_Pin LL_GPIO_PIN_15
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#define RF_SW_0_GPIO_Port GPIOC
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#define RF_SW_0_Pin LL_GPIO_PIN_4
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#define SD_CD_GPIO_Port GPIOC
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#define SD_CD_Pin LL_GPIO_PIN_10
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#define SD_CS_GPIO_Port GPIOC
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#define SD_CS_Pin LL_GPIO_PIN_12
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#define SPEAKER_GPIO_Port GPIOB
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#define SPEAKER_Pin LL_GPIO_PIN_8
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#define VIBRO_GPIO_Port GPIOA
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#define VIBRO_Pin LL_GPIO_PIN_8
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#define iBTN_GPIO_Port GPIOB
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#define iBTN_Pin LL_GPIO_PIN_14
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#define USART1_TX_Pin LL_GPIO_PIN_6
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#define USART1_TX_Port GPIOB
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#define USART1_RX_Pin LL_GPIO_PIN_7
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#define USART1_RX_Port GPIOB
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#define SPI_D_MISO_GPIO_Port GPIOC
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#define SPI_D_MISO_Pin LL_GPIO_PIN_2
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#define SPI_D_MOSI_GPIO_Port GPIOB
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#define SPI_D_MOSI_Pin LL_GPIO_PIN_15
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#define SPI_D_SCK_GPIO_Port GPIOD
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#define SPI_D_SCK_Pin LL_GPIO_PIN_1
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#define SPI_R_MISO_GPIO_Port GPIOB
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#define SPI_R_MISO_Pin LL_GPIO_PIN_4
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#define SPI_R_MOSI_GPIO_Port GPIOB
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#define SPI_R_MOSI_Pin LL_GPIO_PIN_5
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#define SPI_R_SCK_GPIO_Port GPIOA
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#define SPI_R_SCK_Pin LL_GPIO_PIN_5
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#define NFC_IRQ_Pin RFID_PULL_Pin
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#define NFC_IRQ_GPIO_Port RFID_PULL_GPIO_Port
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2022-04-13 20:50:25 +00:00
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void furi_hal_resources_init_early();
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void furi_hal_resources_deinit_early();
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void furi_hal_resources_init();
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2022-03-29 17:37:23 +00:00
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2021-09-10 02:19:02 +00:00
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#ifdef __cplusplus
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}
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#endif
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