2021-08-08 18:03:25 +00:00
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#include "furi-hal-spi.h"
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2021-08-12 08:48:05 +00:00
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#include "furi-hal-resources.h"
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2021-05-18 09:23:14 +00:00
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#include <stdbool.h>
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#include <string.h>
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#include <furi.h>
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2021-08-12 08:48:05 +00:00
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#include <stm32wbxx_ll_spi.h>
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#include <stm32wbxx_ll_utils.h>
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#include <stm32wbxx_ll_cortex.h>
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2021-05-18 09:23:14 +00:00
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2021-11-12 13:04:35 +00:00
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#define TAG "FuriHalSpi"
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2021-08-08 18:03:25 +00:00
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void furi_hal_spi_init() {
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2021-11-30 12:09:43 +00:00
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furi_hal_spi_bus_init(&furi_hal_spi_bus_r);
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furi_hal_spi_bus_init(&furi_hal_spi_bus_d);
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2021-08-12 08:48:05 +00:00
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2021-11-30 12:09:43 +00:00
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furi_hal_spi_bus_handle_init(&furi_hal_spi_bus_handle_subghz);
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furi_hal_spi_bus_handle_init(&furi_hal_spi_bus_handle_nfc);
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furi_hal_spi_bus_handle_init(&furi_hal_spi_bus_handle_display);
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furi_hal_spi_bus_handle_init(&furi_hal_spi_bus_handle_sd_fast);
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furi_hal_spi_bus_handle_init(&furi_hal_spi_bus_handle_sd_slow);
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2021-08-12 08:48:05 +00:00
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2021-11-12 13:04:35 +00:00
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FURI_LOG_I(TAG, "Init OK");
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2021-05-18 09:23:14 +00:00
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}
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2021-11-30 12:09:43 +00:00
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void furi_hal_spi_bus_init(FuriHalSpiBus* bus) {
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2021-05-18 09:23:14 +00:00
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furi_assert(bus);
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2021-11-30 12:09:43 +00:00
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bus->callback(bus, FuriHalSpiBusEventInit);
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2021-05-18 09:23:14 +00:00
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}
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2021-11-30 12:09:43 +00:00
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void furi_hal_spi_bus_deinit(FuriHalSpiBus* bus) {
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2021-05-18 09:23:14 +00:00
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furi_assert(bus);
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2021-11-30 12:09:43 +00:00
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bus->callback(bus, FuriHalSpiBusEventDeinit);
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2021-05-18 09:23:14 +00:00
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}
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2021-11-30 12:09:43 +00:00
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void furi_hal_spi_bus_handle_init(FuriHalSpiBusHandle* handle) {
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furi_assert(handle);
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handle->callback(handle, FuriHalSpiBusHandleEventInit);
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}
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2021-05-26 15:42:12 +00:00
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2021-11-30 12:09:43 +00:00
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void furi_hal_spi_bus_handle_deinit(FuriHalSpiBusHandle* handle) {
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furi_assert(handle);
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handle->callback(handle, FuriHalSpiBusHandleEventDeinit);
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2021-05-26 15:42:12 +00:00
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}
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2021-11-30 12:09:43 +00:00
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void furi_hal_spi_acquire(FuriHalSpiBusHandle* handle) {
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furi_assert(handle);
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handle->bus->callback(handle->bus, FuriHalSpiBusEventLock);
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handle->bus->callback(handle->bus, FuriHalSpiBusEventActivate);
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furi_assert(handle->bus->current_handle == NULL);
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handle->bus->current_handle = handle;
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handle->callback(handle, FuriHalSpiBusHandleEventActivate);
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}
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void furi_hal_spi_release(FuriHalSpiBusHandle* handle) {
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furi_assert(handle);
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furi_assert(handle->bus->current_handle == handle);
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// Handle event and unset handle
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handle->callback(handle, FuriHalSpiBusHandleEventDeactivate);
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handle->bus->current_handle = NULL;
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// Bus events
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handle->bus->callback(handle->bus, FuriHalSpiBusEventDeactivate);
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handle->bus->callback(handle->bus, FuriHalSpiBusEventUnlock);
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}
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static void furi_hal_spi_bus_end_txrx(FuriHalSpiBusHandle* handle, uint32_t timeout) {
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while(LL_SPI_GetTxFIFOLevel(handle->bus->spi) != LL_SPI_TX_FIFO_EMPTY);
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while(LL_SPI_IsActiveFlag_BSY(handle->bus->spi));
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while(LL_SPI_GetRxFIFOLevel(handle->bus->spi) != LL_SPI_RX_FIFO_EMPTY) {
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LL_SPI_ReceiveData8(handle->bus->spi);
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2021-08-12 08:48:05 +00:00
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}
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2021-05-26 15:42:12 +00:00
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}
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2021-11-30 12:09:43 +00:00
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bool furi_hal_spi_bus_rx(FuriHalSpiBusHandle* handle, uint8_t* buffer, size_t size, uint32_t timeout) {
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furi_assert(handle);
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furi_assert(handle->bus->current_handle == handle);
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2021-05-18 09:23:14 +00:00
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furi_assert(buffer);
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furi_assert(size > 0);
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2021-11-30 12:09:43 +00:00
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return furi_hal_spi_bus_trx(handle, buffer, buffer, size, timeout);
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2021-05-18 09:23:14 +00:00
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}
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2021-11-30 12:09:43 +00:00
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bool furi_hal_spi_bus_tx(FuriHalSpiBusHandle* handle, uint8_t* buffer, size_t size, uint32_t timeout) {
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furi_assert(handle);
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furi_assert(handle->bus->current_handle == handle);
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2021-05-18 09:23:14 +00:00
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furi_assert(buffer);
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furi_assert(size > 0);
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2021-08-12 08:48:05 +00:00
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bool ret = true;
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while(size > 0) {
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2021-11-30 12:09:43 +00:00
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if (LL_SPI_IsActiveFlag_TXE(handle->bus->spi)) {
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LL_SPI_TransmitData8(handle->bus->spi, *buffer);
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2021-08-12 08:48:05 +00:00
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buffer++;
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size--;
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}
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}
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2021-05-18 09:23:14 +00:00
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2021-11-30 12:09:43 +00:00
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furi_hal_spi_bus_end_txrx(handle, timeout);
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LL_SPI_ClearFlag_OVR(handle->bus->spi);
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2021-05-18 09:23:14 +00:00
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2021-08-12 08:48:05 +00:00
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return ret;
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2021-05-18 09:23:14 +00:00
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}
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2021-11-30 12:09:43 +00:00
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bool furi_hal_spi_bus_trx(FuriHalSpiBusHandle* handle, uint8_t* tx_buffer, uint8_t* rx_buffer, size_t size, uint32_t timeout) {
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furi_assert(handle);
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furi_assert(handle->bus->current_handle == handle);
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2021-05-18 09:23:14 +00:00
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furi_assert(tx_buffer);
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furi_assert(rx_buffer);
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furi_assert(size > 0);
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2021-08-12 08:48:05 +00:00
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bool ret = true;
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size_t tx_size = size;
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bool tx_allowed = true;
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while(size > 0) {
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2021-11-30 12:09:43 +00:00
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if(tx_size > 0 && LL_SPI_IsActiveFlag_TXE(handle->bus->spi) && tx_allowed) {
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LL_SPI_TransmitData8(handle->bus->spi, *tx_buffer);
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2021-08-12 08:48:05 +00:00
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tx_buffer++;
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tx_size--;
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tx_allowed = false;
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}
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2021-11-30 12:09:43 +00:00
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if(LL_SPI_IsActiveFlag_RXNE(handle->bus->spi)) {
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*rx_buffer = LL_SPI_ReceiveData8(handle->bus->spi);
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2021-08-12 08:48:05 +00:00
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rx_buffer++;
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size--;
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tx_allowed = true;
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}
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}
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2021-11-30 12:09:43 +00:00
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furi_hal_spi_bus_end_txrx(handle, timeout);
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2021-05-18 09:23:14 +00:00
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return ret;
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}
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