[FL-2399, FL-2261] Tickless sleep shenanigans (#1168)
* Disable USART in sleep * Restore UART state on suspend/resume * FuriHal: Enable stop mode and add insomnia to I2C and SPI * Remove IDLE interrupt * FuriHal: add FPU isr and disable all FPU interrupt, add core2 stop mode configuration on deep sleep * FuriHal: tie stop mode debug with debug rtc flag * FuriHal: adjust flash latency on clock switch, tie mcu debug with RTC debug flag * FuriHal: move resource init to early stage * Add EXTI pending check, enable debug traps with compile-time flag * Wrap sleep debug functions in conditional compilation * Remove erroneous changed * Do not use CSS, remove it from everywhere * Enable/disable USB on VBUS connect (prototype) * FuriHal: add LPMS and DEEPSLEEP magic, workaround state inconsistency between cores * FuriHal: honor c1 LMPS * USB mode switch fix * Applications: add flags and insomnia bypass system * Correct spelling * FuriHal: cleanup insomnia usage, reset sleep flags on wakeup, add shutdown api * FuriHal: extra check on reinit request * FuriHal: rename gpio_display_rst pin to gpio_display_rst_n * FuriHal: add debug HAL * FuriHal: add some magic to core2 reload procedure, fix issue with crash on ble keyboard exit * FuriHal: cleanup ble glue, add BLE_GLUE_DEBUG flag * FuriHal: ble reinit API, move os timer to LPTIM1 for deep sleep capability, shutdown that works * FuriHal: take insomnia while shutdown * Remove USB switch on/off on VBUS change * Better tick skew handling * Improve tick consistency under load * Add USB_HP dummy IRQ handler * Move interrupt check closer to sleep * Clean up includes * Re-enable Insomnia globally * FuriHal: enable CSS * FuriHal: remove questionable core2 clock shenanigans * FuriHal: use core1 RCC registers in idle timer config * FuriHal: return back CSS handlers, add lptim isr dispatching Co-authored-by: Aleksandr Kutuzov <alleteam@gmail.com> Co-authored-by: nminaylov <nm29719@gmail.com>
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@@ -1,5 +1,6 @@
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#include <furi_hal_rtc.h>
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#include <furi_hal_light.h>
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#include <furi_hal_debug.h>
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#include <stm32wbxx_ll_bus.h>
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#include <stm32wbxx_ll_pwr.h>
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@@ -36,7 +37,6 @@ void furi_hal_rtc_init_early() {
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// LSE and RTC
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LL_PWR_EnableBkUpAccess();
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if(!RTC_CLOCK_IS_READY()) {
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// Start LSI1 needed for CSS
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LL_RCC_LSI1_Enable();
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// Try to start LSE normal way
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LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_HIGH);
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@@ -55,8 +55,6 @@ void furi_hal_rtc_init_early() {
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}
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// Set RTC domain clock to LSE
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LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE);
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// Enable LSE CSS
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LL_RCC_LSE_EnableCSS();
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}
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// Enable clocking
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LL_RCC_EnableRTC();
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@@ -74,6 +72,12 @@ void furi_hal_rtc_init_early() {
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data->version = FURI_HAL_RTC_HEADER_VERSION;
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furi_hal_rtc_set_register(FuriHalRtcRegisterHeader, data_reg);
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}
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if(furi_hal_rtc_is_flag_set(FuriHalRtcFlagDebug)) {
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furi_hal_debug_enable();
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} else {
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furi_hal_debug_disable();
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}
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}
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void furi_hal_rtc_deinit_early() {
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@@ -126,6 +130,10 @@ void furi_hal_rtc_set_flag(FuriHalRtcFlag flag) {
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DeveloperReg* data = (DeveloperReg*)&data_reg;
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data->flags |= flag;
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furi_hal_rtc_set_register(FuriHalRtcRegisterSystem, data_reg);
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if(flag & FuriHalRtcFlagDebug) {
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furi_hal_debug_enable();
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}
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}
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void furi_hal_rtc_reset_flag(FuriHalRtcFlag flag) {
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@@ -133,6 +141,10 @@ void furi_hal_rtc_reset_flag(FuriHalRtcFlag flag) {
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DeveloperReg* data = (DeveloperReg*)&data_reg;
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data->flags &= ~flag;
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furi_hal_rtc_set_register(FuriHalRtcRegisterSystem, data_reg);
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if(flag & FuriHalRtcFlagDebug) {
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furi_hal_debug_disable();
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}
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}
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bool furi_hal_rtc_is_flag_set(FuriHalRtcFlag flag) {
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