From 1b85fa69af93371124252133df66fc4f1ee67112 Mon Sep 17 00:00:00 2001 From: DrZlo13 Date: Tue, 13 Oct 2020 21:55:04 +1000 Subject: [PATCH] Build firmware for target without bootloader (#173) * fixed inline functions for modern C standart * Build firmware for mcu without bootloader --- .../targets/f2/STM32L476RGTx_FLASH_NO_BOOT.ld | 204 ++++++++++++++++++ firmware/targets/f2/Src/system_stm32l4xx.c | 21 +- firmware/targets/f2/target.mk | 14 ++ 3 files changed, 232 insertions(+), 7 deletions(-) create mode 100644 firmware/targets/f2/STM32L476RGTx_FLASH_NO_BOOT.ld diff --git a/firmware/targets/f2/STM32L476RGTx_FLASH_NO_BOOT.ld b/firmware/targets/f2/STM32L476RGTx_FLASH_NO_BOOT.ld new file mode 100644 index 00000000..ad48c14f --- /dev/null +++ b/firmware/targets/f2/STM32L476RGTx_FLASH_NO_BOOT.ld @@ -0,0 +1,204 @@ +/* +****************************************************************************** +** + +** File : LinkerScript.ld +** +** Author : Auto-generated by System Workbench for STM32 +** +** Abstract : Linker script for STM32L476RGTx series +** 1024Kbytes FLASH and 128Kbytes RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Distribution: The file is distributed “as is,” without any warranty +** of any kind. +** +***************************************************************************** +** @attention +** +**

© COPYRIGHT(c) 2019 STMicroelectronics

+** +** Redistribution and use in source and binary forms, with or without modification, +** are permitted provided that the following conditions are met: +** 1. Redistributions of source code must retain the above copyright notice, +** this list of conditions and the following disclaimer. +** 2. Redistributions in binary form must reproduce the above copyright notice, +** this list of conditions and the following disclaimer in the documentation +** and/or other materials provided with the distribution. +** 3. Neither the name of STMicroelectronics nor the names of its contributors +** may be used to endorse or promote products derived from this software +** without specific prior written permission. +** +** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = 0x20018000; /* end of RAM */ +/* Generate a link error if heap and stack don't fit into RAM */ +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ + +/* Specify the memory areas */ +MEMORY +{ +RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 96K +RAM2 (xrw) : ORIGIN = 0x10000000, LENGTH = 32K +FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 1024K +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(8); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(8); + } >FLASH + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(8); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(8); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + /* Constant data goes into FLASH */ + .rodata : + { + . = ALIGN(8); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(8); + } >FLASH + + .ARM.extab : + { + . = ALIGN(8); + *(.ARM.extab* .gnu.linkonce.armextab.*) + . = ALIGN(8); + } >FLASH + .ARM : { + . = ALIGN(8); + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + . = ALIGN(8); + } >FLASH + + .preinit_array : + { + . = ALIGN(8); + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + . = ALIGN(8); + } >FLASH + + .init_array : + { + . = ALIGN(8); + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + . = ALIGN(8); + } >FLASH + .fini_array : + { + . = ALIGN(8); + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + . = ALIGN(8); + } >FLASH + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections goes into RAM, load LMA copy after code */ + .data : + { + . = ALIGN(8); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(8); + _edata = .; /* define a global symbol at data end */ + } >RAM AT> FLASH + + + /* Uninitialized data section */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough RAM left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + + + /* Remove information from the standard libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} + + diff --git a/firmware/targets/f2/Src/system_stm32l4xx.c b/firmware/targets/f2/Src/system_stm32l4xx.c index 6406ce5a..abe29aa3 100644 --- a/firmware/targets/f2/Src/system_stm32l4xx.c +++ b/firmware/targets/f2/Src/system_stm32l4xx.c @@ -123,25 +123,32 @@ /*!< Uncomment the following line if you need to relocate your vector Table in Internal SRAM. */ /* #define VECT_TAB_SRAM */ + +#ifdef NO_BOOTLOADER +#define VECT_TAB_OFFSET 0x0000 /*!< Vector Table base offset field. + This value must be a multiple of 0x200. */ +#else #define VECT_TAB_OFFSET 0x8000 /*!< Vector Table base offset field. This value must be a multiple of 0x200. */ -/******************************************************************************/ -/** +#endif + + /******************************************************************************/ + /** * @} */ -/** @addtogroup STM32L4xx_System_Private_Macros + /** @addtogroup STM32L4xx_System_Private_Macros * @{ */ -/** + /** * @} */ -/** @addtogroup STM32L4xx_System_Private_Variables + /** @addtogroup STM32L4xx_System_Private_Variables * @{ */ - /* The SystemCoreClock variable is updated in three ways: + /* The SystemCoreClock variable is updated in three ways: 1) by calling CMSIS function SystemCoreClockUpdate() 2) by calling HAL API function HAL_RCC_GetHCLKFreq() 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency @@ -149,7 +156,7 @@ is no need to call the 2 first functions listed above, since SystemCoreClock variable is updated automatically. */ - uint32_t SystemCoreClock = 4000000U; + uint32_t SystemCoreClock = 4000000U; const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U}; const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U}; diff --git a/firmware/targets/f2/target.mk b/firmware/targets/f2/target.mk index 3558d8a1..c30c0710 100644 --- a/firmware/targets/f2/target.mk +++ b/firmware/targets/f2/target.mk @@ -5,6 +5,15 @@ FW_ADDRESS = 0x08008000 OS_OFFSET = 0x00008000 FLASH_ADDRESS = 0x08008000 +NO_BOOTLOADER ?= 0 +ifeq ($(NO_BOOTLOADER), 1) +BOOT_ADDRESS = 0x08000000 +FW_ADDRESS = 0x08000000 +OS_OFFSET = 0x00000000 +FLASH_ADDRESS = 0x08000000 +CFLAGS += -DNO_BOOTLOADER +endif + BOOT_CFLAGS = -DBOOT_ADDRESS=$(BOOT_ADDRESS) -DFW_ADDRESS=$(FW_ADDRESS) -DOS_OFFSET=$(OS_OFFSET) MCU_FLAGS = -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard @@ -65,7 +74,12 @@ CFLAGS += \ -DHAVE_FREERTOS \ -DBUTON_INVERT=false \ -DDEBUG_UART=huart1 + +ifeq ($(NO_BOOTLOADER), 1) +LDFLAGS += -T$(TARGET_DIR)/STM32L476RGTx_FLASH_NO_BOOT.ld +else LDFLAGS += -T$(TARGET_DIR)/STM32L476RGTx_FLASH.ld +endif CFLAGS += \ -I$(TARGET_DIR)/Inc \