[FL-2366] HAL to LL migration part 2 (#1053)
* iButton, FuriHal: add onewire HAL, migrate to LL, add missing critical section guards * FuriHal: rename onewire to ibutton, cleanup RCC domain usage, fix ibutton and rfid * FuriHal: cleanup RCC usage
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@@ -164,12 +164,10 @@ void APPD_Init(void) {
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gpio_config.Pin = GPIO_PIN_15 | GPIO_PIN_14 | GPIO_PIN_13;
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__HAL_RCC_GPIOA_CLK_ENABLE();
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HAL_GPIO_Init(GPIOA, &gpio_config);
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__HAL_RCC_GPIOA_CLK_DISABLE();
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gpio_config.Pin = GPIO_PIN_4 | GPIO_PIN_3;
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__HAL_RCC_GPIOB_CLK_ENABLE();
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HAL_GPIO_Init(GPIOB, &gpio_config);
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__HAL_RCC_GPIOB_CLK_DISABLE();
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HAL_DBGMCU_DisableDBGSleepMode();
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HAL_DBGMCU_DisableDBGStopMode();
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@@ -354,4 +352,4 @@ void DbgOutputTraces(uint8_t* p_data, uint16_t size, void (*cb)(void)) {
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}
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#endif
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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@@ -159,8 +159,6 @@ void HW_IPCC_Enable(void) {
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* Such as IPCC IP available to the CPU2, it is required to keep the IPCC clock running
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when FUS is running on CPU2 and CPU1 enters deep sleep mode
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*/
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LL_C2_AHB3_GRP1_EnableClock(LL_C2_AHB3_GRP1_PERIPH_IPCC);
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/**
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* When the device is out of standby, it is required to use the EXTI mechanism to wakeup CPU2
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*/
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@@ -184,8 +182,6 @@ void HW_IPCC_Enable(void) {
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}
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void HW_IPCC_Init(void) {
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LL_AHB3_GRP1_EnableClock(LL_AHB3_GRP1_PERIPH_IPCC);
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LL_C1_IPCC_EnableIT_RXO(IPCC);
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LL_C1_IPCC_EnableIT_TXF(IPCC);
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