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[FL-2366] HAL to LL migration part 2 (#1053)

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* iButton, FuriHal: add onewire HAL, migrate to LL, add missing critical section guards
* FuriHal: rename onewire to ibutton, cleanup RCC domain usage, fix ibutton and rfid
* FuriHal: cleanup RCC usage
This commit is contained in:
あく
2022-03-25 13:33:01 +03:00
committed by GitHub
parent 3615ffecbe
commit 1fdc5f2950
21 changed files with 178 additions and 308 deletions
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41
firmware/targets/f7/furi_hal/furi_hal_clock.c
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@@ -98,33 +98,56 @@ void furi_hal_clock_init() {
LL_RCC_SetSMPSPrescaler(LL_RCC_SMPS_DIV_1);
LL_RCC_SetRFWKPClockSource(LL_RCC_RFWKP_CLKSOURCE_LSE);
// AHB1
LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMAMUX1);
// AHB1 GRP1
LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMA1);
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_I2C1);
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_SPI2);
LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMA2);
LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMAMUX1);
LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_CRC);
// LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_TSC);
// AHB2
// AHB2 GRP1
LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOA);
LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOB);
LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOC);
LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOD);
LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOE);
LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOH);
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI1);
LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_ADC);
LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_AES1);
// AHB3
// AHB3 GRP1
// LL_AHB3_GRP1_EnableClock(LL_AHB3_GRP1_PERIPH_QUADSPI);
LL_AHB3_GRP1_EnableClock(LL_AHB3_GRP1_PERIPH_PKA);
LL_AHB3_GRP1_EnableClock(LL_AHB3_GRP1_PERIPH_RNG);
LL_AHB3_GRP1_EnableClock(LL_AHB3_GRP1_PERIPH_AES2);
LL_AHB3_GRP1_EnableClock(LL_AHB3_GRP1_PERIPH_RNG);
LL_AHB3_GRP1_EnableClock(LL_AHB3_GRP1_PERIPH_HSEM);
LL_AHB3_GRP1_EnableClock(LL_AHB3_GRP1_PERIPH_IPCC);
LL_AHB3_GRP1_EnableClock(LL_AHB3_GRP1_PERIPH_FLASH);
// APB1
// APB1 GRP1
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM2);
// LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_LCD);
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_RTCAPB);
// LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_WWDG);
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_SPI2);
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_I2C1);
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_I2C3);
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_CRS);
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_USB);
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_LPTIM1);
// APB1 GRP2
LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_LPUART1);
LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_LPTIM2);
// APB2
// LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_ADC);
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_TIM1);
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI1);
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_USART1);
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_TIM16);
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_TIM17);
// LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SAI1);
FURI_LOG_I(TAG, "Init OK");
}