OpenOCD makefile integration and Charger IC initialization fixes. (#258)
* Makefile: start openocd from gdb, boot no boot version. * bq25896: reset before readout. Cleanup.
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@@ -61,14 +61,20 @@ typedef struct {
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static bq25896_regs_t bq25896_regs;
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void bq25896_init() {
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bq25896_read(0x00, (uint8_t*)&bq25896_regs, sizeof(bq25896_regs));
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bq25896_regs.r09.BATFET_DIS = 0;
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bq25896_write_reg(0x09, (uint8_t*)&bq25896_regs.r09);
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bq25896_regs.r14.REG_RST = 1;
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bq25896_write_reg(0x14, (uint8_t*)&bq25896_regs.r14);
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// Readout all registers
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bq25896_read(0x00, (uint8_t*)&bq25896_regs, sizeof(bq25896_regs));
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// Poll ADC forever
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bq25896_regs.r02.CONV_START = 1;
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bq25896_regs.r02.CONV_RATE = 1;
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bq25896_write_reg(0x02, (uint8_t*)&bq25896_regs.r02);
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bq25896_regs.r07.WATCHDOG = WatchdogDisable;
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bq25896_write_reg(0x07, (uint8_t*)&bq25896_regs.r07);
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bq25896_read(0x00, (uint8_t*)&bq25896_regs, sizeof(bq25896_regs));
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}
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@@ -78,6 +84,7 @@ void bq25896_poweroff() {
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}
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bool bq25896_is_charging() {
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bq25896_read(0x00, (uint8_t*)&bq25896_regs, sizeof(bq25896_regs));
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bq25896_read_reg(0x0B, (uint8_t*)&bq25896_regs.r0B);
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return bq25896_regs.r0B.CHRG_STAT != ChrgStatNo;
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}
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@@ -92,16 +99,7 @@ void bq25896_disable_otg() {
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bq25896_write_reg(0x03, (uint8_t*)&bq25896_regs.r03);
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}
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void bq25896_adc_sample() {
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bq25896_regs.r02.CONV_START = 1;
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bq25896_write_reg(0x02, (uint8_t*)&bq25896_regs.r02);
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while(bq25896_regs.r02.CONV_START == 1) {
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bq25896_read_reg(0x02, (uint8_t*)&bq25896_regs.r02);
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}
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}
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uint16_t bq25896_get_vbus_voltage() {
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bq25896_adc_sample();
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bq25896_read_reg(0x11, (uint8_t*)&bq25896_regs.r11);
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if (bq25896_regs.r11.VBUS_GD) {
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return (uint16_t)bq25896_regs.r11.VBUSV * 100 + 2600;
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@@ -111,25 +109,21 @@ uint16_t bq25896_get_vbus_voltage() {
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}
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uint16_t bq25896_get_vsys_voltage() {
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bq25896_adc_sample();
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bq25896_read_reg(0x0F, (uint8_t*)&bq25896_regs.r0F);
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return (uint16_t)bq25896_regs.r0F.SYSV * 20 + 2304;
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}
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uint16_t bq25896_get_vbat_voltage() {
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bq25896_adc_sample();
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bq25896_read_reg(0x0E, (uint8_t*)&bq25896_regs.r0E);
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return (uint16_t)bq25896_regs.r0E.BATV * 20 + 2304;
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}
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uint16_t bq25896_get_vbat_current() {
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bq25896_adc_sample();
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bq25896_read_reg(0x12, (uint8_t*)&bq25896_regs.r12);
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return (uint16_t)bq25896_regs.r12.ICHGR * 50;
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}
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uint32_t bq25896_get_ntc_mpct() {
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bq25896_adc_sample();
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bq25896_read_reg(0x10, (uint8_t*)&bq25896_regs.r10);
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return (uint32_t)bq25896_regs.r10.TSPCT * 465+21000;
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}
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@@ -9,12 +9,6 @@
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#define BQ25896_ADDRESS 0xD6
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typedef struct {
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uint8_t IINLIM:6; // Input Current Limit, mA, offset: +100mA
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bool EN_ILIM:1; // Enable ILIM Pin
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bool EN_HIZ:1; // Enable HIZ Mode
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} REG00;
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#define IILIM_1600 (1<<5)
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#define IILIM_800 (1<<4)
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#define IILIM_400 (1<<3)
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@@ -23,10 +17,11 @@ typedef struct {
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#define IILIM_50 (1<<0)
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typedef struct {
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uint8_t VINDPM_OS:5; // Input Voltage Limit Offset, mV
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bool BCOLD:1; // Boost Mode Cold Temperature Monitor Threshold
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uint8_t BHOT:2; // Boost Mode Hot Temperature Monitor Threshold
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} REG01;
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uint8_t IINLIM:6; // Input Current Limit, mA, offset: +100mA
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bool EN_ILIM:1; // Enable ILIM Pin
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bool EN_HIZ:1; // Enable HIZ Mode
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} REG00;
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#define VINDPM_OS_1600 (1<<4)
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#define VINDPM_OS_800 (1<<3)
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@@ -34,6 +29,19 @@ typedef struct {
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#define VINDPM_OS_200 (1<<1)
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#define VINDPM_OS_100 (1<<0)
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typedef enum {
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Bhot34 = 0b00, // – VBHOT1 Threshold (34.75%) (default)
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Bhot37 = 0b01, // – VBHOT0 Threshold (Typ. 37.75%)
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Bhot31 = 0b10, // – VBHOT2 Threshold (Typ. 31.25%)
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BhotDisable = 0b11, // – Disable boost mode thermal protection
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} Bhot;
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typedef struct {
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uint8_t VINDPM_OS:5; // Input Voltage Limit Offset, mV
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bool BCOLD:1; // Boost Mode Cold Temperature Monitor Threshold
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Bhot BHOT:2; // Boost Mode Hot Temperature Monitor Threshold
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} REG01;
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typedef struct {
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bool AUTO_DPDM_EN:1; // Automatic Input Detection Enable
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@@ -46,6 +54,10 @@ typedef struct {
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} REG02;
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#define SYS_MIN_400 (1<<2)
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#define SYS_MIN_200 (1<<1)
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#define SYS_MIN_100 (1<<0)
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typedef struct {
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bool MIN_VBAT_SEL:1; // Minimum Battery Voltage (falling) to exit boost mode
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uint8_t SYS_MIN:3; // Minimum System Voltage Limit, mV, offset: +3000mV
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@@ -55,14 +67,6 @@ typedef struct {
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bool BAT_LOADEN:1; // Battery Load (IBATLOAD) Enable
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} REG03;
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#define SYS_MIN_400 (1<<2)
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#define SYS_MIN_200 (1<<1)
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#define SYS_MIN_100 (1<<0)
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typedef struct {
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uint8_t ICHG:7; // Fast Charge Current Limit, mA
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bool EN_PUMPX:1; // Current pulse control Enable
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} REG04;
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#define ICHG_4096 (1<<6)
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#define ICHG_2048 (1<<5)
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@@ -73,9 +77,10 @@ typedef struct {
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#define ICHG_64 (1<<0)
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typedef struct {
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uint8_t ITERM:4; // Termination Current Limit, offset: +64mA
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uint8_t IPRECHG:4; // Precharge Current Limit, offset: +64mA
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} REG05;
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uint8_t ICHG:7; // Fast Charge Current Limit, mA
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bool EN_PUMPX:1; // Current pulse control Enable
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} REG04;
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#define IPRETERM_512 (1<<3)
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#define IPRETERM_256 (1<<2)
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@@ -83,10 +88,10 @@ typedef struct {
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#define IPRETERM_64 (1<<0)
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typedef struct {
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bool VRECHG:1; // Battery Recharge Threshold Offset
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bool BATLOWV:1; // Battery Precharge to Fast Charge Threshold
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uint8_t VREG:6; // Charge Voltage Limit, offset: +3840mV
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} REG06;
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uint8_t ITERM:4; // Termination Current Limit, offset: +64mA
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uint8_t IPRECHG:4; // Precharge Current Limit, offset: +64mA
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} REG05;
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#define VREG_512 (1<<5)
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#define VREG_256 (1<<4)
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@@ -95,30 +100,36 @@ typedef struct {
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#define VREG_32 (1<<1)
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#define VREG_16 (1<<0)
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typedef struct {
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bool VRECHG:1; // Battery Recharge Threshold Offset
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bool BATLOWV:1; // Battery Precharge to Fast Charge Threshold
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uint8_t VREG:6; // Charge Voltage Limit, offset: +3840mV
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} REG06;
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typedef enum {
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WatchdogDisable = 0b00,
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Watchdog40 = 0b01,
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Watchdog80 = 0b10,
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Watchdog160 = 0b11,
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} Watchdog;
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typedef enum {
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ChgTimer5 = 0b00,
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ChgTimer8 = 0b01,
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ChgTimer12 = 0b10,
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ChgTimer20 = 0b11,
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} ChgTimer;
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typedef struct {
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bool JEITA_ISET:1; // JEITA Low Temperature Current Setting
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uint8_t CHG_TIMER:2; // Fast Charge Timer Setting
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ChgTimer CHG_TIMER:2; // Fast Charge Timer Setting
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bool EN_TIMER:1; // Charging Safety Timer Enable
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uint8_t WATCHDOG:2; // I2C Watchdog Timer Setting
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Watchdog WATCHDOG:2; // I2C Watchdog Timer Setting
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bool STAT_DIS:1; // STAT Pin Disable
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bool EN_TERM:1; // Charging Termination Enable
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} REG07;
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#define WATCHDOG_DIS (0b00)
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#define WATCHDOG_40 (0b01)
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#define WATCHDOG_80 (0b10)
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#define WATCHDOG_160 (0b11)
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#define CHG_TIMER_5 (0b00)
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#define CHG_TIMER_8 (0b01)
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#define CHG_TIMER_12 (0b10)
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#define CHG_TIMER_20 (0b11)
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typedef struct {
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uint8_t TREG:2; // Thermal Regulation Threshold
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uint8_t VCLAMP:3; // IR Compensation Voltage Clamp
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uint8_t BAT_COMP:3; // IR Compensation Resistor Setting
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} REG08;
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#define BAT_COMP_80 (1<<2)
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#define BAT_COMP_40 (1<<1)
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@@ -133,6 +144,13 @@ typedef struct {
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#define TREG_100 (0b10)
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#define TREG_120 (0b11)
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typedef struct {
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uint8_t TREG:2; // Thermal Regulation Threshold
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uint8_t VCLAMP:3; // IR Compensation Voltage Clamp
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uint8_t BAT_COMP:3; // IR Compensation Resistor Setting
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} REG08;
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typedef struct {
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bool PUMPX_DN:1; // Current pulse control voltage down enable
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bool PUMPX_UP:1; // Current pulse control voltage up enable
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@@ -144,11 +162,6 @@ typedef struct {
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bool FORCE_ICO:1; // Force Start Input Current Optimizer
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} REG09;
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typedef struct {
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uint8_t BOOST_LIM:3; // Boost Mode Current Limit
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bool PFM_OTG_DIS:1; // PFM mode allowed in boost mode
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uint8_t BOOSTV:4; // Boost Mode Voltage Regulation, offset: +4550mV
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} REG0A;
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#define BOOSTV_512 (1<<3)
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#define BOOSTV_256 (1<<2)
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@@ -164,6 +177,12 @@ typedef struct {
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#define BOOST_LIM_2150 (0b110)
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#define BOOST_LIM_RSVD (0b111)
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typedef struct {
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uint8_t BOOST_LIM:3; // Boost Mode Current Limit
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bool PFM_OTG_DIS:1; // PFM mode allowed in boost mode
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uint8_t BOOSTV:4; // Boost Mode Voltage Regulation, offset: +4550mV
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} REG0A;
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typedef enum {
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VBusStatNo = 0b000,
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@@ -187,6 +206,7 @@ typedef struct {
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VBusStat VBUS_STAT:3; // VBUS Status register
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} REG0B;
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typedef enum {
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ChrgFaultNO = 0b00,
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ChrgFaultIN = 0b01,
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@@ -210,10 +230,6 @@ typedef struct {
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bool WATCHDOG_FAULT:1; // Watchdog Fault Status
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} REG0C;
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typedef struct {
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uint8_t VINDPM:7; // Absolute VINDPM Threshold, offset: +2600mV
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bool FORCE_VINDPM:1; // VINDPM Threshold Setting Method
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} REG0D;
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#define VINDPM_6400 (1<<6)
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#define VINDPM_3200 (1<<5)
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@@ -223,37 +239,49 @@ typedef struct {
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#define VINDPM_200 (1<<1)
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#define VINDPM_100 (1<<0)
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typedef struct {
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uint8_t VINDPM:7; // Absolute VINDPM Threshold, offset: +2600mV
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bool FORCE_VINDPM:1; // VINDPM Threshold Setting Method
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} REG0D;
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typedef struct {
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uint8_t BATV:7; // ADC conversion of Battery Voltage (VBAT), offset: +2304mV
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bool THERM_STAT:1; // Thermal Regulation Status
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} REG0E;
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typedef struct {
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uint8_t SYSV:7; // ADDC conversion of System Voltage (VSYS), offset: +2304mV
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uint8_t RES:1; // Reserved: Always reads 0
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} REG0F;
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typedef struct {
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uint8_t TSPCT:7; // ADC conversion of TS Voltage (TS) as percentage of REGN, offset: +21%
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uint8_t RES:1; // Reserved: Always reads 0
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} REG10;
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typedef struct {
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uint8_t VBUSV:7; // ADC conversion of VBUS voltage (VBUS), offset: +2600mV
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bool VBUS_GD:1; // VBUS Good Status
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} REG11;
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typedef struct {
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uint8_t ICHGR:7; // ADC conversion of Charge Current (IBAT) when VBAT > VBATSHORT
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uint8_t RES:1; // Reserved: Always reads 0
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} REG12;
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typedef struct {
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uint8_t IDPM_LIM:6; // Input Current Limit in effect while Input Current Optimizer (ICO) is enabled, offset: 100mA (default)
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bool IDPM_STAT:1; // IINDPM Status
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bool VDPM_STAT:1; // VINDPM Status
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} REG13;
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typedef struct {
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uint8_t DEV_REV:2; // Device Revision
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bool TS_PROFILE:1; // Temperature Profile
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