diff --git a/applications/applications.h b/applications/applications.h
index 1cdfde3e..266ec715 100644
--- a/applications/applications.h
+++ b/applications/applications.h
@@ -32,6 +32,7 @@ void lf_rfid_workaround(void* p);
 void nfc_task(void* p);
 void irukagotchi_task(void* p);
 void power_task(void* p);
+void bt_task(void* p);
 void sd_card_test(void* p);
 void application_vibro(void* p);
 void app_gpio_test(void* p);
@@ -101,6 +102,10 @@ const FlipperStartupApp FLIPPER_STARTUP[] = {
      .icon = A_Plugins_14},
 #endif
 
+#ifdef APP_BT
+    {.app = bt_task, .name = "bt_task", .libs = {1, FURI_LIB{"cli_task"}}, .icon = A_Plugins_14},
+#endif
+
 #ifdef APP_CC1101
     {.app = cc1101_workaround,
      .name = "cc1101 workaround",
diff --git a/applications/applications.mk b/applications/applications.mk
index fa5e29ad..851f2099 100644
--- a/applications/applications.mk
+++ b/applications/applications.mk
@@ -11,6 +11,7 @@ ifeq ($(APP_RELEASE), 1)
 APP_MENU = 1
 APP_NFC  = 1
 APP_POWER = 1
+APP_BT = 1
 APP_CLI = 1
 BUILD_IRDA  = 1
 APP_IRUKAGOTCHI = 1
@@ -45,10 +46,18 @@ endif
 APP_POWER ?= 0
 ifeq ($(APP_POWER), 1)
 APP_GUI		= 1
+APP_CLI		= 1
 CFLAGS		+= -DAPP_POWER
 C_SOURCES	+= $(wildcard $(APP_DIR)/power/*.c)
 endif
 
+APP_BT ?= 0
+ifeq ($(APP_BT), 1)
+APP_CLI		= 1
+CFLAGS		+= -DAPP_BT
+C_SOURCES	+= $(wildcard $(APP_DIR)/bt/*.c)
+endif
+
 APP_MENU ?= 0
 ifeq ($(APP_MENU), 1)
 CFLAGS += -DAPP_MENU
diff --git a/applications/bt/bt.c b/applications/bt/bt.c
new file mode 100644
index 00000000..ce1e3e61
--- /dev/null
+++ b/applications/bt/bt.c
@@ -0,0 +1,58 @@
+#include "bt_i.h"
+
+Bt* bt_alloc() {
+    Bt* bt = furi_alloc(sizeof(Bt));
+    bt->cli = furi_open("cli");
+
+    bt->statusbar_icon = assets_icons_get(I_Bluetooth_5x8);
+    bt->statusbar_widget = widget_alloc();
+    widget_set_width(bt->statusbar_widget, icon_get_width(bt->statusbar_icon) + 2);
+    widget_draw_callback_set(bt->statusbar_widget, bt_draw_statusbar_callback, bt);
+    widget_enabled_set(bt->statusbar_widget, false);
+
+    return bt;
+}
+
+void bt_draw_statusbar_callback(CanvasApi* canvas, void* context) {
+    assert(context);
+    Bt* bt = context;
+    canvas->draw_icon(canvas, 0, 0, bt->statusbar_icon);
+}
+
+void bt_cli_info(string_t args, void* context) {
+    string_t buffer;
+    string_init(buffer);
+    api_hal_bt_dump_state(buffer);
+    cli_print(string_get_cstr(buffer));
+    string_clear(buffer);
+}
+
+void bt_task() {
+    Bt* bt = bt_alloc();
+
+    if(bt->cli) {
+        cli_add_command(bt->cli, "bt_info", bt_cli_info, bt);
+    }
+
+    // TODO: add ValueMutex(bt) to "bt" record
+    if(!furi_create("bt", bt)) {
+        printf("[bt_task] unable to create bt record\n");
+        furiac_exit(NULL);
+    }
+
+    FuriRecordSubscriber* gui_record = furi_open_deprecated("gui", false, false, NULL, NULL, NULL);
+    furi_assert(gui_record);
+    GuiApi* gui = furi_take(gui_record);
+    furi_assert(gui);
+    gui->add_widget(gui, bt->statusbar_widget, GuiLayerStatusBarLeft);
+    furi_commit(gui_record);
+
+    furiac_ready();
+
+    api_hal_bt_init();
+
+    while(1) {
+        widget_enabled_set(bt->statusbar_widget, api_hal_bt_is_alive());
+        osDelay(1000);
+    }
+}
diff --git a/applications/bt/bt.h b/applications/bt/bt.h
new file mode 100644
index 00000000..6f70f09b
--- /dev/null
+++ b/applications/bt/bt.h
@@ -0,0 +1 @@
+#pragma once
diff --git a/applications/bt/bt_i.h b/applications/bt/bt_i.h
new file mode 100644
index 00000000..a3d98abf
--- /dev/null
+++ b/applications/bt/bt_i.h
@@ -0,0 +1,19 @@
+#pragma once
+
+#include "bt.h"
+
+#include <cli/cli.h>
+#include <flipper.h>
+#include <flipper_v2.h>
+#include <gui/gui.h>
+#include <gui/widget.h>
+
+typedef struct {
+    Cli* cli;
+    Icon* statusbar_icon;
+    Widget* statusbar_widget;
+} Bt;
+
+Bt* bt_alloc();
+
+void bt_draw_statusbar_callback(CanvasApi* canvas, void* context);
diff --git a/firmware/targets/api-hal-include/api-hal-bt.h b/firmware/targets/api-hal-include/api-hal-bt.h
new file mode 100644
index 00000000..d89a3282
--- /dev/null
+++ b/firmware/targets/api-hal-include/api-hal-bt.h
@@ -0,0 +1,21 @@
+#pragma once
+
+#include <m-string.h>
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Initialize */
+void api_hal_bt_init();
+
+/* Get BT/BLE system component state */
+void api_hal_bt_dump_state(string_t buffer);
+
+/* Get BT/BLE system component state */
+bool api_hal_bt_is_alive();
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/firmware/targets/api-hal-include/api-hal.h b/firmware/targets/api-hal-include/api-hal.h
index 351aef8b..c482a07a 100644
--- a/firmware/targets/api-hal-include/api-hal.h
+++ b/firmware/targets/api-hal-include/api-hal.h
@@ -13,3 +13,4 @@ template <unsigned int N> struct STOP_EXTERNING_ME {};
 #include "api-hal-power.h"
 #include "api-hal-vcp.h"
 #include "api-hal-uid.h"
+#include "api-hal-bt.h"
diff --git a/firmware/targets/f2/api-hal/api-hal-bt.c b/firmware/targets/f2/api-hal/api-hal-bt.c
new file mode 100644
index 00000000..0e76fe19
--- /dev/null
+++ b/firmware/targets/f2/api-hal/api-hal-bt.c
@@ -0,0 +1,12 @@
+#include <api-hal-bt.h>
+
+void api_hal_bt_init() {
+}
+
+void api_hal_bt_dump_state(string_t buffer) {
+    string_cat_printf(buffer, "BLE unsupported");
+}
+
+bool api_hal_bt_is_alive() {
+    return false;
+}
\ No newline at end of file
diff --git a/firmware/targets/f3/Inc/adc.h b/firmware/targets/f3/Inc/adc.h
index fd4c3847..ad6e4ad1 100644
--- a/firmware/targets/f3/Inc/adc.h
+++ b/firmware/targets/f3/Inc/adc.h
@@ -1,8 +1,8 @@
 /**
   ******************************************************************************
-  * File Name          : ADC.h
-  * Description        : This file provides code for the configuration
-  *                      of the ADC instances.
+  * @file    adc.h
+  * @brief   This file contains all the function prototypes for
+  *          the adc.c file
   ******************************************************************************
   * @attention
   *
@@ -17,10 +17,11 @@
   ******************************************************************************
   */
 /* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __adc_H
-#define __adc_H
+#ifndef __ADC_H__
+#define __ADC_H__
+
 #ifdef __cplusplus
- extern "C" {
+extern "C" {
 #endif
 
 /* Includes ------------------------------------------------------------------*/
@@ -45,14 +46,7 @@ void MX_ADC1_Init(void);
 #ifdef __cplusplus
 }
 #endif
-#endif /*__ adc_H */
 
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
+#endif /* __ADC_H__ */
 
 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/firmware/targets/f3/Inc/aes.h b/firmware/targets/f3/Inc/aes.h
new file mode 100644
index 00000000..8e703f9d
--- /dev/null
+++ b/firmware/targets/f3/Inc/aes.h
@@ -0,0 +1,54 @@
+/**
+  ******************************************************************************
+  * @file    aes.h
+  * @brief   This file contains all the function prototypes for
+  *          the aes.c file
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __AES_H__
+#define __AES_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+extern CRYP_HandleTypeDef hcryp1;
+extern CRYP_HandleTypeDef hcryp2;
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+void MX_AES1_Init(void);
+void MX_AES2_Init(void);
+
+/* USER CODE BEGIN Prototypes */
+
+/* USER CODE END Prototypes */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __AES_H__ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/firmware/targets/f3/Inc/comp.h b/firmware/targets/f3/Inc/comp.h
index 3ec923b1..92e61755 100644
--- a/firmware/targets/f3/Inc/comp.h
+++ b/firmware/targets/f3/Inc/comp.h
@@ -1,8 +1,8 @@
 /**
   ******************************************************************************
-  * File Name          : COMP.h
-  * Description        : This file provides code for the configuration
-  *                      of the COMP instances.
+  * @file    comp.h
+  * @brief   This file contains all the function prototypes for
+  *          the comp.c file
   ******************************************************************************
   * @attention
   *
@@ -17,10 +17,11 @@
   ******************************************************************************
   */
 /* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __comp_H
-#define __comp_H
+#ifndef __COMP_H__
+#define __COMP_H__
+
 #ifdef __cplusplus
- extern "C" {
+extern "C" {
 #endif
 
 /* Includes ------------------------------------------------------------------*/
@@ -45,14 +46,7 @@ void MX_COMP1_Init(void);
 #ifdef __cplusplus
 }
 #endif
-#endif /*__ comp_H */
 
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
+#endif /* __COMP_H__ */
 
 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/firmware/targets/f3/Inc/crc.h b/firmware/targets/f3/Inc/crc.h
new file mode 100644
index 00000000..cc36b7bc
--- /dev/null
+++ b/firmware/targets/f3/Inc/crc.h
@@ -0,0 +1,52 @@
+/**
+  ******************************************************************************
+  * @file    crc.h
+  * @brief   This file contains all the function prototypes for
+  *          the crc.c file
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __CRC_H__
+#define __CRC_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+extern CRC_HandleTypeDef hcrc;
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+void MX_CRC_Init(void);
+
+/* USER CODE BEGIN Prototypes */
+
+/* USER CODE END Prototypes */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CRC_H__ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/firmware/targets/f3/Inc/gpio.h b/firmware/targets/f3/Inc/gpio.h
index 6fac8b7a..220f6191 100644
--- a/firmware/targets/f3/Inc/gpio.h
+++ b/firmware/targets/f3/Inc/gpio.h
@@ -1,8 +1,8 @@
 /**
   ******************************************************************************
-  * File Name          : gpio.h
-  * Description        : This file contains all the functions prototypes for
-  *                      the gpio
+  * @file    gpio.h
+  * @brief   This file contains all the function prototypes for
+  *          the gpio.c file
   ******************************************************************************
   * @attention
   *
@@ -16,12 +16,12 @@
   *
   ******************************************************************************
   */
-
 /* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __gpio_H
-#define __gpio_H
+#ifndef __GPIO_H__
+#define __GPIO_H__
+
 #ifdef __cplusplus
- extern "C" {
+extern "C" {
 #endif
 
 /* Includes ------------------------------------------------------------------*/
@@ -44,14 +44,6 @@ void MX_GPIO_Init(void);
 #ifdef __cplusplus
 }
 #endif
-#endif /*__ pinoutConfig_H */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
+#endif /*__ GPIO_H__ */
 
 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/firmware/targets/f3/Inc/i2c.h b/firmware/targets/f3/Inc/i2c.h
index 89392e4e..28396a60 100644
--- a/firmware/targets/f3/Inc/i2c.h
+++ b/firmware/targets/f3/Inc/i2c.h
@@ -1,8 +1,8 @@
 /**
   ******************************************************************************
-  * File Name          : I2C.h
-  * Description        : This file provides code for the configuration
-  *                      of the I2C instances.
+  * @file    i2c.h
+  * @brief   This file contains all the function prototypes for
+  *          the i2c.c file
   ******************************************************************************
   * @attention
   *
@@ -17,10 +17,11 @@
   ******************************************************************************
   */
 /* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __i2c_H
-#define __i2c_H
+#ifndef __I2C_H__
+#define __I2C_H__
+
 #ifdef __cplusplus
- extern "C" {
+extern "C" {
 #endif
 
 /* Includes ------------------------------------------------------------------*/
@@ -47,14 +48,7 @@ void MX_I2C1_Init(void);
 #ifdef __cplusplus
 }
 #endif
-#endif /*__ i2c_H */
 
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
+#endif /* __I2C_H__ */
 
 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/firmware/targets/f3/Inc/pka.h b/firmware/targets/f3/Inc/pka.h
new file mode 100644
index 00000000..06779391
--- /dev/null
+++ b/firmware/targets/f3/Inc/pka.h
@@ -0,0 +1,52 @@
+/**
+  ******************************************************************************
+  * @file    pka.h
+  * @brief   This file contains all the function prototypes for
+  *          the pka.c file
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __PKA_H__
+#define __PKA_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+extern PKA_HandleTypeDef hpka;
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+void MX_PKA_Init(void);
+
+/* USER CODE BEGIN Prototypes */
+
+/* USER CODE END Prototypes */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __PKA_H__ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/firmware/targets/f3/Inc/rf.h b/firmware/targets/f3/Inc/rf.h
index 0ad8d042..cfb521db 100644
--- a/firmware/targets/f3/Inc/rf.h
+++ b/firmware/targets/f3/Inc/rf.h
@@ -1,8 +1,8 @@
 /**
   ******************************************************************************
-  * File Name          : RF.h
-  * Description        : This file provides code for the configuration
-  *                      of the RF instances.
+  * @file    rf.h
+  * @brief   This file contains all the function prototypes for
+  *          the rf.c file
   ******************************************************************************
   * @attention
   *
@@ -17,10 +17,11 @@
   ******************************************************************************
   */
 /* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __rf_H
-#define __rf_H
+#ifndef __RF_H__
+#define __RF_H__
+
 #ifdef __cplusplus
- extern "C" {
+extern "C" {
 #endif
 
 /* Includes ------------------------------------------------------------------*/
@@ -43,14 +44,7 @@ void MX_RF_Init(void);
 #ifdef __cplusplus
 }
 #endif
-#endif /*__ rf_H */
 
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
+#endif /* __RF_H__ */
 
 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/firmware/targets/f3/Inc/rng.h b/firmware/targets/f3/Inc/rng.h
new file mode 100644
index 00000000..08b72883
--- /dev/null
+++ b/firmware/targets/f3/Inc/rng.h
@@ -0,0 +1,52 @@
+/**
+  ******************************************************************************
+  * @file    rng.h
+  * @brief   This file contains all the function prototypes for
+  *          the rng.c file
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __RNG_H__
+#define __RNG_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+extern RNG_HandleTypeDef hrng;
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+void MX_RNG_Init(void);
+
+/* USER CODE BEGIN Prototypes */
+
+/* USER CODE END Prototypes */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __RNG_H__ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/firmware/targets/f3/Inc/rtc.h b/firmware/targets/f3/Inc/rtc.h
index 9c1d66eb..0ae33baa 100644
--- a/firmware/targets/f3/Inc/rtc.h
+++ b/firmware/targets/f3/Inc/rtc.h
@@ -1,8 +1,8 @@
 /**
   ******************************************************************************
-  * File Name          : RTC.h
-  * Description        : This file provides code for the configuration
-  *                      of the RTC instances.
+  * @file    rtc.h
+  * @brief   This file contains all the function prototypes for
+  *          the rtc.c file
   ******************************************************************************
   * @attention
   *
@@ -17,10 +17,11 @@
   ******************************************************************************
   */
 /* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __rtc_H
-#define __rtc_H
+#ifndef __RTC_H__
+#define __RTC_H__
+
 #ifdef __cplusplus
- extern "C" {
+extern "C" {
 #endif
 
 /* Includes ------------------------------------------------------------------*/
@@ -45,14 +46,7 @@ void MX_RTC_Init(void);
 #ifdef __cplusplus
 }
 #endif
-#endif /*__ rtc_H */
 
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
+#endif /* __RTC_H__ */
 
 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/firmware/targets/f3/Inc/spi.h b/firmware/targets/f3/Inc/spi.h
index e497d347..7e313320 100644
--- a/firmware/targets/f3/Inc/spi.h
+++ b/firmware/targets/f3/Inc/spi.h
@@ -1,8 +1,8 @@
 /**
   ******************************************************************************
-  * File Name          : SPI.h
-  * Description        : This file provides code for the configuration
-  *                      of the SPI instances.
+  * @file    spi.h
+  * @brief   This file contains all the function prototypes for
+  *          the spi.c file
   ******************************************************************************
   * @attention
   *
@@ -17,10 +17,11 @@
   ******************************************************************************
   */
 /* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __spi_H
-#define __spi_H
+#ifndef __SPI_H__
+#define __SPI_H__
+
 #ifdef __cplusplus
- extern "C" {
+extern "C" {
 #endif
 
 /* Includes ------------------------------------------------------------------*/
@@ -50,14 +51,7 @@ void CC1101_SPI_Reconfigure();
 #ifdef __cplusplus
 }
 #endif
-#endif /*__ spi_H */
 
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
+#endif /* __SPI_H__ */
 
 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/firmware/targets/f3/Inc/stm32wbxx_hal_conf.h b/firmware/targets/f3/Inc/stm32wbxx_hal_conf.h
index 03ce8e9c..57e2d7cb 100644
--- a/firmware/targets/f3/Inc/stm32wbxx_hal_conf.h
+++ b/firmware/targets/f3/Inc/stm32wbxx_hal_conf.h
@@ -34,21 +34,20 @@
   */
 #define HAL_MODULE_ENABLED
 #define HAL_ADC_MODULE_ENABLED
-/*#define HAL_CRYP_MODULE_ENABLED   */
+#define HAL_CRYP_MODULE_ENABLED
 #define HAL_COMP_MODULE_ENABLED
-/*#define HAL_CRC_MODULE_ENABLED   */
+#define HAL_CRC_MODULE_ENABLED
 #define HAL_HSEM_MODULE_ENABLED
 #define HAL_I2C_MODULE_ENABLED
-/*#define HAL_I2S_MODULE_ENABLED   */
 /*#define HAL_IPCC_MODULE_ENABLED   */
 /*#define HAL_IRDA_MODULE_ENABLED   */
 /*#define HAL_IWDG_MODULE_ENABLED   */
 /*#define HAL_LCD_MODULE_ENABLED   */
 /*#define HAL_LPTIM_MODULE_ENABLED   */
 #define HAL_PCD_MODULE_ENABLED
-/*#define HAL_PKA_MODULE_ENABLED   */
+#define HAL_PKA_MODULE_ENABLED
 /*#define HAL_QSPI_MODULE_ENABLED   */
-/*#define HAL_RNG_MODULE_ENABLED   */
+#define HAL_RNG_MODULE_ENABLED
 #define HAL_RTC_MODULE_ENABLED
 /*#define HAL_SAI_MODULE_ENABLED   */
 /*#define HAL_SMBUS_MODULE_ENABLED   */
@@ -71,7 +70,6 @@
 #define USE_HAL_COMP_REGISTER_CALLBACKS      0u
 #define USE_HAL_CRYP_REGISTER_CALLBACKS      0u
 #define USE_HAL_I2C_REGISTER_CALLBACKS       0u
-#define USE_HAL_I2S_REGISTER_CALLBACKS       0u
 #define USE_HAL_IRDA_REGISTER_CALLBACKS      0u
 #define USE_HAL_LPTIM_REGISTER_CALLBACKS     0u
 #define USE_HAL_PCD_REGISTER_CALLBACKS       0u
@@ -245,10 +243,6 @@
  #include "stm32wbxx_hal_i2c.h"
 #endif /* HAL_I2C_MODULE_ENABLED */
 
-#ifdef HAL_I2S_MODULE_ENABLED
- #include "stm32wbxx_hal_i2s.h"
-#endif /* HAL_I2S_MODULE_ENABLED */
-
 #ifdef HAL_IPCC_MODULE_ENABLED
  #include "stm32wbxx_hal_ipcc.h"
 #endif /* HAL_IPCC_MODULE_ENABLED */
diff --git a/firmware/targets/f3/Inc/tim.h b/firmware/targets/f3/Inc/tim.h
index b6e88184..6f1e7c78 100644
--- a/firmware/targets/f3/Inc/tim.h
+++ b/firmware/targets/f3/Inc/tim.h
@@ -1,8 +1,8 @@
 /**
   ******************************************************************************
-  * File Name          : TIM.h
-  * Description        : This file provides code for the configuration
-  *                      of the TIM instances.
+  * @file    tim.h
+  * @brief   This file contains all the function prototypes for
+  *          the tim.c file
   ******************************************************************************
   * @attention
   *
@@ -17,10 +17,11 @@
   ******************************************************************************
   */
 /* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __tim_H
-#define __tim_H
+#ifndef __TIM_H__
+#define __TIM_H__
+
 #ifdef __cplusplus
- extern "C" {
+extern "C" {
 #endif
 
 /* Includes ------------------------------------------------------------------*/
@@ -51,14 +52,7 @@ void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
 #ifdef __cplusplus
 }
 #endif
-#endif /*__ tim_H */
 
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
+#endif /* __TIM_H__ */
 
 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/firmware/targets/f3/Inc/usart.h b/firmware/targets/f3/Inc/usart.h
index e87a9998..15e65d1e 100644
--- a/firmware/targets/f3/Inc/usart.h
+++ b/firmware/targets/f3/Inc/usart.h
@@ -1,8 +1,8 @@
 /**
   ******************************************************************************
-  * File Name          : USART.h
-  * Description        : This file provides code for the configuration
-  *                      of the USART instances.
+  * @file    usart.h
+  * @brief   This file contains all the function prototypes for
+  *          the usart.c file
   ******************************************************************************
   * @attention
   *
@@ -17,10 +17,11 @@
   ******************************************************************************
   */
 /* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __usart_H
-#define __usart_H
+#ifndef __USART_H__
+#define __USART_H__
+
 #ifdef __cplusplus
- extern "C" {
+extern "C" {
 #endif
 
 /* Includes ------------------------------------------------------------------*/
@@ -45,14 +46,7 @@ void MX_USART1_UART_Init(void);
 #ifdef __cplusplus
 }
 #endif
-#endif /*__ usart_H */
 
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
+#endif /* __USART_H__ */
 
 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/firmware/targets/f3/Src/adc.c b/firmware/targets/f3/Src/adc.c
index 8d39940b..d924c244 100644
--- a/firmware/targets/f3/Src/adc.c
+++ b/firmware/targets/f3/Src/adc.c
@@ -1,8 +1,8 @@
 /**
   ******************************************************************************
-  * File Name          : ADC.c
-  * Description        : This file provides code for the configuration
-  *                      of the ADC instances.
+  * @file    adc.c
+  * @brief   This file provides code for the configuration
+  *          of the ADC instances.
   ******************************************************************************
   * @attention
   *
diff --git a/firmware/targets/f3/Src/aes.c b/firmware/targets/f3/Src/aes.c
new file mode 100644
index 00000000..31624851
--- /dev/null
+++ b/firmware/targets/f3/Src/aes.c
@@ -0,0 +1,127 @@
+/**
+  ******************************************************************************
+  * @file    aes.c
+  * @brief   This file provides code for the configuration
+  *          of the AES instances.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "aes.h"
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+CRYP_HandleTypeDef hcryp1;
+__ALIGN_BEGIN static const uint32_t pKeyAES1[4] __ALIGN_END = {
+                            0x00000000,0x00000000,0x00000000,0x00000000};
+CRYP_HandleTypeDef hcryp2;
+__ALIGN_BEGIN static const uint32_t pKeyAES2[4] __ALIGN_END = {
+                            0x00000000,0x00000000,0x00000000,0x00000000};
+
+/* AES1 init function */
+void MX_AES1_Init(void)
+{
+
+  hcryp1.Instance = AES1;
+  hcryp1.Init.DataType = CRYP_DATATYPE_32B;
+  hcryp1.Init.KeySize = CRYP_KEYSIZE_128B;
+  hcryp1.Init.pKey = (uint32_t *)pKeyAES1;
+  hcryp1.Init.Algorithm = CRYP_AES_ECB;
+  hcryp1.Init.DataWidthUnit = CRYP_DATAWIDTHUNIT_WORD;
+  hcryp1.Init.KeyIVConfigSkip = CRYP_KEYIVCONFIG_ALWAYS;
+  if (HAL_CRYP_Init(&hcryp1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+}
+/* AES2 init function */
+void MX_AES2_Init(void)
+{
+
+  hcryp2.Instance = AES2;
+  hcryp2.Init.DataType = CRYP_DATATYPE_32B;
+  hcryp2.Init.KeySize = CRYP_KEYSIZE_128B;
+  hcryp2.Init.pKey = (uint32_t *)pKeyAES2;
+  hcryp2.Init.Algorithm = CRYP_AES_ECB;
+  hcryp2.Init.DataWidthUnit = CRYP_DATAWIDTHUNIT_WORD;
+  hcryp2.Init.KeyIVConfigSkip = CRYP_KEYIVCONFIG_ALWAYS;
+  if (HAL_CRYP_Init(&hcryp2) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+}
+
+void HAL_CRYP_MspInit(CRYP_HandleTypeDef* crypHandle)
+{
+
+  if(crypHandle->Instance==AES1)
+  {
+  /* USER CODE BEGIN AES1_MspInit 0 */
+
+  /* USER CODE END AES1_MspInit 0 */
+    /* AES1 clock enable */
+    __HAL_RCC_AES1_CLK_ENABLE();
+  /* USER CODE BEGIN AES1_MspInit 1 */
+
+  /* USER CODE END AES1_MspInit 1 */
+  }
+  else if(crypHandle->Instance==AES2)
+  {
+  /* USER CODE BEGIN AES2_MspInit 0 */
+
+  /* USER CODE END AES2_MspInit 0 */
+    /* AES2 clock enable */
+    __HAL_RCC_AES2_CLK_ENABLE();
+  /* USER CODE BEGIN AES2_MspInit 1 */
+
+  /* USER CODE END AES2_MspInit 1 */
+  }
+}
+
+void HAL_CRYP_MspDeInit(CRYP_HandleTypeDef* crypHandle)
+{
+
+  if(crypHandle->Instance==AES1)
+  {
+  /* USER CODE BEGIN AES1_MspDeInit 0 */
+
+  /* USER CODE END AES1_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_AES1_CLK_DISABLE();
+  /* USER CODE BEGIN AES1_MspDeInit 1 */
+
+  /* USER CODE END AES1_MspDeInit 1 */
+  }
+  else if(crypHandle->Instance==AES2)
+  {
+  /* USER CODE BEGIN AES2_MspDeInit 0 */
+
+  /* USER CODE END AES2_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_AES2_CLK_DISABLE();
+  /* USER CODE BEGIN AES2_MspDeInit 1 */
+
+  /* USER CODE END AES2_MspDeInit 1 */
+  }
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/firmware/targets/f3/Src/app_freertos.c b/firmware/targets/f3/Src/app_freertos.c
index 01623a9f..b24d522e 100644
--- a/firmware/targets/f3/Src/app_freertos.c
+++ b/firmware/targets/f3/Src/app_freertos.c
@@ -153,6 +153,10 @@ void MX_FREERTOS_Init(void) {
   /* add threads, ... */
   /* USER CODE END RTOS_THREADS */
 
+  /* USER CODE BEGIN RTOS_EVENTS */
+  /* add events, ... */
+  /* USER CODE END RTOS_EVENTS */
+
 }
 
 /* USER CODE BEGIN Header_StartDefaultTask */
diff --git a/firmware/targets/f3/Src/comp.c b/firmware/targets/f3/Src/comp.c
index f8d69ed4..0182f260 100644
--- a/firmware/targets/f3/Src/comp.c
+++ b/firmware/targets/f3/Src/comp.c
@@ -1,8 +1,8 @@
 /**
   ******************************************************************************
-  * File Name          : COMP.c
-  * Description        : This file provides code for the configuration
-  *                      of the COMP instances.
+  * @file    comp.c
+  * @brief   This file provides code for the configuration
+  *          of the COMP instances.
   ******************************************************************************
   * @attention
   *
diff --git a/firmware/targets/f3/Src/crc.c b/firmware/targets/f3/Src/crc.c
new file mode 100644
index 00000000..b42b3a1c
--- /dev/null
+++ b/firmware/targets/f3/Src/crc.c
@@ -0,0 +1,82 @@
+/**
+  ******************************************************************************
+  * @file    crc.c
+  * @brief   This file provides code for the configuration
+  *          of the CRC instances.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "crc.h"
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+CRC_HandleTypeDef hcrc;
+
+/* CRC init function */
+void MX_CRC_Init(void)
+{
+
+  hcrc.Instance = CRC;
+  hcrc.Init.DefaultPolynomialUse = DEFAULT_POLYNOMIAL_ENABLE;
+  hcrc.Init.DefaultInitValueUse = DEFAULT_INIT_VALUE_ENABLE;
+  hcrc.Init.InputDataInversionMode = CRC_INPUTDATA_INVERSION_NONE;
+  hcrc.Init.OutputDataInversionMode = CRC_OUTPUTDATA_INVERSION_DISABLE;
+  hcrc.InputDataFormat = CRC_INPUTDATA_FORMAT_BYTES;
+  if (HAL_CRC_Init(&hcrc) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+}
+
+void HAL_CRC_MspInit(CRC_HandleTypeDef* crcHandle)
+{
+
+  if(crcHandle->Instance==CRC)
+  {
+  /* USER CODE BEGIN CRC_MspInit 0 */
+
+  /* USER CODE END CRC_MspInit 0 */
+    /* CRC clock enable */
+    __HAL_RCC_CRC_CLK_ENABLE();
+  /* USER CODE BEGIN CRC_MspInit 1 */
+
+  /* USER CODE END CRC_MspInit 1 */
+  }
+}
+
+void HAL_CRC_MspDeInit(CRC_HandleTypeDef* crcHandle)
+{
+
+  if(crcHandle->Instance==CRC)
+  {
+  /* USER CODE BEGIN CRC_MspDeInit 0 */
+
+  /* USER CODE END CRC_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_CRC_CLK_DISABLE();
+  /* USER CODE BEGIN CRC_MspDeInit 1 */
+
+  /* USER CODE END CRC_MspDeInit 1 */
+  }
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/firmware/targets/f3/Src/gpio.c b/firmware/targets/f3/Src/gpio.c
index f02b1cba..cc244825 100644
--- a/firmware/targets/f3/Src/gpio.c
+++ b/firmware/targets/f3/Src/gpio.c
@@ -1,8 +1,8 @@
 /**
   ******************************************************************************
-  * File Name          : gpio.c
-  * Description        : This file provides code for the configuration
-  *                      of all used GPIO pins.
+  * @file    gpio.c
+  * @brief   This file provides code for the configuration
+  *          of all used GPIO pins.
   ******************************************************************************
   * @attention
   *
@@ -19,6 +19,7 @@
 
 /* Includes ------------------------------------------------------------------*/
 #include "gpio.h"
+
 /* USER CODE BEGIN 0 */
 
 /* USER CODE END 0 */
diff --git a/firmware/targets/f3/Src/i2c.c b/firmware/targets/f3/Src/i2c.c
index 32712c56..e3f3f8cd 100644
--- a/firmware/targets/f3/Src/i2c.c
+++ b/firmware/targets/f3/Src/i2c.c
@@ -1,8 +1,8 @@
 /**
   ******************************************************************************
-  * File Name          : I2C.c
-  * Description        : This file provides code for the configuration
-  *                      of the I2C instances.
+  * @file    i2c.c
+  * @brief   This file provides code for the configuration
+  *          of the I2C instances.
   ******************************************************************************
   * @attention
   *
diff --git a/firmware/targets/f3/Src/main.c b/firmware/targets/f3/Src/main.c
index c089ee16..b54b01bb 100644
--- a/firmware/targets/f3/Src/main.c
+++ b/firmware/targets/f3/Src/main.c
@@ -21,9 +21,13 @@
 #include "main.h"
 #include "cmsis_os.h"
 #include "adc.h"
+#include "aes.h"
 #include "comp.h"
+#include "crc.h"
 #include "i2c.h"
+#include "pka.h"
 #include "rf.h"
+#include "rng.h"
 #include "rtc.h"
 #include "spi.h"
 #include "tim.h"
@@ -108,6 +112,11 @@ int main(void)
   MX_TIM16_Init();
   MX_COMP1_Init();
   MX_RF_Init();
+  MX_PKA_Init();
+  MX_RNG_Init();
+  MX_AES1_Init();
+  MX_AES2_Init();
+  MX_CRC_Init();
   /* USER CODE BEGIN 2 */
   MX_FATFS_Init();
   delay_us_init_DWT();
@@ -189,7 +198,8 @@ void SystemClock_Config(void)
   */
   PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SMPS|RCC_PERIPHCLK_RFWAKEUP
                               |RCC_PERIPHCLK_RTC|RCC_PERIPHCLK_USART1
-                              |RCC_PERIPHCLK_I2C1|RCC_PERIPHCLK_USB
+                              |RCC_PERIPHCLK_I2C1|RCC_PERIPHCLK_CLK48SEL
+                              |RCC_PERIPHCLK_USB|RCC_PERIPHCLK_RNG
                               |RCC_PERIPHCLK_ADC;
   PeriphClkInitStruct.PLLSAI1.PLLN = 6;
   PeriphClkInitStruct.PLLSAI1.PLLP = RCC_PLLP_DIV2;
@@ -199,9 +209,10 @@ void SystemClock_Config(void)
   PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
   PeriphClkInitStruct.I2c1ClockSelection = RCC_I2C1CLKSOURCE_PCLK1;
   PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLLSAI1;
+  PeriphClkInitStruct.RngClockSelection = RCC_RNGCLKSOURCE_CLK48;
   PeriphClkInitStruct.AdcClockSelection = RCC_ADCCLKSOURCE_PLLSAI1;
   PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSE;
-  PeriphClkInitStruct.RFWakeUpClockSelection = RCC_RFWKPCLKSOURCE_HSE_DIV1024;
+  PeriphClkInitStruct.RFWakeUpClockSelection = RCC_RFWKPCLKSOURCE_LSE;
   PeriphClkInitStruct.SmpsClockSelection = RCC_SMPSCLKSOURCE_HSE;
   PeriphClkInitStruct.SmpsDivSelection = RCC_SMPSCLKDIV_RANGE0;
   if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
@@ -214,13 +225,16 @@ void SystemClock_Config(void)
   /** Enables the Clock Security System
   */
   HAL_RCC_EnableCSS();
+  /** Enables the Clock Security System
+  */
+  HAL_RCCEx_EnableLSECSS();
 }
 
 /* USER CODE BEGIN 4 */
 
 /* USER CODE END 4 */
 
-/**
+ /**
   * @brief  Period elapsed callback in non blocking mode
   * @note   This function is called  when TIM17 interrupt took place, inside
   * HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment
diff --git a/firmware/targets/f3/Src/pka.c b/firmware/targets/f3/Src/pka.c
new file mode 100644
index 00000000..3fcf83eb
--- /dev/null
+++ b/firmware/targets/f3/Src/pka.c
@@ -0,0 +1,77 @@
+/**
+  ******************************************************************************
+  * @file    pka.c
+  * @brief   This file provides code for the configuration
+  *          of the PKA instances.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "pka.h"
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+PKA_HandleTypeDef hpka;
+
+/* PKA init function */
+void MX_PKA_Init(void)
+{
+
+  hpka.Instance = PKA;
+  if (HAL_PKA_Init(&hpka) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+}
+
+void HAL_PKA_MspInit(PKA_HandleTypeDef* pkaHandle)
+{
+
+  if(pkaHandle->Instance==PKA)
+  {
+  /* USER CODE BEGIN PKA_MspInit 0 */
+
+  /* USER CODE END PKA_MspInit 0 */
+    /* PKA clock enable */
+    __HAL_RCC_PKA_CLK_ENABLE();
+  /* USER CODE BEGIN PKA_MspInit 1 */
+
+  /* USER CODE END PKA_MspInit 1 */
+  }
+}
+
+void HAL_PKA_MspDeInit(PKA_HandleTypeDef* pkaHandle)
+{
+
+  if(pkaHandle->Instance==PKA)
+  {
+  /* USER CODE BEGIN PKA_MspDeInit 0 */
+
+  /* USER CODE END PKA_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_PKA_CLK_DISABLE();
+  /* USER CODE BEGIN PKA_MspDeInit 1 */
+
+  /* USER CODE END PKA_MspDeInit 1 */
+  }
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/firmware/targets/f3/Src/rf.c b/firmware/targets/f3/Src/rf.c
index fe014fec..00f46606 100644
--- a/firmware/targets/f3/Src/rf.c
+++ b/firmware/targets/f3/Src/rf.c
@@ -1,8 +1,8 @@
 /**
   ******************************************************************************
-  * File Name          : RF.c
-  * Description        : This file provides code for the configuration
-  *                      of the RF instances.
+  * @file    rf.c
+  * @brief   This file provides code for the configuration
+  *          of the RF instances.
   ******************************************************************************
   * @attention
   *
diff --git a/firmware/targets/f3/Src/rng.c b/firmware/targets/f3/Src/rng.c
new file mode 100644
index 00000000..36bc8bb4
--- /dev/null
+++ b/firmware/targets/f3/Src/rng.c
@@ -0,0 +1,77 @@
+/**
+  ******************************************************************************
+  * @file    rng.c
+  * @brief   This file provides code for the configuration
+  *          of the RNG instances.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "rng.h"
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+RNG_HandleTypeDef hrng;
+
+/* RNG init function */
+void MX_RNG_Init(void)
+{
+
+  hrng.Instance = RNG;
+  if (HAL_RNG_Init(&hrng) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+}
+
+void HAL_RNG_MspInit(RNG_HandleTypeDef* rngHandle)
+{
+
+  if(rngHandle->Instance==RNG)
+  {
+  /* USER CODE BEGIN RNG_MspInit 0 */
+
+  /* USER CODE END RNG_MspInit 0 */
+    /* RNG clock enable */
+    __HAL_RCC_RNG_CLK_ENABLE();
+  /* USER CODE BEGIN RNG_MspInit 1 */
+
+  /* USER CODE END RNG_MspInit 1 */
+  }
+}
+
+void HAL_RNG_MspDeInit(RNG_HandleTypeDef* rngHandle)
+{
+
+  if(rngHandle->Instance==RNG)
+  {
+  /* USER CODE BEGIN RNG_MspDeInit 0 */
+
+  /* USER CODE END RNG_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_RNG_CLK_DISABLE();
+  /* USER CODE BEGIN RNG_MspDeInit 1 */
+
+  /* USER CODE END RNG_MspDeInit 1 */
+  }
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/firmware/targets/f3/Src/rtc.c b/firmware/targets/f3/Src/rtc.c
index 05a624b3..636877d2 100644
--- a/firmware/targets/f3/Src/rtc.c
+++ b/firmware/targets/f3/Src/rtc.c
@@ -1,8 +1,8 @@
 /**
   ******************************************************************************
-  * File Name          : RTC.c
-  * Description        : This file provides code for the configuration
-  *                      of the RTC instances.
+  * @file    rtc.c
+  * @brief   This file provides code for the configuration
+  *          of the RTC instances.
   ******************************************************************************
   * @attention
   *
diff --git a/firmware/targets/f3/Src/spi.c b/firmware/targets/f3/Src/spi.c
index 631b319d..70e6bdbc 100644
--- a/firmware/targets/f3/Src/spi.c
+++ b/firmware/targets/f3/Src/spi.c
@@ -1,8 +1,8 @@
 /**
   ******************************************************************************
-  * File Name          : SPI.c
-  * Description        : This file provides code for the configuration
-  *                      of the SPI instances.
+  * @file    spi.c
+  * @brief   This file provides code for the configuration
+  *          of the SPI instances.
   ******************************************************************************
   * @attention
   *
diff --git a/firmware/targets/f3/Src/stm32wbxx_hal_msp.c b/firmware/targets/f3/Src/stm32wbxx_hal_msp.c
index 83887d1b..4b2a90aa 100644
--- a/firmware/targets/f3/Src/stm32wbxx_hal_msp.c
+++ b/firmware/targets/f3/Src/stm32wbxx_hal_msp.c
@@ -70,6 +70,8 @@ void HAL_MspInit(void)
   __HAL_RCC_HSEM_CLK_ENABLE();
 
   /* System interrupt init*/
+  /* PendSV_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(PendSV_IRQn, 15, 0);
 
   /* Peripheral interrupt init */
   /* HSEM_IRQn interrupt configuration */
diff --git a/firmware/targets/f3/Src/stm32wbxx_hal_timebase_tim.c b/firmware/targets/f3/Src/stm32wbxx_hal_timebase_tim.c
index 72af9eeb..745a9c95 100644
--- a/firmware/targets/f3/Src/stm32wbxx_hal_timebase_tim.c
+++ b/firmware/targets/f3/Src/stm32wbxx_hal_timebase_tim.c
@@ -58,9 +58,8 @@ HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
 
   /* Compute TIM17 clock */
   uwTimclock = HAL_RCC_GetPCLK2Freq();
-
   /* Compute the prescaler value to have TIM17 counter clock equal to 1MHz */
-  uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000) - 1);
+  uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000U) - 1U);
 
   /* Initialize TIM17 */
   htim17.Instance = TIM17;
@@ -71,7 +70,7 @@ HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
   + ClockDivision = 0
   + Counter direction = Up
   */
-  htim17.Init.Period = (1000000 / 1000) - 1;
+  htim17.Init.Period = (1000000U / 1000U) - 1U;
   htim17.Init.Prescaler = uwPrescalerValue;
   htim17.Init.ClockDivision = 0;
   htim17.Init.CounterMode = TIM_COUNTERMODE_UP;
diff --git a/firmware/targets/f3/Src/stm32wbxx_it.c b/firmware/targets/f3/Src/stm32wbxx_it.c
index fd177b25..29c30393 100644
--- a/firmware/targets/f3/Src/stm32wbxx_it.c
+++ b/firmware/targets/f3/Src/stm32wbxx_it.c
@@ -322,5 +322,28 @@ void EXTI4_IRQHandler(void)
   /* USER CODE END EXTI4_IRQn 1 */
 }
 
+extern void HW_TS_RTC_Wakeup_Handler();
+extern void HW_IPCC_Tx_Handler();
+extern void HW_IPCC_Rx_Handler();
+
+
+void RTC_WKUP_IRQHandler(void)
+{
+  HW_TS_RTC_Wakeup_Handler();
+}
+
+void IPCC_C1_TX_IRQHandler(void)
+{
+  HW_IPCC_Tx_Handler();
+
+  return;
+}
+
+void IPCC_C1_RX_IRQHandler(void)
+{
+  HW_IPCC_Rx_Handler();
+  return;
+}
+
 /* USER CODE END 1 */
 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/firmware/targets/f3/Src/tim.c b/firmware/targets/f3/Src/tim.c
index 2cc45ff7..8ed10ebe 100644
--- a/firmware/targets/f3/Src/tim.c
+++ b/firmware/targets/f3/Src/tim.c
@@ -1,8 +1,8 @@
 /**
   ******************************************************************************
-  * File Name          : TIM.c
-  * Description        : This file provides code for the configuration
-  *                      of the TIM instances.
+  * @file    tim.c
+  * @brief   This file provides code for the configuration
+  *          of the TIM instances.
   ******************************************************************************
   * @attention
   *
diff --git a/firmware/targets/f3/Src/usart.c b/firmware/targets/f3/Src/usart.c
index bfe6303f..9bf64275 100644
--- a/firmware/targets/f3/Src/usart.c
+++ b/firmware/targets/f3/Src/usart.c
@@ -1,8 +1,8 @@
 /**
   ******************************************************************************
-  * File Name          : USART.c
-  * Description        : This file provides code for the configuration
-  *                      of the USART instances.
+  * @file    usart.c
+  * @brief   This file provides code for the configuration
+  *          of the USART instances.
   ******************************************************************************
   * @attention
   *
diff --git a/firmware/targets/f3/api-hal/api-hal-bt.c b/firmware/targets/f3/api-hal/api-hal-bt.c
new file mode 100644
index 00000000..de0886cc
--- /dev/null
+++ b/firmware/targets/f3/api-hal/api-hal-bt.c
@@ -0,0 +1,37 @@
+#include <api-hal-bt.h>
+#include <app_entry.h>
+#include <ble.h>
+
+void api_hal_bt_init() {
+    // Explicitly tell that we are in charge of CLK48 domain
+    HAL_HSEM_FastTake(CFG_HW_CLK48_CONFIG_SEMID);
+    // Start Core2, init HCI and start GAP/GATT
+    APPE_Init();
+}
+
+void api_hal_bt_dump_state(string_t buffer) {
+    BleGlueStatus status = APPE_Status();
+    if (status == BleGlueStatusStarted) {
+        uint8_t HCI_Version;
+        uint16_t HCI_Revision;
+        uint8_t LMP_PAL_Version;
+        uint16_t Manufacturer_Name;
+        uint16_t LMP_PAL_Subversion;
+
+        tBleStatus ret = hci_read_local_version_information(
+            &HCI_Version, &HCI_Revision, &LMP_PAL_Version, &Manufacturer_Name, &LMP_PAL_Subversion
+        );
+
+        string_cat_printf(buffer,
+            "Ret: %d, HCI_Version: %d, HCI_Revision: %d, LMP_PAL_Version: %d, Manufacturer_Name: %d, LMP_PAL_Subversion: %d",
+            ret, HCI_Version, HCI_Revision, LMP_PAL_Version, Manufacturer_Name, LMP_PAL_Subversion
+        );
+    } else {
+        string_cat_printf(buffer, "BLE not ready");
+    }
+}
+
+
+bool api_hal_bt_is_alive() {
+    return APPE_Status() == BleGlueStatusStarted;
+}
\ No newline at end of file
diff --git a/firmware/targets/f3/ble-glue/app_ble.c b/firmware/targets/f3/ble-glue/app_ble.c
new file mode 100644
index 00000000..adbd795e
--- /dev/null
+++ b/firmware/targets/f3/ble-glue/app_ble.c
@@ -0,0 +1,797 @@
+#include "main.h"
+
+#include "app_common.h"
+
+#include "dbg_trace.h"
+#include "ble.h"
+#include "tl.h"
+#include "app_ble.h"
+
+#include "cmsis_os.h"
+#include "shci.h"
+#include "stm32_lpm.h"
+#include "otp.h"
+#include "dis_app.h"
+#include "hrs_app.h"
+
+typedef struct _tSecurityParams {
+  uint8_t ioCapability;
+  uint8_t mitm_mode;
+  uint8_t bonding_mode;
+  uint8_t Use_Fixed_Pin;
+  uint8_t encryptionKeySizeMin;
+  uint8_t encryptionKeySizeMax;
+  uint32_t Fixed_Pin;
+  uint8_t initiateSecurity;
+} tSecurityParams;
+
+typedef struct _tBLEProfileGlobalContext {
+  tSecurityParams bleSecurityParam;
+  uint16_t gapServiceHandle;
+  uint16_t devNameCharHandle;
+  uint16_t appearanceCharHandle;
+  uint16_t connectionHandle;
+  uint8_t advtServUUIDlen;
+  uint8_t advtServUUID[100];
+} BleGlobalContext_t;
+
+typedef struct {
+  BleGlobalContext_t BleApplicationContext_legacy;
+  APP_BLE_ConnStatus_t Device_Connection_Status;
+  uint8_t Advertising_mgr_timer_Id;
+} BleApplicationContext_t;
+
+#define APPBLE_GAP_DEVICE_NAME_LENGTH 7
+#define FAST_ADV_TIMEOUT               (30*1000*1000/CFG_TS_TICK_VAL) /**< 30s */
+#define INITIAL_ADV_TIMEOUT            (60*1000*1000/CFG_TS_TICK_VAL) /**< 60s */
+
+#define BD_ADDR_SIZE_LOCAL    6
+
+#define LED_ON_TIMEOUT                 (0.005*1000*1000/CFG_TS_TICK_VAL) /**< 5ms */
+
+PLACE_IN_SECTION("MB_MEM1") ALIGN(4) static TL_CmdPacket_t BleCmdBuffer;
+
+static const uint8_t M_bd_addr[BD_ADDR_SIZE_LOCAL] =
+    {
+        (uint8_t)((CFG_ADV_BD_ADDRESS & 0x0000000000FF)),
+        (uint8_t)((CFG_ADV_BD_ADDRESS & 0x00000000FF00) >> 8),
+        (uint8_t)((CFG_ADV_BD_ADDRESS & 0x000000FF0000) >> 16),
+        (uint8_t)((CFG_ADV_BD_ADDRESS & 0x0000FF000000) >> 24),
+        (uint8_t)((CFG_ADV_BD_ADDRESS & 0x00FF00000000) >> 32),
+        (uint8_t)((CFG_ADV_BD_ADDRESS & 0xFF0000000000) >> 40)
+    };
+
+static uint8_t bd_addr_udn[BD_ADDR_SIZE_LOCAL];
+
+static const uint8_t BLE_CFG_IR_VALUE[16] = CFG_BLE_IRK;
+static const uint8_t BLE_CFG_ER_VALUE[16] = CFG_BLE_ERK;
+
+PLACE_IN_SECTION("TAG_OTA_END") const uint32_t MagicKeywordValue = 0x94448A29 ;
+PLACE_IN_SECTION("TAG_OTA_START") const uint32_t MagicKeywordAddress = (uint32_t)&MagicKeywordValue;
+
+PLACE_IN_SECTION("BLE_APP_CONTEXT") static BleApplicationContext_t BleApplicationContext;
+PLACE_IN_SECTION("BLE_APP_CONTEXT") static uint16_t AdvIntervalMin, AdvIntervalMax;
+
+static const char local_name[] = { AD_TYPE_COMPLETE_LOCAL_NAME ,'F','L','I','P','P', 'E', 'R'};
+uint8_t  manuf_data[14] = {
+    sizeof(manuf_data)-1, AD_TYPE_MANUFACTURER_SPECIFIC_DATA,
+    0x01/*SKD version */,
+    0x00 /* Generic*/,
+    0x00 /* GROUP A Feature  */,
+    0x00 /* GROUP A Feature */,
+    0x00 /* GROUP B Feature */,
+    0x00 /* GROUP B Feature */,
+    0x00, /* BLE MAC start -MSB */
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00, /* BLE MAC stop */
+
+};
+
+osMutexId_t MtxHciId;
+osSemaphoreId_t SemHciId;
+osThreadId_t AdvUpdateProcessId;
+osThreadId_t HciUserEvtProcessId;
+
+const osThreadAttr_t AdvUpdateProcess_attr = {
+    .name = CFG_ADV_UPDATE_PROCESS_NAME,
+    .attr_bits = CFG_ADV_UPDATE_PROCESS_ATTR_BITS,
+    .cb_mem = CFG_ADV_UPDATE_PROCESS_CB_MEM,
+    .cb_size = CFG_ADV_UPDATE_PROCESS_CB_SIZE,
+    .stack_mem = CFG_ADV_UPDATE_PROCESS_STACK_MEM,
+    .priority = CFG_ADV_UPDATE_PROCESS_PRIORITY,
+    .stack_size = CFG_ADV_UPDATE_PROCESS_STACK_SIZE
+};
+
+const osThreadAttr_t HciUserEvtProcess_attr = {
+    .name = CFG_HCI_USER_EVT_PROCESS_NAME,
+    .attr_bits = CFG_HCI_USER_EVT_PROCESS_ATTR_BITS,
+    .cb_mem = CFG_HCI_USER_EVT_PROCESS_CB_MEM,
+    .cb_size = CFG_HCI_USER_EVT_PROCESS_CB_SIZE,
+    .stack_mem = CFG_HCI_USER_EVT_PROCESS_STACK_MEM,
+    .priority = CFG_HCI_USER_EVT_PROCESS_PRIORITY,
+    .stack_size = CFG_HCI_USER_EVT_PROCESS_STACK_SIZE
+};
+
+/* Private function prototypes -----------------------------------------------*/
+static void HciUserEvtProcess(void *argument);
+static void BLE_UserEvtRx( void * pPayload );
+static void BLE_StatusNot( HCI_TL_CmdStatus_t status );
+static void Ble_Tl_Init( void );
+static void Ble_Hci_Gap_Gatt_Init();
+static const uint8_t* BleGetBdAddress( void );
+static void Adv_Request( APP_BLE_ConnStatus_t New_Status );
+static void Add_Advertisment_Service_UUID( uint16_t servUUID );
+static void Adv_Mgr( void );
+static void AdvUpdateProcess(void *argument);
+static void Adv_Update( void );
+
+
+void APP_BLE_Init() {
+  SHCI_C2_Ble_Init_Cmd_Packet_t ble_init_cmd_packet = {
+    {{0,0,0}},                  /**< Header unused */
+    {0,                         /** pBleBufferAddress not used */
+    0,                          /** BleBufferSize not used */
+    CFG_BLE_NUM_GATT_ATTRIBUTES,
+    CFG_BLE_NUM_GATT_SERVICES,
+    CFG_BLE_ATT_VALUE_ARRAY_SIZE,
+    CFG_BLE_NUM_LINK,
+    CFG_BLE_DATA_LENGTH_EXTENSION,
+    CFG_BLE_PREPARE_WRITE_LIST_SIZE,
+    CFG_BLE_MBLOCK_COUNT,
+    CFG_BLE_MAX_ATT_MTU,
+    CFG_BLE_SLAVE_SCA,
+    CFG_BLE_MASTER_SCA,
+    CFG_BLE_LSE_SOURCE,
+    CFG_BLE_MAX_CONN_EVENT_LENGTH,
+    CFG_BLE_HSE_STARTUP_TIME,
+    CFG_BLE_VITERBI_MODE,
+    CFG_BLE_LL_ONLY,
+    0}
+  };
+
+  // Initialize Ble Transport Layer
+  Ble_Tl_Init( );
+  // Register the hci transport layer to handle BLE User Asynchronous Events
+  HciUserEvtProcessId = osThreadNew(HciUserEvtProcess, NULL, &HciUserEvtProcess_attr);
+  // Starts the BLE Stack on CPU2
+  if (SHCI_C2_BLE_Init( &ble_init_cmd_packet ) != SHCI_Success) {
+    Error_Handler();
+  }
+  // Initialization of HCI & GATT & GAP layer
+  Ble_Hci_Gap_Gatt_Init();
+  // Initialization of the BLE Services
+  SVCCTL_Init();
+  // Initialization of the BLE App Context
+  BleApplicationContext.Device_Connection_Status = APP_BLE_IDLE;
+  BleApplicationContext.BleApplicationContext_legacy.connectionHandle = 0xFFFF;
+  // From here, all initialization are BLE application specific
+  AdvUpdateProcessId = osThreadNew(AdvUpdateProcess, NULL, &AdvUpdateProcess_attr);
+
+  // Initialization of ADV - Ad Manufacturer Element - Support OTA Bit Masks
+#if(BLE_CFG_OTA_REBOOT_CHAR != 0)
+  manuf_data[sizeof(manuf_data)-8] = CFG_FEATURE_OTA_REBOOT;
+#endif
+
+  // Initialize DIS Application
+  DISAPP_Init();
+  // Initialize HRS Application
+  HRSAPP_Init();
+  // Create timer to handle the connection state machine
+  HW_TS_Create(CFG_TIM_PROC_ID_ISR, &(BleApplicationContext.Advertising_mgr_timer_Id), hw_ts_SingleShot, Adv_Mgr);
+
+  // Make device discoverable
+  BleApplicationContext.BleApplicationContext_legacy.advtServUUID[0] = AD_TYPE_16_BIT_SERV_UUID;
+  BleApplicationContext.BleApplicationContext_legacy.advtServUUIDlen = 1;
+  Add_Advertisment_Service_UUID(HEART_RATE_SERVICE_UUID);
+  /* Initialize intervals for reconnexion without intervals update */
+  AdvIntervalMin = CFG_FAST_CONN_ADV_INTERVAL_MIN;
+  AdvIntervalMax = CFG_FAST_CONN_ADV_INTERVAL_MAX;
+
+  Adv_Request(APP_BLE_FAST_ADV);
+}
+
+SVCCTL_UserEvtFlowStatus_t SVCCTL_App_Notification( void *pckt )
+{
+  hci_event_pckt *event_pckt;
+  evt_le_meta_event *meta_evt;
+  evt_blue_aci *blue_evt;
+  hci_le_phy_update_complete_event_rp0 *evt_le_phy_update_complete;
+  uint8_t TX_PHY, RX_PHY;
+  tBleStatus ret = BLE_STATUS_INVALID_PARAMS;
+
+  event_pckt = (hci_event_pckt*) ((hci_uart_pckt *) pckt)->data;
+
+  switch (event_pckt->evt) {
+    case EVT_DISCONN_COMPLETE:
+    {
+      hci_disconnection_complete_event_rp0 *disconnection_complete_event;
+      disconnection_complete_event = (hci_disconnection_complete_event_rp0 *) event_pckt->data;
+
+      if (disconnection_complete_event->Connection_Handle == BleApplicationContext.BleApplicationContext_legacy.connectionHandle) {
+        BleApplicationContext.BleApplicationContext_legacy.connectionHandle = 0;
+        BleApplicationContext.Device_Connection_Status = APP_BLE_IDLE;
+        APP_DBG_MSG("\r\n\r** DISCONNECTION EVENT WITH CLIENT \n");
+      }
+      /* restart advertising */
+      Adv_Request(APP_BLE_FAST_ADV);
+    }
+    break; /* EVT_DISCONN_COMPLETE */
+
+    case EVT_LE_META_EVENT:
+    {
+      meta_evt = (evt_le_meta_event*) event_pckt->data;
+      switch (meta_evt->subevent)
+      {
+        case EVT_LE_CONN_UPDATE_COMPLETE:
+          APP_DBG_MSG("\r\n\r** CONNECTION UPDATE EVENT WITH CLIENT \n");
+
+          /* USER CODE BEGIN EVT_LE_CONN_UPDATE_COMPLETE */
+
+          /* USER CODE END EVT_LE_CONN_UPDATE_COMPLETE */
+          break;
+        case EVT_LE_PHY_UPDATE_COMPLETE:
+          APP_DBG_MSG("EVT_UPDATE_PHY_COMPLETE \n");
+          evt_le_phy_update_complete = (hci_le_phy_update_complete_event_rp0*)meta_evt->data;
+          if (evt_le_phy_update_complete->Status == 0)
+          {
+            APP_DBG_MSG("EVT_UPDATE_PHY_COMPLETE, status ok \n");
+          }
+          else
+          {
+            APP_DBG_MSG("EVT_UPDATE_PHY_COMPLETE, status nok \n");
+          }
+
+          ret = hci_le_read_phy(BleApplicationContext.BleApplicationContext_legacy.connectionHandle,&TX_PHY,&RX_PHY);
+          if (ret == BLE_STATUS_SUCCESS)
+          {
+            APP_DBG_MSG("Read_PHY success \n");
+
+            if ((TX_PHY == TX_2M) && (RX_PHY == RX_2M))
+            {
+              APP_DBG_MSG("PHY Param  TX= %d, RX= %d \n", TX_PHY, RX_PHY);
+            }
+            else
+            {
+              APP_DBG_MSG("PHY Param  TX= %d, RX= %d \n", TX_PHY, RX_PHY);
+            }
+          }
+          else
+          {
+            APP_DBG_MSG("Read conf not succeess \n");
+          }
+          break;
+        case EVT_LE_CONN_COMPLETE:
+        {
+          hci_le_connection_complete_event_rp0 *connection_complete_event;
+
+          /**
+           * The connection is done, there is no need anymore to schedule the LP ADV
+           */
+          connection_complete_event = (hci_le_connection_complete_event_rp0 *) meta_evt->data;
+
+          HW_TS_Stop(BleApplicationContext.Advertising_mgr_timer_Id);
+
+          APP_DBG_MSG("EVT_LE_CONN_COMPLETE for connection handle 0x%x\n", connection_complete_event->Connection_Handle);
+          if (BleApplicationContext.Device_Connection_Status == APP_BLE_LP_CONNECTING)
+          {
+            /* Connection as client */
+            BleApplicationContext.Device_Connection_Status = APP_BLE_CONNECTED_CLIENT;
+          }
+          else
+          {
+            /* Connection as server */
+            BleApplicationContext.Device_Connection_Status = APP_BLE_CONNECTED_SERVER;
+          }
+          BleApplicationContext.BleApplicationContext_legacy.connectionHandle = connection_complete_event->Connection_Handle;
+        }
+        break; /* HCI_EVT_LE_CONN_COMPLETE */
+        default:
+          break;
+      }
+    }
+    break; /* HCI_EVT_LE_META_EVENT */
+
+    case EVT_VENDOR:
+      blue_evt = (evt_blue_aci*) event_pckt->data;
+      switch (blue_evt->ecode) {
+        aci_gap_pairing_complete_event_rp0 *pairing_complete;
+
+      case EVT_BLUE_GAP_LIMITED_DISCOVERABLE: 
+        APP_DBG_MSG("\r\n\r** EVT_BLUE_GAP_LIMITED_DISCOVERABLE \n");
+          break; /* EVT_BLUE_GAP_LIMITED_DISCOVERABLE */
+          
+      case EVT_BLUE_GAP_PASS_KEY_REQUEST:  
+        APP_DBG_MSG("\r\n\r** EVT_BLUE_GAP_PASS_KEY_REQUEST \n");
+
+        aci_gap_pass_key_resp(BleApplicationContext.BleApplicationContext_legacy.connectionHandle,123456);
+
+        APP_DBG_MSG("\r\n\r** aci_gap_pass_key_resp \n");
+          break; /* EVT_BLUE_GAP_PASS_KEY_REQUEST */
+
+      case EVT_BLUE_GAP_AUTHORIZATION_REQUEST:    
+        APP_DBG_MSG("\r\n\r** EVT_BLUE_GAP_AUTHORIZATION_REQUEST \n");
+          break; /* EVT_BLUE_GAP_AUTHORIZATION_REQUEST */
+
+      case EVT_BLUE_GAP_SLAVE_SECURITY_INITIATED:   
+        APP_DBG_MSG("\r\n\r** EVT_BLUE_GAP_SLAVE_SECURITY_INITIATED \n");
+          break; /* EVT_BLUE_GAP_SLAVE_SECURITY_INITIATED */
+
+      case EVT_BLUE_GAP_BOND_LOST:    
+        APP_DBG_MSG("\r\n\r** EVT_BLUE_GAP_BOND_LOST \n");
+          aci_gap_allow_rebond(BleApplicationContext.BleApplicationContext_legacy.connectionHandle);
+        APP_DBG_MSG("\r\n\r** Send allow rebond \n");
+          break; /* EVT_BLUE_GAP_BOND_LOST */
+
+      case EVT_BLUE_GAP_DEVICE_FOUND:  
+        APP_DBG_MSG("\r\n\r** EVT_BLUE_GAP_DEVICE_FOUND \n");
+          break; /* EVT_BLUE_GAP_DEVICE_FOUND */
+
+      case EVT_BLUE_GAP_ADDR_NOT_RESOLVED:
+         APP_DBG_MSG("\r\n\r** EVT_BLUE_GAP_DEVICE_FOUND \n");
+          break; /* EVT_BLUE_GAP_DEVICE_FOUND */
+      
+      case (EVT_BLUE_GAP_KEYPRESS_NOTIFICATION):
+         APP_DBG_MSG("\r\n\r** EVT_BLUE_GAP_KEYPRESS_NOTIFICATION \n");
+          break; /* EVT_BLUE_GAP_KEY_PRESS_NOTIFICATION */    
+
+       case (EVT_BLUE_GAP_NUMERIC_COMPARISON_VALUE):
+          APP_DBG_MSG("numeric_value = %ld\n",
+                      ((aci_gap_numeric_comparison_value_event_rp0 *)(blue_evt->data))->Numeric_Value);
+
+          APP_DBG_MSG("Hex_value = %lx\n",
+                      ((aci_gap_numeric_comparison_value_event_rp0 *)(blue_evt->data))->Numeric_Value);
+
+          aci_gap_numeric_comparison_value_confirm_yesno(BleApplicationContext.BleApplicationContext_legacy.connectionHandle, 1); /* CONFIRM_YES = 1 */
+
+          APP_DBG_MSG("\r\n\r** aci_gap_numeric_comparison_value_confirm_yesno-->YES \n");
+          break;
+
+        case (EVT_BLUE_GAP_PAIRING_CMPLT):
+          {
+            pairing_complete = (aci_gap_pairing_complete_event_rp0*)blue_evt->data;
+
+            APP_DBG_MSG("BLE_CTRL_App_Notification: EVT_BLUE_GAP_PAIRING_CMPLT, pairing_complete->Status = %d\n",pairing_complete->Status);
+            if (pairing_complete->Status == 0) {
+              APP_DBG_MSG("\r\n\r** Pairing OK \n");
+            } else {
+              APP_DBG_MSG("\r\n\r** Pairing KO \n");
+            }
+          }
+          break;
+
+      /* USER CODE END ecode */
+        case EVT_BLUE_GAP_PROCEDURE_COMPLETE:
+          APP_DBG_MSG("\r\n\r** EVT_BLUE_GAP_PROCEDURE_COMPLETE \n");
+          break;
+      }
+      break; /* EVT_VENDOR */
+      default:
+        break;
+  }
+
+  return (SVCCTL_UserEvtFlowEnable);
+}
+
+APP_BLE_ConnStatus_t APP_BLE_Get_Server_Connection_Status() {
+    return BleApplicationContext.Device_Connection_Status;
+}
+
+/* USER CODE BEGIN FD*/
+void APP_BLE_Key_Button1_Action() {
+  tBleStatus ret = BLE_STATUS_INVALID_PARAMS;
+  ret = aci_gap_clear_security_db();
+  if (ret == BLE_STATUS_SUCCESS) {
+    APP_DBG_MSG("Successfully aci_gap_clear_security_db()\n");
+  } else {
+    APP_DBG_MSG("aci_gap_clear_security_db() Failed , result: %d \n", ret);
+  }
+}
+
+void APP_BLE_Key_Button2_Action() {
+  tBleStatus ret = BLE_STATUS_INVALID_PARAMS;
+  ret = aci_gap_slave_security_req(BleApplicationContext.BleApplicationContext_legacy.connectionHandle); 
+  if (ret == BLE_STATUS_SUCCESS) {
+    APP_DBG_MSG("Successfully aci_gap_slave_security_req()");
+  } else {
+    APP_DBG_MSG("aci_gap_slave_security_req() Failed , result: %d \n", ret);
+  }
+}
+  
+void APP_BLE_Key_Button3_Action() {
+  uint8_t TX_PHY, RX_PHY;
+  tBleStatus ret = BLE_STATUS_INVALID_PARAMS;
+  ret = hci_le_read_phy(BleApplicationContext.BleApplicationContext_legacy.connectionHandle,&TX_PHY,&RX_PHY);
+  if (ret == BLE_STATUS_SUCCESS) {
+    APP_DBG_MSG("Read_PHY success \n");
+    APP_DBG_MSG("PHY Param  TX= %d, RX= %d \n", TX_PHY, RX_PHY);
+    if ((TX_PHY == TX_2M) && (RX_PHY == RX_2M)) {
+      APP_DBG_MSG("hci_le_set_phy PHY Param  TX= %d, RX= %d \n", TX_1M, RX_1M);
+      ret = hci_le_set_phy(BleApplicationContext.BleApplicationContext_legacy.connectionHandle,ALL_PHYS_PREFERENCE,TX_1M,RX_1M,0);
+    } else {
+      APP_DBG_MSG("hci_le_set_phy PHY Param  TX= %d, RX= %d \n", TX_2M_PREFERRED, RX_2M_PREFERRED);
+      ret = hci_le_set_phy(BleApplicationContext.BleApplicationContext_legacy.connectionHandle,ALL_PHYS_PREFERENCE,TX_2M_PREFERRED,RX_2M_PREFERRED,0);
+    } 
+  } else {
+    APP_DBG_MSG("Read conf not succeess \n");
+  }
+
+  if (ret == BLE_STATUS_SUCCESS) {
+    APP_DBG_MSG("set PHY cmd ok\n");
+  } else {
+    APP_DBG_MSG("set PHY cmd NOK\n");
+  }
+}
+
+static void Ble_Tl_Init( void ) {
+  HCI_TL_HciInitConf_t Hci_Tl_Init_Conf;
+
+  MtxHciId = osMutexNew( NULL );
+  SemHciId = osSemaphoreNew( 1, 0, NULL ); /*< Create the semaphore and make it busy at initialization */
+
+  Hci_Tl_Init_Conf.p_cmdbuffer = (uint8_t*)&BleCmdBuffer;
+  Hci_Tl_Init_Conf.StatusNotCallBack = BLE_StatusNot;
+  hci_init(BLE_UserEvtRx, (void*) &Hci_Tl_Init_Conf);
+}
+
+static void Ble_Hci_Gap_Gatt_Init() {
+  uint8_t role;
+  uint16_t gap_service_handle, gap_dev_name_char_handle, gap_appearance_char_handle;
+  const uint8_t *bd_addr;
+  uint32_t srd_bd_addr[2];
+  uint16_t appearance[1] = { BLE_CFG_GAP_APPEARANCE };
+
+  /*HCI Reset to synchronise BLE Stack*/
+  hci_reset();
+
+  /**
+   * Write the BD Address
+   */
+  bd_addr = BleGetBdAddress();
+  aci_hal_write_config_data(CONFIG_DATA_PUBADDR_OFFSET,
+                            CONFIG_DATA_PUBADDR_LEN,
+                            (uint8_t*) bd_addr);
+
+  /* BLE MAC in ADV Packet */
+  manuf_data[ sizeof(manuf_data)-6] = bd_addr[5];
+  manuf_data[ sizeof(manuf_data)-5] = bd_addr[4];
+  manuf_data[ sizeof(manuf_data)-4] = bd_addr[3];
+  manuf_data[ sizeof(manuf_data)-3] = bd_addr[2];
+  manuf_data[ sizeof(manuf_data)-2] = bd_addr[1];
+  manuf_data[ sizeof(manuf_data)-1] = bd_addr[0];
+
+  /**
+   * Write Identity root key used to derive LTK and CSRK
+   */
+    aci_hal_write_config_data(CONFIG_DATA_IR_OFFSET,
+    CONFIG_DATA_IR_LEN,
+                            (uint8_t*) BLE_CFG_IR_VALUE);
+
+   /**
+   * Write Encryption root key used to derive LTK and CSRK
+   */
+    aci_hal_write_config_data(CONFIG_DATA_ER_OFFSET,
+    CONFIG_DATA_ER_LEN,
+                            (uint8_t*) BLE_CFG_ER_VALUE);
+
+   /**
+   * Write random bd_address
+   */
+   /* random_bd_address = R_bd_address;
+    aci_hal_write_config_data(CONFIG_DATA_RANDOM_ADDRESS_WR,
+    CONFIG_DATA_RANDOM_ADDRESS_LEN,
+                            (uint8_t*) random_bd_address);
+  */
+
+  /**
+   * Static random Address
+   * The two upper bits shall be set to 1
+   * The lowest 32bits is read from the UDN to differentiate between devices
+   * The RNG may be used to provide a random number on each power on
+   */
+  srd_bd_addr[1] =  0x0000ED6E;
+  srd_bd_addr[0] =  LL_FLASH_GetUDN( );
+  aci_hal_write_config_data( CONFIG_DATA_RANDOM_ADDRESS_OFFSET, CONFIG_DATA_RANDOM_ADDRESS_LEN, (uint8_t*)srd_bd_addr );
+
+  /**
+   * Write Identity root key used to derive LTK and CSRK
+   */
+    aci_hal_write_config_data( CONFIG_DATA_IR_OFFSET, CONFIG_DATA_IR_LEN, (uint8_t*)BLE_CFG_IR_VALUE );
+
+   /**
+   * Write Encryption root key used to derive LTK and CSRK
+   */
+    aci_hal_write_config_data( CONFIG_DATA_ER_OFFSET, CONFIG_DATA_ER_LEN, (uint8_t*)BLE_CFG_ER_VALUE );
+
+  /**
+   * Set TX Power to 0dBm.
+   */
+  aci_hal_set_tx_power_level(1, CFG_TX_POWER);
+
+  /**
+   * Initialize GATT interface
+   */
+  aci_gatt_init();
+
+  /**
+   * Initialize GAP interface
+   */
+  role = 0;
+
+#if (BLE_CFG_PERIPHERAL == 1)
+  role |= GAP_PERIPHERAL_ROLE;
+#endif
+
+#if (BLE_CFG_CENTRAL == 1)
+  role |= GAP_CENTRAL_ROLE;
+#endif
+
+  if (role > 0)
+  {
+    const char *name = "Flipper";
+    aci_gap_init(role, 0,
+                 APPBLE_GAP_DEVICE_NAME_LENGTH,
+                 &gap_service_handle, &gap_dev_name_char_handle, &gap_appearance_char_handle);
+
+    if (aci_gatt_update_char_value(gap_service_handle, gap_dev_name_char_handle, 0, strlen(name), (uint8_t *) name))
+    {
+      BLE_DBG_SVCCTL_MSG("Device Name aci_gatt_update_char_value failed.\n");
+    }
+  }
+
+  if(aci_gatt_update_char_value(gap_service_handle,
+                                gap_appearance_char_handle,
+                                0,
+                                2,
+                                (uint8_t *)&appearance))
+  {
+    BLE_DBG_SVCCTL_MSG("Appearance aci_gatt_update_char_value failed.\n");
+  }
+  /**
+   * Initialize Default PHY
+   */
+  hci_le_set_default_phy(ALL_PHYS_PREFERENCE,TX_2M_PREFERRED,RX_2M_PREFERRED);
+
+  /**
+   * Initialize IO capability
+   */
+  BleApplicationContext.BleApplicationContext_legacy.bleSecurityParam.ioCapability = CFG_IO_CAPABILITY;
+  aci_gap_set_io_capability(BleApplicationContext.BleApplicationContext_legacy.bleSecurityParam.ioCapability);
+
+  /**
+   * Initialize authentication
+   */
+  BleApplicationContext.BleApplicationContext_legacy.bleSecurityParam.mitm_mode = CFG_MITM_PROTECTION;
+  BleApplicationContext.BleApplicationContext_legacy.bleSecurityParam.encryptionKeySizeMin = CFG_ENCRYPTION_KEY_SIZE_MIN;
+  BleApplicationContext.BleApplicationContext_legacy.bleSecurityParam.encryptionKeySizeMax = CFG_ENCRYPTION_KEY_SIZE_MAX;
+  BleApplicationContext.BleApplicationContext_legacy.bleSecurityParam.Use_Fixed_Pin = CFG_USED_FIXED_PIN;
+  BleApplicationContext.BleApplicationContext_legacy.bleSecurityParam.Fixed_Pin = CFG_FIXED_PIN;
+  BleApplicationContext.BleApplicationContext_legacy.bleSecurityParam.bonding_mode = CFG_BONDING_MODE;
+
+  aci_gap_set_authentication_requirement(BleApplicationContext.BleApplicationContext_legacy.bleSecurityParam.bonding_mode,
+                                         BleApplicationContext.BleApplicationContext_legacy.bleSecurityParam.mitm_mode,
+                                         CFG_SC_SUPPORT,
+                                         CFG_KEYPRESS_NOTIFICATION_SUPPORT,
+                                         BleApplicationContext.BleApplicationContext_legacy.bleSecurityParam.encryptionKeySizeMin,
+                                         BleApplicationContext.BleApplicationContext_legacy.bleSecurityParam.encryptionKeySizeMax,
+                                         BleApplicationContext.BleApplicationContext_legacy.bleSecurityParam.Use_Fixed_Pin,
+                                         BleApplicationContext.BleApplicationContext_legacy.bleSecurityParam.Fixed_Pin,
+                                         PUBLIC_ADDR
+                                         );
+
+  /**
+   * Initialize whitelist
+   */
+   if (BleApplicationContext.BleApplicationContext_legacy.bleSecurityParam.bonding_mode)
+   {
+     aci_gap_configure_whitelist();
+   }
+}
+
+static void Adv_Request(APP_BLE_ConnStatus_t New_Status)
+{
+  tBleStatus ret = BLE_STATUS_INVALID_PARAMS;
+  uint16_t Min_Inter, Max_Inter;
+
+  if (New_Status == APP_BLE_FAST_ADV)
+  {
+    Min_Inter = AdvIntervalMin;
+    Max_Inter = AdvIntervalMax;
+  }
+  else
+  {
+    Min_Inter = CFG_LP_CONN_ADV_INTERVAL_MIN;
+    Max_Inter = CFG_LP_CONN_ADV_INTERVAL_MAX;
+  }
+
+    /**
+     * Stop the timer, it will be restarted for a new shot
+     * It does not hurt if the timer was not running
+     */
+    HW_TS_Stop(BleApplicationContext.Advertising_mgr_timer_Id);
+
+    APP_DBG_MSG("First index in %d state \n", BleApplicationContext.Device_Connection_Status);
+
+    if ((New_Status == APP_BLE_LP_ADV)
+        && ((BleApplicationContext.Device_Connection_Status == APP_BLE_FAST_ADV)
+            || (BleApplicationContext.Device_Connection_Status == APP_BLE_LP_ADV)))
+    {
+      /* Connection in ADVERTISE mode have to stop the current advertising */
+      ret = aci_gap_set_non_discoverable();
+      if (ret == BLE_STATUS_SUCCESS)
+      {
+        APP_DBG_MSG("Successfully Stopped Advertising \n");
+      }
+      else
+      {
+        APP_DBG_MSG("Stop Advertising Failed , result: %d \n", ret);
+      }
+    }
+
+    BleApplicationContext.Device_Connection_Status = New_Status;
+    /* Start Fast or Low Power Advertising */
+    ret = aci_gap_set_discoverable(
+        ADV_IND,
+        Min_Inter,
+        Max_Inter,
+        PUBLIC_ADDR,
+        NO_WHITE_LIST_USE, /* use white list */
+        sizeof(local_name),
+        (uint8_t*) &local_name,
+        BleApplicationContext.BleApplicationContext_legacy.advtServUUIDlen,
+        BleApplicationContext.BleApplicationContext_legacy.advtServUUID,
+        0,
+        0);
+
+    /* Update Advertising data */
+    ret = aci_gap_update_adv_data(sizeof(manuf_data), (uint8_t*) manuf_data);
+    if (ret == BLE_STATUS_SUCCESS) {
+      if (New_Status == APP_BLE_FAST_ADV) {
+        APP_DBG_MSG("Successfully Start Fast Advertising \n" );
+        /* Start Timer to STOP ADV - TIMEOUT */
+        HW_TS_Start(BleApplicationContext.Advertising_mgr_timer_Id, INITIAL_ADV_TIMEOUT);
+      } else {
+        APP_DBG_MSG("Successfully Start Low Power Advertising \n");
+      }
+    } else {
+      if (New_Status == APP_BLE_FAST_ADV) {
+        APP_DBG_MSG("Start Fast Advertising Failed , result: %d \n", ret);
+      } else {
+        APP_DBG_MSG("Start Low Power Advertising Failed , result: %d \n", ret);
+      }
+    }
+}
+
+const uint8_t* BleGetBdAddress( void ) {
+  uint8_t *otp_addr;
+  const uint8_t *bd_addr;
+  uint32_t udn;
+  uint32_t company_id;
+  uint32_t device_id;
+
+  udn = LL_FLASH_GetUDN();
+
+  if(udn != 0xFFFFFFFF) {
+    company_id = LL_FLASH_GetSTCompanyID();
+    device_id = LL_FLASH_GetDeviceID();
+
+    bd_addr_udn[0] = (uint8_t)(udn & 0x000000FF);
+    bd_addr_udn[1] = (uint8_t)( (udn & 0x0000FF00) >> 8 );
+    bd_addr_udn[2] = (uint8_t)( (udn & 0x00FF0000) >> 16 );
+    bd_addr_udn[3] = (uint8_t)device_id;
+    bd_addr_udn[4] = (uint8_t)(company_id & 0x000000FF);;
+    bd_addr_udn[5] = (uint8_t)( (company_id & 0x0000FF00) >> 8 );
+
+    bd_addr = (const uint8_t *)bd_addr_udn;
+  } else {
+    otp_addr = OTP_Read(0);
+    if(otp_addr) {
+      bd_addr = ((OTP_ID0_t*)otp_addr)->bd_address;
+    } else {
+      bd_addr = M_bd_addr;
+    }
+  }
+
+  return bd_addr;
+}
+
+/*************************************************************
+ *
+ *SPECIFIC FUNCTIONS
+ *
+ *************************************************************/
+static void Add_Advertisment_Service_UUID( uint16_t servUUID ) {
+  BleApplicationContext.BleApplicationContext_legacy.advtServUUID[BleApplicationContext.BleApplicationContext_legacy.advtServUUIDlen] =
+      (uint8_t) (servUUID & 0xFF);
+  BleApplicationContext.BleApplicationContext_legacy.advtServUUIDlen++;
+  BleApplicationContext.BleApplicationContext_legacy.advtServUUID[BleApplicationContext.BleApplicationContext_legacy.advtServUUIDlen] =
+      (uint8_t) (servUUID >> 8) & 0xFF;
+  BleApplicationContext.BleApplicationContext_legacy.advtServUUIDlen++;
+
+}
+
+static void Adv_Mgr( void ) {
+  /**
+   * The code shall be executed in the background as an aci command may be sent
+   * The background is the only place where the application can make sure a new aci command
+   * is not sent if there is a pending one
+   */
+  osThreadFlagsSet( AdvUpdateProcessId, 1 );
+}
+
+static void AdvUpdateProcess(void *argument) {
+  UNUSED(argument);
+
+  for(;;) {
+    osThreadFlagsWait( 1, osFlagsWaitAny, osWaitForever);
+    Adv_Update( );
+  }
+}
+
+static void Adv_Update( void ) {
+  Adv_Request(APP_BLE_LP_ADV);
+
+}
+
+static void HciUserEvtProcess(void *argument) {
+  UNUSED(argument);
+
+  for(;;)
+  {
+    osThreadFlagsWait( 1, osFlagsWaitAny, osWaitForever);
+    hci_user_evt_proc( );
+  }
+}
+
+/*************************************************************
+ *
+ * WRAP FUNCTIONS
+ *
+ *************************************************************/
+void hci_notify_asynch_evt(void* pdata) {
+  UNUSED(pdata);
+  osThreadFlagsSet( HciUserEvtProcessId, 1 );
+}
+
+void hci_cmd_resp_release(uint32_t flag) {
+  UNUSED(flag);
+  osSemaphoreRelease( SemHciId );
+}
+
+void hci_cmd_resp_wait(uint32_t timeout) {
+  UNUSED(timeout);
+  osSemaphoreAcquire( SemHciId, osWaitForever );
+}
+
+static void BLE_UserEvtRx( void * pPayload ) {
+  SVCCTL_UserEvtFlowStatus_t svctl_return_status;
+  tHCI_UserEvtRxParam *pParam;
+
+  pParam = (tHCI_UserEvtRxParam *)pPayload;
+
+  svctl_return_status = SVCCTL_UserEvtRx((void *)&(pParam->pckt->evtserial));
+  if (svctl_return_status != SVCCTL_UserEvtFlowDisable) {
+    pParam->status = HCI_TL_UserEventFlow_Enable;
+  } else {
+    pParam->status = HCI_TL_UserEventFlow_Disable;
+  }
+}
+
+static void BLE_StatusNot( HCI_TL_CmdStatus_t status ) {
+  switch (status) {
+    case HCI_TL_CmdBusy:
+      osMutexAcquire( MtxHciId, osWaitForever );
+      break;
+    case HCI_TL_CmdAvailable:
+      osMutexRelease( MtxHciId );
+      break;
+    default:
+      break;
+  }
+}
+
+void SVCCTL_ResumeUserEventFlow( void ) {
+  hci_resume_flow();
+}
diff --git a/firmware/targets/f3/ble-glue/app_ble.h b/firmware/targets/f3/ble-glue/app_ble.h
new file mode 100644
index 00000000..f7d43256
--- /dev/null
+++ b/firmware/targets/f3/ble-glue/app_ble.h
@@ -0,0 +1,29 @@
+#pragma once 
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "hci_tl.h"
+
+typedef enum {
+    APP_BLE_IDLE,
+    APP_BLE_FAST_ADV,
+    APP_BLE_LP_ADV,
+    APP_BLE_SCAN,
+    APP_BLE_LP_CONNECTING,
+    APP_BLE_CONNECTED_SERVER,
+    APP_BLE_CONNECTED_CLIENT
+} APP_BLE_ConnStatus_t;
+
+void APP_BLE_Init();
+
+APP_BLE_ConnStatus_t APP_BLE_Get_Server_Connection_Status();
+
+void APP_BLE_Key_Button1_Action();
+void APP_BLE_Key_Button2_Action();
+void APP_BLE_Key_Button3_Action();
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/firmware/targets/f3/ble-glue/app_common.h b/firmware/targets/f3/ble-glue/app_common.h
new file mode 100644
index 00000000..cf8a5baa
--- /dev/null
+++ b/firmware/targets/f3/ble-glue/app_common.h
@@ -0,0 +1,119 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+  * File Name          : app_common.h
+  * Description        : App Common application configuration file for STM32WPAN Middleware.
+  *
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef APP_COMMON_H
+#define APP_COMMON_H
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+#include <stdint.h>
+#include <string.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <stdarg.h>
+
+#include "app_conf.h"
+
+  /* -------------------------------- *
+   *  Basic definitions               *
+   * -------------------------------- */
+
+#undef NULL
+#define NULL                    0
+
+#undef FALSE
+#define FALSE                   0
+
+#undef TRUE
+#define TRUE                    (!0)
+
+  /* -------------------------------- *
+   *  Critical Section definition     *
+   * -------------------------------- */
+#define BACKUP_PRIMASK()    uint32_t primask_bit= __get_PRIMASK()
+#define DISABLE_IRQ()       __disable_irq()
+#define RESTORE_PRIMASK()   __set_PRIMASK(primask_bit)
+
+  /* -------------------------------- *
+   *  Macro delimiters                *
+   * -------------------------------- */
+
+#define M_BEGIN     do {
+
+#define M_END       } while(0)
+
+  /* -------------------------------- *
+   *  Some useful macro definitions   *
+   * -------------------------------- */
+
+#ifndef MAX
+#define MAX( x, y )          (((x)>(y))?(x):(y))
+#endif
+
+#ifndef MIN
+#define MIN( x, y )          (((x)<(y))?(x):(y))
+#endif
+
+#define MODINC( a, m )       M_BEGIN  (a)++;  if ((a)>=(m)) (a)=0;  M_END
+
+#define MODDEC( a, m )       M_BEGIN  if ((a)==0) (a)=(m);  (a)--;  M_END
+
+#define MODADD( a, b, m )    M_BEGIN  (a)+=(b);  if ((a)>=(m)) (a)-=(m);  M_END
+
+#define MODSUB( a, b, m )    MODADD( a, (m)-(b), m )
+
+#define PAUSE( t )           M_BEGIN \
+                               __IO int _i; \
+                               for ( _i = t; _i > 0; _i -- ); \
+                             M_END
+
+#define DIVF( x, y )         ((x)/(y))
+
+#define DIVC( x, y )         (((x)+(y)-1)/(y))
+
+#define DIVR( x, y )         (((x)+((y)/2))/(y))
+
+#define SHRR( x, n )         ((((x)>>((n)-1))+1)>>1)
+
+#define BITN( w, n )         (((w)[(n)/32] >> ((n)%32)) & 1)
+
+#define BITNSET( w, n, b )   M_BEGIN (w)[(n)/32] |= ((U32)(b))<<((n)%32); M_END
+
+  /* -------------------------------- *
+   *  Compiler                         *
+   * -------------------------------- */
+#define PLACE_IN_SECTION( __x__ )  __attribute__((section (__x__)))
+
+#ifdef WIN32
+#define ALIGN(n)
+#else
+#define ALIGN(n)             __attribute__((aligned(n)))
+#endif
+
+#ifdef __cplusplus
+} /* extern "C" */
+#endif
+
+#endif /*APP_COMMON_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/firmware/targets/f3/ble-glue/app_conf.h b/firmware/targets/f3/ble-glue/app_conf.h
new file mode 100644
index 00000000..3d785053
--- /dev/null
+++ b/firmware/targets/f3/ble-glue/app_conf.h
@@ -0,0 +1,474 @@
+#pragma once
+
+#include "hw.h"
+#include "hw_conf.h"
+#include "hw_if.h"
+#include "ble_bufsize.h"
+
+#define CFG_TX_POWER                      (0x18) /* -0.15dBm */
+
+/**
+ * Define Advertising parameters
+ */
+#define CFG_ADV_BD_ADDRESS                (0x7257acd87a6c)
+#define CFG_FAST_CONN_ADV_INTERVAL_MIN    (0x80)   /**< 80ms */
+#define CFG_FAST_CONN_ADV_INTERVAL_MAX    (0xa0)  /**< 100ms */
+#define CFG_LP_CONN_ADV_INTERVAL_MIN      (0x640) /**< 1s */
+#define CFG_LP_CONN_ADV_INTERVAL_MAX      (0xfa0) /**< 2.5s */
+
+/**
+ * Define IO Authentication
+ */
+#define CFG_BONDING_MODE                 (1)
+#define CFG_FIXED_PIN                    (111111)
+#define CFG_USED_FIXED_PIN               (0)
+#define CFG_ENCRYPTION_KEY_SIZE_MAX      (16)
+#define CFG_ENCRYPTION_KEY_SIZE_MIN      (8)
+
+/**
+ * Define IO capabilities
+ */
+#define CFG_IO_CAPABILITY_DISPLAY_ONLY       (0x00)
+#define CFG_IO_CAPABILITY_DISPLAY_YES_NO     (0x01)
+#define CFG_IO_CAPABILITY_KEYBOARD_ONLY      (0x02)
+#define CFG_IO_CAPABILITY_NO_INPUT_NO_OUTPUT (0x03)
+#define CFG_IO_CAPABILITY_KEYBOARD_DISPLAY   (0x04)
+
+#define CFG_IO_CAPABILITY              CFG_IO_CAPABILITY_DISPLAY_YES_NO
+
+/**
+ * Define MITM modes
+ */
+#define CFG_MITM_PROTECTION_NOT_REQUIRED      (0x00)
+#define CFG_MITM_PROTECTION_REQUIRED          (0x01)
+
+#define CFG_MITM_PROTECTION             CFG_MITM_PROTECTION_REQUIRED
+
+/**
+ * Define Secure Connections Support
+ */
+#define CFG_SECURE_NOT_SUPPORTED       (0x00)
+#define CFG_SECURE_OPTIONAL            (0x01)
+#define CFG_SECURE_MANDATORY           (0x02)
+
+#define CFG_SC_SUPPORT                 CFG_SECURE_OPTIONAL
+
+/**
+ * Define Keypress Notification Support
+ */
+#define CFG_KEYPRESS_NOT_SUPPORTED      (0x00)
+#define CFG_KEYPRESS_SUPPORTED          (0x01)
+
+#define CFG_KEYPRESS_NOTIFICATION_SUPPORT             CFG_KEYPRESS_NOT_SUPPORTED
+
+/**
+ * Numeric Comparison Answers
+ */
+#define YES (0x01)
+#define NO  (0x00)
+
+/**
+ * Device name configuration for Generic Access Service
+ */
+#define CFG_GAP_DEVICE_NAME             "TEMPLATE"
+#define CFG_GAP_DEVICE_NAME_LENGTH      (8)
+
+/**
+ * Define PHY
+ */
+#define ALL_PHYS_PREFERENCE                             0x00
+#define RX_2M_PREFERRED                                 0x02
+#define TX_2M_PREFERRED                                 0x02
+#define TX_1M                                           0x01
+#define TX_2M                                           0x02
+#define RX_1M                                           0x01
+#define RX_2M                                           0x02
+
+/**
+*   Identity root key used to derive LTK and CSRK
+*/
+#define CFG_BLE_IRK     {0x12,0x34,0x56,0x78,0x9a,0xbc,0xde,0xf0,0x12,0x34,0x56,0x78,0x9a,0xbc,0xde,0xf0}
+
+/**
+* Encryption root key used to derive LTK and CSRK
+*/
+#define CFG_BLE_ERK     {0xfe,0xdc,0xba,0x09,0x87,0x65,0x43,0x21,0xfe,0xdc,0xba,0x09,0x87,0x65,0x43,0x21}
+
+/* USER CODE BEGIN Generic_Parameters */
+/**
+ * SMPS supply
+ * SMPS not used when Set to 0
+ * SMPS used when Set to 1
+ */
+#define CFG_USE_SMPS    1
+/* USER CODE END Generic_Parameters */
+
+/**< specific parameters */
+/*****************************************************/
+
+/**
+* AD Element - Group B Feature
+*/
+/* LSB - Second Byte */
+#define CFG_FEATURE_OTA_REBOOT                  (0x20)
+
+/******************************************************************************
+ * BLE Stack
+ ******************************************************************************/
+/**
+ * Maximum number of simultaneous connections that the device will support.
+ * Valid values are from 1 to 8
+ */
+#define CFG_BLE_NUM_LINK            2
+
+/**
+ * Maximum number of Services that can be stored in the GATT database.
+ * Note that the GAP and GATT services are automatically added so this parameter should be 2 plus the number of user services
+ */
+#define CFG_BLE_NUM_GATT_SERVICES   8
+
+/**
+ * Maximum number of Attributes
+ * (i.e. the number of characteristic + the number of characteristic values + the number of descriptors, excluding the services)
+ * that can be stored in the GATT database.
+ * Note that certain characteristics and relative descriptors are added automatically during device initialization
+ * so this parameters should be 9 plus the number of user Attributes
+ */
+#define CFG_BLE_NUM_GATT_ATTRIBUTES 68
+
+/**
+ * Maximum supported ATT_MTU size
+ */
+#define CFG_BLE_MAX_ATT_MTU             (156)
+
+/**
+ * Size of the storage area for Attribute values
+ *  This value depends on the number of attributes used by application. In particular the sum of the following quantities (in octets) should be made for each attribute:
+ *  - attribute value length
+ *  - 5, if UUID is 16 bit; 19, if UUID is 128 bit
+ *  - 2, if server configuration descriptor is used
+ *  - 2*DTM_NUM_LINK, if client configuration descriptor is used
+ *  - 2, if extended properties is used
+ *  The total amount of memory needed is the sum of the above quantities for each attribute.
+ */
+#define CFG_BLE_ATT_VALUE_ARRAY_SIZE    (1344)
+
+/**
+ * Prepare Write List size in terms of number of packet
+ */
+#define CFG_BLE_PREPARE_WRITE_LIST_SIZE         BLE_PREP_WRITE_X_ATT(CFG_BLE_MAX_ATT_MTU)
+
+/**
+ * Number of allocated memory blocks
+ */
+#define CFG_BLE_MBLOCK_COUNT            (BLE_MBLOCKS_CALC(CFG_BLE_PREPARE_WRITE_LIST_SIZE, CFG_BLE_MAX_ATT_MTU, CFG_BLE_NUM_LINK))
+
+/**
+ * Enable or disable the Extended Packet length feature. Valid values are 0 or 1.
+ */
+#define CFG_BLE_DATA_LENGTH_EXTENSION   1
+
+/**
+ * Sleep clock accuracy in Slave mode (ppm value)
+ */
+#define CFG_BLE_SLAVE_SCA   500
+
+/**
+ * Sleep clock accuracy in Master mode
+ * 0 : 251 ppm to 500 ppm
+ * 1 : 151 ppm to 250 ppm
+ * 2 : 101 ppm to 150 ppm
+ * 3 : 76 ppm to 100 ppm
+ * 4 : 51 ppm to 75 ppm
+ * 5 : 31 ppm to 50 ppm
+ * 6 : 21 ppm to 30 ppm
+ * 7 : 0 ppm to 20 ppm
+ */
+#define CFG_BLE_MASTER_SCA   0
+
+/**
+ *  Source for the low speed clock for RF wake-up
+ *  1 : external high speed crystal HSE/32/32
+ *  0 : external low speed crystal ( no calibration )
+ */
+#define CFG_BLE_LSE_SOURCE  0
+
+/**
+ * Start up time of the high speed (16 or 32 MHz) crystal oscillator in units of 625/256 us (~2.44 us)
+ */
+#define CFG_BLE_HSE_STARTUP_TIME  0x148
+
+/**
+ * Maximum duration of the connection event when the device is in Slave mode in units of 625/256 us (~2.44 us)
+ */
+#define CFG_BLE_MAX_CONN_EVENT_LENGTH  ( 0xFFFFFFFF )
+
+/**
+ * Viterbi Mode
+ * 1 : enabled
+ * 0 : disabled
+ */
+#define CFG_BLE_VITERBI_MODE  1
+
+/**
+ *  LL Only Mode
+ *  1 : LL Only
+ *  0 : LL + Host
+ */
+#define CFG_BLE_LL_ONLY  0
+/******************************************************************************
+ * Transport Layer
+ ******************************************************************************/
+/**
+ * Queue length of BLE Event
+ * This parameter defines the number of asynchronous events that can be stored in the HCI layer before
+ * being reported to the application. When a command is sent to the BLE core coprocessor, the HCI layer
+ * is waiting for the event with the Num_HCI_Command_Packets set to 1. The receive queue shall be large
+ * enough to store all asynchronous events received in between.
+ * When CFG_TLBLE_MOST_EVENT_PAYLOAD_SIZE is set to 27, this allow to store three 255 bytes long asynchronous events
+ * between the HCI command and its event.
+ * This parameter depends on the value given to CFG_TLBLE_MOST_EVENT_PAYLOAD_SIZE. When the queue size is to small,
+ * the system may hang if the queue is full with asynchronous events and the HCI layer is still waiting
+ * for a CC/CS event, In that case, the notification TL_BLE_HCI_ToNot() is called to indicate
+ * to the application a HCI command did not receive its command event within 30s (Default HCI Timeout).
+ */
+#define CFG_TLBLE_EVT_QUEUE_LENGTH 5
+/**
+ * This parameter should be set to fit most events received by the HCI layer. It defines the buffer size of each element
+ * allocated in the queue of received events and can be used to optimize the amount of RAM allocated by the Memory Manager.
+ * It should not exceed 255 which is the maximum HCI packet payload size (a greater value is a lost of memory as it will
+ * never be used)
+ * With the current wireless firmware implementation, this parameter shall be kept to 255
+ *
+ */
+#define CFG_TLBLE_MOST_EVENT_PAYLOAD_SIZE 255   /**< Set to 255 with the memory manager and the mailbox */
+
+#define TL_BLE_EVENT_FRAME_SIZE ( TL_EVT_HDR_SIZE + CFG_TLBLE_MOST_EVENT_PAYLOAD_SIZE )
+/******************************************************************************
+ * UART interfaces
+ ******************************************************************************/
+
+/**
+ * Select UART interfaces
+ */
+#define CFG_DEBUG_TRACE_UART    hw_uart1
+#define CFG_CONSOLE_MENU      0
+
+/******************************************************************************
+ * Low Power
+ ******************************************************************************/
+/**
+ *  When set to 1, the low power mode is enable
+ *  When set to 0, the device stays in RUN mode
+ */
+#define CFG_LPM_SUPPORTED    0
+
+/******************************************************************************
+ * Timer Server
+ ******************************************************************************/
+/**
+ *  CFG_RTC_WUCKSEL_DIVIDER:  This sets the RTCCLK divider to the wakeup timer.
+ *  The lower is the value, the better is the power consumption and the accuracy of the timerserver
+ *  The higher is the value, the finest is the granularity
+ *
+ *  CFG_RTC_ASYNCH_PRESCALER: This sets the asynchronous prescaler of the RTC. It should as high as possible ( to ouput
+ *  clock as low as possible) but the output clock should be equal or higher frequency compare to the clock feeding
+ *  the wakeup timer. A lower clock speed would impact the accuracy of the timer server.
+ *
+ *  CFG_RTC_SYNCH_PRESCALER: This sets the synchronous prescaler of the RTC.
+ *  When the 1Hz calendar clock is required, it shall be sets according to other settings
+ *  When the 1Hz calendar clock is not needed, CFG_RTC_SYNCH_PRESCALER should be set to 0x7FFF (MAX VALUE)
+ *
+ *  CFG_RTCCLK_DIVIDER_CONF:
+ *  Shall be set to either 0,2,4,8,16
+ *  When set to either 2,4,8,16, the 1Hhz calendar is supported
+ *  When set to 0, the user sets its own configuration
+ *
+ *  The following settings are computed with LSI as input to the RTC
+ */
+#define CFG_RTCCLK_DIVIDER_CONF 0
+
+#if (CFG_RTCCLK_DIVIDER_CONF == 0)
+/**
+ * Custom configuration
+ * It does not support 1Hz calendar
+ * It divides the RTC CLK by 16
+ */
+#define CFG_RTCCLK_DIV  (16)
+#define CFG_RTC_WUCKSEL_DIVIDER (0)
+#define CFG_RTC_ASYNCH_PRESCALER (CFG_RTCCLK_DIV - 1)
+#define CFG_RTC_SYNCH_PRESCALER (0x7FFF)
+
+#else
+
+#if (CFG_RTCCLK_DIVIDER_CONF == 2)
+/**
+ * It divides the RTC CLK by 2
+ */
+#define CFG_RTC_WUCKSEL_DIVIDER (3)
+#endif
+
+#if (CFG_RTCCLK_DIVIDER_CONF == 4)
+/**
+ * It divides the RTC CLK by 4
+ */
+#define CFG_RTC_WUCKSEL_DIVIDER (2)
+#endif
+
+#if (CFG_RTCCLK_DIVIDER_CONF == 8)
+/**
+ * It divides the RTC CLK by 8
+ */
+#define CFG_RTC_WUCKSEL_DIVIDER (1)
+#endif
+
+#if (CFG_RTCCLK_DIVIDER_CONF == 16)
+/**
+ * It divides the RTC CLK by 16
+ */
+#define CFG_RTC_WUCKSEL_DIVIDER (0)
+#endif
+
+#define CFG_RTCCLK_DIV              CFG_RTCCLK_DIVIDER_CONF
+#define CFG_RTC_ASYNCH_PRESCALER    (CFG_RTCCLK_DIV - 1)
+#define CFG_RTC_SYNCH_PRESCALER     (DIVR( LSE_VALUE, (CFG_RTC_ASYNCH_PRESCALER+1) ) - 1 )
+
+#endif
+
+/** tick timer value in us */
+#define CFG_TS_TICK_VAL           DIVR( (CFG_RTCCLK_DIV * 1000000), LSE_VALUE )
+
+typedef enum
+{
+  CFG_TIM_PROC_ID_ISR,
+  /* USER CODE BEGIN CFG_TimProcID_t */
+
+  /* USER CODE END CFG_TimProcID_t */
+} CFG_TimProcID_t;
+
+/******************************************************************************
+ * Debug
+ ******************************************************************************/
+/**
+ * When set, this resets some hw resources to set the device in the same state than the power up
+ * The FW resets only register that may prevent the FW to run properly
+ *
+ * This shall be set to 0 in a final product
+ *
+ */
+#define CFG_HW_RESET_BY_FW         0
+
+/**
+ * keep debugger enabled while in any low power mode when set to 1
+ * should be set to 0 in production
+ */
+#define CFG_DEBUGGER_SUPPORTED    0
+
+/**
+ * When set to 1, the traces are enabled in the BLE services
+ */
+#define CFG_DEBUG_BLE_TRACE     0
+
+/**
+ * Enable or Disable traces in application
+ */
+#define CFG_DEBUG_APP_TRACE     0
+
+#if (CFG_DEBUG_APP_TRACE != 0)
+#define APP_DBG_MSG                 PRINT_MESG_DBG
+#else
+#define APP_DBG_MSG                 PRINT_NO_MESG
+#endif
+
+#if ( (CFG_DEBUG_BLE_TRACE != 0) || (CFG_DEBUG_APP_TRACE != 0) )
+#define CFG_DEBUG_TRACE             1
+#endif
+
+#if (CFG_DEBUG_TRACE != 0)
+#undef CFG_LPM_SUPPORTED
+#undef CFG_DEBUGGER_SUPPORTED
+#define CFG_LPM_SUPPORTED         0
+#define CFG_DEBUGGER_SUPPORTED      1
+#endif
+
+/**
+ * When CFG_DEBUG_TRACE_FULL is set to 1, the trace are output with the API name, the file name and the line number
+ * When CFG_DEBUG_TRACE_LIGHT is set to 1, only the debug message is output
+ *
+ * When both are set to 0, no trace are output
+ * When both are set to 1,  CFG_DEBUG_TRACE_FULL is selected
+ */
+#define CFG_DEBUG_TRACE_LIGHT     0
+#define CFG_DEBUG_TRACE_FULL      0
+
+#if (( CFG_DEBUG_TRACE != 0 ) && ( CFG_DEBUG_TRACE_LIGHT == 0 ) && (CFG_DEBUG_TRACE_FULL == 0))
+#undef CFG_DEBUG_TRACE_FULL
+#undef CFG_DEBUG_TRACE_LIGHT
+#define CFG_DEBUG_TRACE_FULL      0
+#define CFG_DEBUG_TRACE_LIGHT     1
+#endif
+
+#if ( CFG_DEBUG_TRACE == 0 )
+#undef CFG_DEBUG_TRACE_FULL
+#undef CFG_DEBUG_TRACE_LIGHT
+#define CFG_DEBUG_TRACE_FULL      0
+#define CFG_DEBUG_TRACE_LIGHT     0
+#endif
+
+/**
+ * When not set, the traces is looping on sending the trace over UART
+ */
+#define DBG_TRACE_USE_CIRCULAR_QUEUE 0
+
+/**
+ * max buffer Size to queue data traces and max data trace allowed.
+ * Only Used if DBG_TRACE_USE_CIRCULAR_QUEUE is defined
+ */
+#define DBG_TRACE_MSG_QUEUE_SIZE 4096
+#define MAX_DBG_TRACE_MSG_SIZE 1024
+
+#define CFG_LED_SUPPORTED         0
+#define CFG_BUTTON_SUPPORTED      0
+
+/******************************************************************************
+ * FreeRTOS
+ ******************************************************************************/
+#define CFG_SHCI_USER_EVT_PROCESS_NAME        "ble_shci_evt"
+#define CFG_SHCI_USER_EVT_PROCESS_ATTR_BITS   (0)
+#define CFG_SHCI_USER_EVT_PROCESS_CB_MEM      (0)
+#define CFG_SHCI_USER_EVT_PROCESS_CB_SIZE     (0)
+#define CFG_SHCI_USER_EVT_PROCESS_STACK_MEM   (0)
+#define CFG_SHCI_USER_EVT_PROCESS_PRIORITY    osPriorityNone
+#define CFG_SHCI_USER_EVT_PROCESS_STACK_SIZE  (128 * 7)
+
+#define CFG_HCI_USER_EVT_PROCESS_NAME         "ble_hci_evt"
+#define CFG_HCI_USER_EVT_PROCESS_ATTR_BITS    (0)
+#define CFG_HCI_USER_EVT_PROCESS_CB_MEM       (0)
+#define CFG_HCI_USER_EVT_PROCESS_CB_SIZE      (0)
+#define CFG_HCI_USER_EVT_PROCESS_STACK_MEM    (0)
+#define CFG_HCI_USER_EVT_PROCESS_PRIORITY     osPriorityNone
+#define CFG_HCI_USER_EVT_PROCESS_STACK_SIZE   (128 * 8)
+
+#define CFG_ADV_UPDATE_PROCESS_NAME           "ble_adv_upd"
+#define CFG_ADV_UPDATE_PROCESS_ATTR_BITS      (0)
+#define CFG_ADV_UPDATE_PROCESS_CB_MEM         (0)
+#define CFG_ADV_UPDATE_PROCESS_CB_SIZE        (0)
+#define CFG_ADV_UPDATE_PROCESS_STACK_MEM      (0)
+#define CFG_ADV_UPDATE_PROCESS_PRIORITY       osPriorityNone
+#define CFG_ADV_UPDATE_PROCESS_STACK_SIZE     (128 * 6)
+
+#define CFG_HRS_PROCESS_NAME                  "hrs"
+#define CFG_HRS_PROCESS_ATTR_BITS             (0)
+#define CFG_HRS_PROCESS_CB_MEM                (0)
+#define CFG_HRS_PROCESS_CB_SIZE               (0)
+#define CFG_HRS_PROCESS_STACK_MEM             (0)
+#define CFG_HRS_PROCESS_PRIORITY              osPriorityNone
+#define CFG_HRS_PROCESS_STACK_SIZE            (128 * 5)
+
+typedef enum {
+    CFG_LPM_APP,
+    CFG_LPM_APP_BLE,
+} CFG_LPM_Id_t;
+
+#define CFG_OTP_BASE_ADDRESS    OTP_AREA_BASE
+#define CFG_OTP_END_ADRESS      OTP_AREA_END_ADDR
diff --git a/firmware/targets/f3/ble-glue/app_debug.c b/firmware/targets/f3/ble-glue/app_debug.c
new file mode 100644
index 00000000..f9f11b70
--- /dev/null
+++ b/firmware/targets/f3/ble-glue/app_debug.c
@@ -0,0 +1,402 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+  * File Name          : app_debug.c
+  * Description        : Debug capabilities source file for STM32WPAN Middleware
+ ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "app_common.h"
+
+#include "app_debug.h"
+#include "utilities_common.h"
+#include "shci.h"
+#include "tl.h"
+#include "dbg_trace.h"
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+typedef PACKED_STRUCT
+{
+  GPIO_TypeDef* port;
+  uint16_t pin;
+  uint8_t enable;
+  uint8_t reserved;
+} APPD_GpioConfig_t;
+/* USER CODE END PTD */
+
+/* Private defines -----------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+#define GPIO_NBR_OF_RF_SIGNALS                  9
+#define GPIO_CFG_NBR_OF_FEATURES                34
+#define NBR_OF_TRACES_CONFIG_PARAMETERS         4
+#define NBR_OF_GENERAL_CONFIG_PARAMETERS        4
+
+/**
+ * THIS SHALL BE SET TO A VALUE DIFFERENT FROM 0 ONLY ON REQUEST FROM ST SUPPORT
+ */
+#define BLE_DTB_CFG     0
+/* USER CODE END PD */
+
+/* Private macros ------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+PLACE_IN_SECTION("MB_MEM2") ALIGN(4) static SHCI_C2_DEBUG_TracesConfig_t APPD_TracesConfig={0, 0, 0, 0};
+PLACE_IN_SECTION("MB_MEM2") ALIGN(4) static SHCI_C2_DEBUG_GeneralConfig_t APPD_GeneralConfig={BLE_DTB_CFG, {0, 0, 0}};
+
+#ifdef CFG_DEBUG_TRACE_UART
+#if(CFG_HW_LPUART1_ENABLED == 1)
+extern void MX_LPUART1_UART_Init(void);
+#endif
+#if(CFG_HW_USART1_ENABLED == 1)
+extern void MX_USART1_UART_Init(void);
+#endif
+#endif
+
+/**
+ * THE DEBUG ON GPIO FOR CPU2 IS INTENDED TO BE USED ONLY ON REQUEST FROM ST SUPPORT
+ * It provides timing information on the CPU2 activity.
+ * All configuration of (port, pin) is supported for each features and can be selected by the user
+ * depending on the availability
+ */
+static const APPD_GpioConfig_t aGpioConfigList[GPIO_CFG_NBR_OF_FEATURES] =
+{
+    { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* BLE_ISR - Set on Entry / Reset on Exit */
+    { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* BLE_STACK_TICK - Set on Entry / Reset on Exit */
+    { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* BLE_CMD_PROCESS - Set on Entry / Reset on Exit */
+    { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* BLE_ACL_DATA_PROCESS - Set on Entry / Reset on Exit */
+    { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* SYS_CMD_PROCESS - Set on Entry / Reset on Exit */
+    { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* RNG_PROCESS - Set on Entry / Reset on Exit */
+    { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* NVM_PROCESS - Set on Entry / Reset on Exit */
+    { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* IPCC_GENERAL - Set on Entry / Reset on Exit */
+    { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* IPCC_BLE_CMD_RX - Set on Entry / Reset on Exit */
+    { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* IPCC_BLE_EVT_TX - Set on Entry / Reset on Exit */
+    { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* IPCC_BLE_ACL_DATA_RX - Set on Entry / Reset on Exit */
+    { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* IPCC_SYS_CMD_RX - Set on Entry / Reset on Exit */
+    { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* IPCC_SYS_EVT_TX - Set on Entry / Reset on Exit */
+    { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* IPCC_CLI_CMD_RX - Set on Entry / Reset on Exit */
+    { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* IPCC_OT_CMD_RX - Set on Entry / Reset on Exit */
+    { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* IPCC_OT_ACK_TX - Set on Entry / Reset on Exit */
+    { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* IPCC_CLI_ACK_TX - Set on Entry / Reset on Exit */
+    { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* IPCC_MEM_MANAGER_RX - Set on Entry / Reset on Exit */
+    { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* IPCC_TRACES_TX - Set on Entry / Reset on Exit */
+    { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* HARD_FAULT - Set on Entry / Reset on Exit */
+/* From v1.1.1 */
+    { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* IP_CORE_LP_STATUS - Set on Entry / Reset on Exit */
+/* From v1.2.0 */
+    { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* END_OF_CONNECTION_EVENT - Set on Entry / Reset on Exit */
+    { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* TIMER_SERVER_CALLBACK - Toggle on Entry */
+    { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* PES_ACTIVITY - Set on Entry / Reset on Exit */
+    { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* MB_BLE_SEND_EVT - Set on Entry / Reset on Exit */
+/* From v1.3.0 */
+    { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* BLE_NO_DELAY - Set on Entry / Reset on Exit */
+    { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* BLE_STACK_STORE_NVM_CB - Set on Entry / Reset on Exit */
+    { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* NVMA_WRITE_ONGOING - Set on Entry / Reset on Exit */
+    { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* NVMA_WRITE_COMPLETE - Set on Entry / Reset on Exit */
+    { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* NVMA_CLEANUP - Set on Entry / Reset on Exit */
+/* From v1.4.0 */
+    { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* NVMA_START - Set on Entry / Reset on Exit */
+    { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* FLASH_EOP - Set on Entry / Reset on Exit */
+    { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* FLASH_WRITE - Set on Entry / Reset on Exit */
+    { GPIOA, LL_GPIO_PIN_0, 0, 0},  /* FLASH_ERASE - Set on Entry / Reset on Exit */
+};
+
+/**
+ * THE DEBUG ON GPIO FOR CPU2 IS INTENDED TO BE USED ONLY ON REQUEST FROM ST SUPPORT
+ * This table is relevant only for BLE
+ * It provides timing information on BLE RF activity.
+ * New signals may be allocated at any location when requested by ST
+ * The GPIO allocated to each signal depend on the BLE_DTB_CFG value and cannot be changed
+ */
+#if( BLE_DTB_CFG == 7)
+static const APPD_GpioConfig_t aRfConfigList[GPIO_NBR_OF_RF_SIGNALS] =
+{
+    { GPIOB, LL_GPIO_PIN_2, 0, 0},      /* DTB10 - Tx/Rx SPI */
+    { GPIOB, LL_GPIO_PIN_7, 0, 0},      /* DTB11 - Tx/Tx SPI Clk */
+    { GPIOA, LL_GPIO_PIN_8, 0, 0},      /* DTB12 - Tx/Rx Ready & SPI Select */
+    { GPIOA, LL_GPIO_PIN_9, 0, 0},      /* DTB13 - Tx/Rx Start */
+    { GPIOA, LL_GPIO_PIN_10, 0, 0},     /* DTB14 - FSM0 */
+    { GPIOA, LL_GPIO_PIN_11, 0, 0},     /* DTB15 - FSM1 */
+    { GPIOB, LL_GPIO_PIN_8, 0, 0},      /* DTB16 - FSM2 */
+    { GPIOB, LL_GPIO_PIN_11, 0, 0},     /* DTB17 - FSM3 */
+    { GPIOB, LL_GPIO_PIN_10, 0, 0},     /* DTB18 - FSM4 */
+};
+#endif
+/* USER CODE END PV */
+
+/* Global variables ----------------------------------------------------------*/
+/* USER CODE BEGIN GV */
+/* USER CODE END GV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+static void APPD_SetCPU2GpioConfig( void );
+static void APPD_BleDtbCfg( void );
+/* USER CODE END PFP */
+
+/* Functions Definition ------------------------------------------------------*/
+void APPD_Init( void )
+{
+/* USER CODE BEGIN APPD_Init */
+#if (CFG_DEBUGGER_SUPPORTED == 1)
+  /**
+   * Keep debugger enabled while in any low power mode
+   */
+  HAL_DBGMCU_EnableDBGSleepMode();
+  HAL_DBGMCU_EnableDBGStopMode();
+
+  /***************** ENABLE DEBUGGER *************************************/
+  LL_EXTI_EnableIT_32_63(LL_EXTI_LINE_48);
+
+#else
+  GPIO_InitTypeDef gpio_config = {0};
+
+  gpio_config.Pull = GPIO_NOPULL;
+  gpio_config.Mode = GPIO_MODE_ANALOG;
+
+  gpio_config.Pin = GPIO_PIN_15 | GPIO_PIN_14 | GPIO_PIN_13;
+  __HAL_RCC_GPIOA_CLK_ENABLE();
+  HAL_GPIO_Init(GPIOA, &gpio_config);
+  __HAL_RCC_GPIOA_CLK_DISABLE();
+
+  gpio_config.Pin = GPIO_PIN_4 | GPIO_PIN_3;
+  __HAL_RCC_GPIOB_CLK_ENABLE();
+  HAL_GPIO_Init(GPIOB, &gpio_config);
+  __HAL_RCC_GPIOB_CLK_DISABLE();
+
+  HAL_DBGMCU_DisableDBGSleepMode();
+  HAL_DBGMCU_DisableDBGStopMode();
+  HAL_DBGMCU_DisableDBGStandbyMode();
+
+#endif /* (CFG_DEBUGGER_SUPPORTED == 1) */
+
+#if(CFG_DEBUG_TRACE != 0)
+  DbgTraceInit();
+#endif
+
+  APPD_SetCPU2GpioConfig( );
+  APPD_BleDtbCfg( );
+
+/* USER CODE END APPD_Init */
+  return;
+}
+
+void APPD_EnableCPU2( void )
+{
+/* USER CODE BEGIN APPD_EnableCPU2 */
+  SHCI_C2_DEBUG_Init_Cmd_Packet_t DebugCmdPacket =
+  {
+    {{0,0,0}},                            /**< Does not need to be initialized */
+    {(uint8_t *)aGpioConfigList,
+    (uint8_t *)&APPD_TracesConfig,
+    (uint8_t *)&APPD_GeneralConfig,
+    GPIO_CFG_NBR_OF_FEATURES,
+    NBR_OF_TRACES_CONFIG_PARAMETERS,
+    NBR_OF_GENERAL_CONFIG_PARAMETERS}
+  };
+
+  /**< Traces channel initialization */
+  TL_TRACES_Init( );
+
+  /** GPIO DEBUG Initialization */
+  SHCI_C2_DEBUG_Init( &DebugCmdPacket  );
+
+/* USER CODE END APPD_EnableCPU2 */
+  return;
+}
+
+/*************************************************************
+ *
+ * LOCAL FUNCTIONS
+ *
+ *************************************************************/
+static void APPD_SetCPU2GpioConfig( void )
+{
+/* USER CODE BEGIN APPD_SetCPU2GpioConfig */
+  GPIO_InitTypeDef gpio_config = {0};
+  uint8_t local_loop;
+  uint16_t gpioa_pin_list;
+  uint16_t gpiob_pin_list;
+  uint16_t gpioc_pin_list;
+
+  gpioa_pin_list = 0;
+  gpiob_pin_list = 0;
+  gpioc_pin_list = 0;
+
+  for(local_loop = 0 ; local_loop < GPIO_CFG_NBR_OF_FEATURES; local_loop++)
+  {
+    if( aGpioConfigList[local_loop].enable != 0)
+    {
+      switch((uint32_t)aGpioConfigList[local_loop].port)
+      {
+        case (uint32_t)GPIOA:
+            gpioa_pin_list |= aGpioConfigList[local_loop].pin;
+          break;
+
+        case (uint32_t)GPIOB:
+            gpiob_pin_list |= aGpioConfigList[local_loop].pin;
+          break;
+
+        case (uint32_t)GPIOC:
+            gpioc_pin_list |= aGpioConfigList[local_loop].pin;
+          break;
+
+        default:
+          break;
+      }
+    }
+  }
+
+  gpio_config.Pull = GPIO_NOPULL;
+  gpio_config.Mode = GPIO_MODE_OUTPUT_PP;
+  gpio_config.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+
+  if(gpioa_pin_list != 0)
+  {
+    gpio_config.Pin = gpioa_pin_list;
+    __HAL_RCC_GPIOA_CLK_ENABLE();
+    __HAL_RCC_C2GPIOA_CLK_ENABLE();
+    HAL_GPIO_Init(GPIOA, &gpio_config);
+    HAL_GPIO_WritePin(GPIOA, gpioa_pin_list, GPIO_PIN_RESET);
+  }
+
+  if(gpiob_pin_list != 0)
+  {
+    gpio_config.Pin = gpiob_pin_list;
+    __HAL_RCC_GPIOB_CLK_ENABLE();
+    __HAL_RCC_C2GPIOB_CLK_ENABLE();
+    HAL_GPIO_Init(GPIOB, &gpio_config);
+    HAL_GPIO_WritePin(GPIOB, gpiob_pin_list, GPIO_PIN_RESET);
+  }
+
+  if(gpioc_pin_list != 0)
+  {
+    gpio_config.Pin = gpioc_pin_list;
+    __HAL_RCC_GPIOC_CLK_ENABLE();
+    __HAL_RCC_C2GPIOC_CLK_ENABLE();
+    HAL_GPIO_Init(GPIOC, &gpio_config);
+    HAL_GPIO_WritePin(GPIOC, gpioc_pin_list, GPIO_PIN_RESET);
+  }
+  
+/* USER CODE END APPD_SetCPU2GpioConfig */
+  return;
+}
+
+static void APPD_BleDtbCfg( void )
+{
+/* USER CODE BEGIN APPD_BleDtbCfg */
+#if (BLE_DTB_CFG != 0)
+  GPIO_InitTypeDef gpio_config = {0};
+  uint8_t local_loop;
+  uint16_t gpioa_pin_list;
+  uint16_t gpiob_pin_list;
+
+  gpioa_pin_list = 0;
+  gpiob_pin_list = 0;
+
+  for(local_loop = 0 ; local_loop < GPIO_NBR_OF_RF_SIGNALS; local_loop++)
+  {
+    if( aRfConfigList[local_loop].enable != 0)
+    {
+      switch((uint32_t)aRfConfigList[local_loop].port)
+      {
+        case (uint32_t)GPIOA:
+            gpioa_pin_list |= aRfConfigList[local_loop].pin;
+          break;
+
+        case (uint32_t)GPIOB:
+            gpiob_pin_list |= aRfConfigList[local_loop].pin;
+          break;
+
+        default:
+          break;
+      }
+    }
+  }
+
+  gpio_config.Pull = GPIO_NOPULL;
+  gpio_config.Mode = GPIO_MODE_AF_PP;
+  gpio_config.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+  gpio_config.Alternate = GPIO_AF6_RF_DTB7;
+
+  if(gpioa_pin_list != 0)
+  {
+    gpio_config.Pin = gpioa_pin_list;
+    __HAL_RCC_GPIOA_CLK_ENABLE();
+    __HAL_RCC_C2GPIOA_CLK_ENABLE();
+    HAL_GPIO_Init(GPIOA, &gpio_config);
+  }
+
+  if(gpiob_pin_list != 0)
+  {
+    gpio_config.Pin = gpiob_pin_list;
+    __HAL_RCC_GPIOB_CLK_ENABLE();
+    __HAL_RCC_C2GPIOB_CLK_ENABLE();
+    HAL_GPIO_Init(GPIOB, &gpio_config);
+  }
+#endif
+
+/* USER CODE END APPD_BleDtbCfg */
+  return;
+}
+
+/*************************************************************
+ *
+ * WRAP FUNCTIONS
+ *
+*************************************************************/
+#if(CFG_DEBUG_TRACE != 0)
+void DbgOutputInit( void )
+{
+/* USER CODE BEGIN DbgOutputInit */
+#ifdef CFG_DEBUG_TRACE_UART
+if (CFG_DEBUG_TRACE_UART == hw_lpuart1)
+{
+#if(CFG_HW_LPUART1_ENABLED == 1)
+    MX_LPUART1_UART_Init();
+#endif
+}
+else if (CFG_DEBUG_TRACE_UART == hw_uart1)
+{
+#if(CFG_HW_USART1_ENABLED == 1)
+    MX_USART1_UART_Init();
+#endif
+}
+#endif
+
+/* USER CODE END DbgOutputInit */
+  return;
+}
+
+extern UART_HandleTypeDef DEBUG_UART;
+
+void DbgOutputTraces(  uint8_t *p_data, uint16_t size, void (*cb)(void) )
+{
+/* USER CODE END DbgOutputTraces */
+  // HW_UART_Transmit_DMA(CFG_DEBUG_TRACE_UART, p_data, size, cb);
+  HAL_UART_Transmit(&DEBUG_UART, (uint8_t*)p_data, (uint16_t)size, HAL_MAX_DELAY);
+
+/* USER CODE END DbgOutputTraces */
+  return;
+}
+#endif
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/firmware/targets/f3/ble-glue/app_debug.h b/firmware/targets/f3/ble-glue/app_debug.h
new file mode 100644
index 00000000..4224edbe
--- /dev/null
+++ b/firmware/targets/f3/ble-glue/app_debug.h
@@ -0,0 +1,69 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+  * File Name          : app_debug.h
+  * Description        : Header for app_debug.c module
+ ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __APP_DEBUG_H
+#define __APP_DEBUG_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+  /* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported variables --------------------------------------------------------*/
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/* Exported macros ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions ---------------------------------------------*/
+  void APPD_Init( void );
+  void APPD_EnableCPU2( void );
+/* USER CODE BEGIN EF */
+
+/* USER CODE END EF */
+
+#ifdef __cplusplus
+} /* extern "C" */
+#endif
+
+#endif /*__APP_DEBUG_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/firmware/targets/f3/ble-glue/app_entry.c b/firmware/targets/f3/ble-glue/app_entry.c
new file mode 100644
index 00000000..7dc7e814
--- /dev/null
+++ b/firmware/targets/f3/ble-glue/app_entry.c
@@ -0,0 +1,174 @@
+#include "app_common.h"
+#include "main.h"
+#include "app_entry.h"
+#include "app_ble.h"
+#include "ble.h"
+#include "tl.h"
+#include "cmsis_os.h"
+#include "shci_tl.h"
+#include "stm32_lpm.h"
+#include "app_debug.h"
+
+extern RTC_HandleTypeDef hrtc;
+
+#define POOL_SIZE (CFG_TLBLE_EVT_QUEUE_LENGTH*4U*DIVC(( sizeof(TL_PacketHeader_t) + TL_BLE_EVENT_FRAME_SIZE ), 4U))
+
+PLACE_IN_SECTION("MB_MEM2") ALIGN(4) static uint8_t EvtPool[POOL_SIZE];
+PLACE_IN_SECTION("MB_MEM2") ALIGN(4) static TL_CmdPacket_t SystemCmdBuffer;
+PLACE_IN_SECTION("MB_MEM2") ALIGN(4) static uint8_t SystemSpareEvtBuffer[sizeof(TL_PacketHeader_t) + TL_EVT_HDR_SIZE + 255U];
+PLACE_IN_SECTION("MB_MEM2") ALIGN(4) static uint8_t BleSpareEvtBuffer[sizeof(TL_PacketHeader_t) + TL_EVT_HDR_SIZE + 255];
+
+osMutexId_t MtxShciId;
+osSemaphoreId_t SemShciId;
+osThreadId_t ShciUserEvtProcessId;
+
+volatile static BleGlueStatus ble_glue_status = BleGlueStatusUninitialized;
+
+const osThreadAttr_t ShciUserEvtProcess_attr = {
+    .name = CFG_SHCI_USER_EVT_PROCESS_NAME,
+    .attr_bits = CFG_SHCI_USER_EVT_PROCESS_ATTR_BITS,
+    .cb_mem = CFG_SHCI_USER_EVT_PROCESS_CB_MEM,
+    .cb_size = CFG_SHCI_USER_EVT_PROCESS_CB_SIZE,
+    .stack_mem = CFG_SHCI_USER_EVT_PROCESS_STACK_MEM,
+    .priority = CFG_SHCI_USER_EVT_PROCESS_PRIORITY,
+    .stack_size = CFG_SHCI_USER_EVT_PROCESS_STACK_SIZE
+};
+
+static void ShciUserEvtProcess(void *argument);
+static void SystemPower_Config( void );
+static void appe_Tl_Init( void );
+static void APPE_SysStatusNot( SHCI_TL_CmdStatus_t status );
+static void APPE_SysUserEvtRx( void * pPayload );
+
+BleGlueStatus APPE_Status() {
+  return ble_glue_status;
+}
+
+void APPE_Init() {
+  ble_glue_status = BleGlueStatusStartup;
+  SystemPower_Config(); /**< Configure the system Power Mode */
+
+  HW_TS_Init(hw_ts_InitMode_Full, &hrtc); /**< Initialize the TimerServer */
+
+  // APPD_Init();
+
+  appe_Tl_Init();	/* Initialize all transport layers */
+
+  /**
+   * From now, the application is waiting for the ready event ( VS_HCI_C2_Ready )
+   * received on the system channel before starting the Stack
+   * This system event is received with APPE_SysUserEvtRx()
+   */
+}
+
+/*************************************************************
+ *
+ * LOCAL FUNCTIONS
+ *
+ *************************************************************/
+
+/**
+ * @brief  Configure the system for power optimization
+ *
+ * @note  This API configures the system to be ready for low power mode
+ *
+ * @param  None
+ * @retval None
+ */
+static void SystemPower_Config(void) {
+  // Select HSI as system clock source after Wake Up from Stop mode
+  LL_RCC_SetClkAfterWakeFromStop(LL_RCC_STOP_WAKEUPCLOCK_HSI);
+
+  /* Initialize the CPU2 reset value before starting CPU2 with C2BOOT */
+  LL_C2_PWR_SetPowerMode(LL_PWR_MODE_SHUTDOWN);
+}
+
+static void appe_Tl_Init( void ) {
+  TL_MM_Config_t tl_mm_config;
+  SHCI_TL_HciInitConf_t SHci_Tl_Init_Conf;
+  /**< Reference table initialization */
+  TL_Init();
+
+  MtxShciId = osMutexNew( NULL );
+  SemShciId = osSemaphoreNew( 1, 0, NULL ); /*< Create the semaphore and make it busy at initialization */
+
+  /** FreeRTOS system task creation */
+  ShciUserEvtProcessId = osThreadNew(ShciUserEvtProcess, NULL, &ShciUserEvtProcess_attr);
+
+  /**< System channel initialization */
+  SHci_Tl_Init_Conf.p_cmdbuffer = (uint8_t*)&SystemCmdBuffer;
+  SHci_Tl_Init_Conf.StatusNotCallBack = APPE_SysStatusNot;
+  shci_init(APPE_SysUserEvtRx, (void*) &SHci_Tl_Init_Conf);
+
+  /**< Memory Manager channel initialization */
+  tl_mm_config.p_BleSpareEvtBuffer = BleSpareEvtBuffer;
+  tl_mm_config.p_SystemSpareEvtBuffer = SystemSpareEvtBuffer;
+  tl_mm_config.p_AsynchEvtPool = EvtPool;
+  tl_mm_config.AsynchEvtPoolSize = POOL_SIZE;
+  TL_MM_Init( &tl_mm_config );
+
+  TL_Enable();
+}
+
+static void APPE_SysStatusNot( SHCI_TL_CmdStatus_t status ) {
+  switch (status) {
+    case SHCI_TL_CmdBusy:
+      osMutexAcquire( MtxShciId, osWaitForever );
+      break;
+    case SHCI_TL_CmdAvailable:
+      osMutexRelease( MtxShciId );
+      break;
+    default:
+      break;
+  }
+}
+
+/**
+ * The type of the payload for a system user event is tSHCI_UserEvtRxParam
+ * When the system event is both :
+ *    - a ready event (subevtcode = SHCI_SUB_EVT_CODE_READY)
+ *    - reported by the FUS (sysevt_ready_rsp == FUS_FW_RUNNING)
+ * The buffer shall not be released
+ * ( eg ((tSHCI_UserEvtRxParam*)pPayload)->status shall be set to SHCI_TL_UserEventFlow_Disable )
+ * When the status is not filled, the buffer is released by default
+ */
+static void APPE_SysUserEvtRx( void * pPayload ) {
+  UNUSED(pPayload);
+  /* Traces channel initialization */
+  // APPD_EnableCPU2( );
+  ble_glue_status = BleGlueStatusStarted;
+  APP_BLE_Init( );
+}
+
+/*************************************************************
+ *
+ * FREERTOS WRAPPER FUNCTIONS
+ *
+*************************************************************/
+static void ShciUserEvtProcess(void *argument) {
+  UNUSED(argument);
+  for(;;) {
+    osThreadFlagsWait(1, osFlagsWaitAny, osWaitForever);
+    shci_user_evt_proc();
+  }
+}
+
+/*************************************************************
+ *
+ * WRAP FUNCTIONS
+ *
+ *************************************************************/
+void shci_notify_asynch_evt(void* pdata) {
+  UNUSED(pdata);
+  osThreadFlagsSet( ShciUserEvtProcessId, 1 );
+}
+
+void shci_cmd_resp_release(uint32_t flag) {
+  UNUSED(flag);
+  osSemaphoreRelease( SemShciId );
+}
+
+void shci_cmd_resp_wait(uint32_t timeout) {
+  UNUSED(timeout);
+  osSemaphoreAcquire( SemShciId, osWaitForever );
+}
diff --git a/firmware/targets/f3/ble-glue/app_entry.h b/firmware/targets/f3/ble-glue/app_entry.h
new file mode 100644
index 00000000..2f284783
--- /dev/null
+++ b/firmware/targets/f3/ble-glue/app_entry.h
@@ -0,0 +1,19 @@
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+    BleGlueStatusUninitialized,
+    BleGlueStatusStartup,
+    BleGlueStatusStarted
+} BleGlueStatus;
+
+void APPE_Init();
+
+BleGlueStatus APPE_Status();
+
+#ifdef __cplusplus
+} /* extern "C" */
+#endif
diff --git a/firmware/targets/f3/ble-glue/ble_conf.h b/firmware/targets/f3/ble-glue/ble_conf.h
new file mode 100644
index 00000000..af08187c
--- /dev/null
+++ b/firmware/targets/f3/ble-glue/ble_conf.h
@@ -0,0 +1,104 @@
+/**
+ ******************************************************************************
+  * File Name          : App/ble_conf.h
+  * Description        : Configuration file for BLE Middleware.
+  *
+ ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef BLE_CONF_H
+#define BLE_CONF_H
+
+#include "app_conf.h"
+
+/******************************************************************************
+ *
+ * BLE SERVICES CONFIGURATION
+ * blesvc
+ *
+ ******************************************************************************/
+
+ /**
+ * This setting shall be set to '1' if the device needs to support the Peripheral Role
+ * In the MS configuration, both BLE_CFG_PERIPHERAL and BLE_CFG_CENTRAL shall be set to '1'
+ */
+#define BLE_CFG_PERIPHERAL                                                     1
+
+/**
+ * This setting shall be set to '1' if the device needs to support the Central Role
+ * In the MS configuration, both BLE_CFG_PERIPHERAL and BLE_CFG_CENTRAL shall be set to '1'
+ */
+#define BLE_CFG_CENTRAL                                                        0
+
+/**
+ * There is one handler per service enabled
+ * Note: There is no handler for the Device Information Service
+ *
+ * This shall take into account all registered handlers
+ * (from either the provided services or the custom services)
+ */
+#define BLE_CFG_SVC_MAX_NBR_CB                                                 7
+
+#define BLE_CFG_CLT_MAX_NBR_CB                                                 0
+
+/******************************************************************************
+ * Device Information Service (DIS)
+ ******************************************************************************/
+/**< Options: Supported(1) or Not Supported(0) */
+#define BLE_CFG_DIS_MANUFACTURER_NAME_STRING                                   1
+#define BLE_CFG_DIS_MODEL_NUMBER_STRING                                        1
+#define BLE_CFG_DIS_SERIAL_NUMBER_STRING                                       0
+#define BLE_CFG_DIS_HARDWARE_REVISION_STRING                                   0
+#define BLE_CFG_DIS_FIRMWARE_REVISION_STRING                                   0
+#define BLE_CFG_DIS_SOFTWARE_REVISION_STRING                                   0
+#define BLE_CFG_DIS_SYSTEM_ID                                                  0
+#define BLE_CFG_DIS_IEEE_CERTIFICATION                                         0
+#define BLE_CFG_DIS_PNP_ID                                                     0
+
+/**
+ * device information service characteristic lengths
+ */
+#define BLE_CFG_DIS_SYSTEM_ID_LEN_MAX                                        (8)
+#define BLE_CFG_DIS_MODEL_NUMBER_STRING_LEN_MAX                              (32)
+#define BLE_CFG_DIS_SERIAL_NUMBER_STRING_LEN_MAX                             (32)
+#define BLE_CFG_DIS_FIRMWARE_REVISION_STRING_LEN_MAX                         (32)
+#define BLE_CFG_DIS_HARDWARE_REVISION_STRING_LEN_MAX                         (32)
+#define BLE_CFG_DIS_SOFTWARE_REVISION_STRING_LEN_MAX                         (32)
+#define BLE_CFG_DIS_MANUFACTURER_NAME_STRING_LEN_MAX                         (32)
+#define BLE_CFG_DIS_IEEE_CERTIFICATION_LEN_MAX                               (32)
+#define BLE_CFG_DIS_PNP_ID_LEN_MAX                                           (7)
+
+/******************************************************************************
+ * Heart Rate Service (HRS)
+ ******************************************************************************/
+#define BLE_CFG_HRS_BODY_SENSOR_LOCATION_CHAR               1/**< BODY SENSOR LOCATION CHARACTERISTIC */
+#define BLE_CFG_HRS_ENERGY_EXPENDED_INFO_FLAG               1/**< ENERGY EXTENDED INFO FLAG */
+#define BLE_CFG_HRS_ENERGY_RR_INTERVAL_FLAG                 1/**< Max number of RR interval values - Shall not be greater than 9 */
+
+/******************************************************************************
+ * GAP Service - Apprearance
+ ******************************************************************************/
+
+#define BLE_CFG_UNKNOWN_APPEARANCE                  (0)
+#define BLE_CFG_HR_SENSOR_APPEARANCE                (832)
+#define BLE_CFG_GAP_APPEARANCE                      (BLE_CFG_HR_SENSOR_APPEARANCE)
+
+/******************************************************************************
+ * Over The Air Feature (OTA) - STM Proprietary
+ ******************************************************************************/
+#define BLE_CFG_OTA_REBOOT_CHAR         0/**< REBOOT OTA MODE CHARACTERISTIC */
+
+#endif /*BLE_CONF_H */
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/firmware/targets/f3/ble-glue/ble_dbg_conf.h b/firmware/targets/f3/ble-glue/ble_dbg_conf.h
new file mode 100644
index 00000000..4eb0239b
--- /dev/null
+++ b/firmware/targets/f3/ble-glue/ble_dbg_conf.h
@@ -0,0 +1,199 @@
+/**
+ ******************************************************************************
+  * File Name          : App/ble_dbg_conf.h
+  * Description        : Debug configuration file for BLE Middleware.
+  *
+ ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __BLE_DBG_CONF_H
+#define __BLE_DBG_CONF_H
+
+/**
+ * Enable or Disable traces from BLE
+ */
+
+#define BLE_DBG_APP_EN             0
+#define BLE_DBG_DIS_EN             0
+#define BLE_DBG_HRS_EN             0
+#define BLE_DBG_SVCCTL_EN          0
+#define BLE_DBG_BLS_EN             0
+#define BLE_DBG_HTS_EN             0
+#define BLE_DBG_P2P_STM_EN         0
+
+/**
+ * Macro definition
+ */
+#if ( BLE_DBG_APP_EN != 0 )
+#define BLE_DBG_APP_MSG             PRINT_MESG_DBG
+#else
+#define BLE_DBG_APP_MSG             PRINT_NO_MESG
+#endif
+
+#if ( BLE_DBG_DIS_EN != 0 )
+#define BLE_DBG_DIS_MSG             PRINT_MESG_DBG
+#else
+#define BLE_DBG_DIS_MSG             PRINT_NO_MESG
+#endif
+
+#if ( BLE_DBG_HRS_EN != 0 )
+#define BLE_DBG_HRS_MSG             PRINT_MESG_DBG
+#else
+#define BLE_DBG_HRS_MSG             PRINT_NO_MESG
+#endif
+
+#if ( BLE_DBG_P2P_STM_EN != 0 )
+#define BLE_DBG_P2P_STM_MSG         PRINT_MESG_DBG
+#else
+#define BLE_DBG_P2P_STM_MSG         PRINT_NO_MESG
+#endif
+
+#if ( BLE_DBG_TEMPLATE_STM_EN != 0 )
+#define BLE_DBG_TEMPLATE_STM_MSG         PRINT_MESG_DBG
+#else
+#define BLE_DBG_TEMPLATE_STM_MSG         PRINT_NO_MESG
+#endif
+
+#if ( BLE_DBG_EDS_STM_EN != 0 )
+#define BLE_DBG_EDS_STM_MSG         PRINT_MESG_DBG
+#else
+#define BLE_DBG_EDS_STM_MSG         PRINT_NO_MESG
+#endif
+
+#if ( BLE_DBG_LBS_STM_EN != 0 )
+#define BLE_DBG_LBS_STM_MSG         PRINT_MESG_DBG
+#else
+#define BLE_DBG_LBS_STM_MSG         PRINT_NO_MESG
+#endif
+
+#if ( BLE_DBG_SVCCTL_EN != 0 )
+#define BLE_DBG_SVCCTL_MSG          PRINT_MESG_DBG
+#else
+#define BLE_DBG_SVCCTL_MSG          PRINT_NO_MESG
+#endif
+
+#if (BLE_DBG_CTS_EN != 0)
+#define BLE_DBG_CTS_MSG             PRINT_MESG_DBG
+#else
+#define BLE_DBG_CTS_MSG             PRINT_NO_MESG
+#endif
+
+#if (BLE_DBG_HIDS_EN != 0)
+#define BLE_DBG_HIDS_MSG            PRINT_MESG_DBG
+#else
+#define BLE_DBG_HIDS_MSG            PRINT_NO_MESG
+#endif
+
+#if (BLE_DBG_PASS_EN != 0)
+#define BLE_DBG_PASS_MSG            PRINT_MESG_DBG
+#else
+#define BLE_DBG_PASS_MSG            PRINT_NO_MESG
+#endif
+
+#if (BLE_DBG_BLS_EN != 0)
+#define BLE_DBG_BLS_MSG             PRINT_MESG_DBG
+#else
+#define BLE_DBG_BLS_MSG             PRINT_NO_MESG
+#endif
+
+#if (BLE_DBG_HTS_EN != 0)
+#define BLE_DBG_HTS_MSG             PRINT_MESG_DBG
+#else
+#define BLE_DBG_HTS_MSG             PRINT_NO_MESG
+#endif
+
+#if (BLE_DBG_ANS_EN != 0)
+#define BLE_DBG_ANS_MSG             PRINT_MESG_DBG
+#else
+#define BLE_DBG_ANS_MSG             PRINT_NO_MESG
+#endif
+
+#if (BLE_DBG_ESS_EN != 0)
+#define BLE_DBG_ESS_MSG             PRINT_MESG_DBG
+#else
+#define BLE_DBG_ESS_MSG             PRINT_NO_MESG
+#endif
+
+#if (BLE_DBG_GLS_EN != 0)
+#define BLE_DBG_GLS_MSG             PRINT_MESG_DBG
+#else
+#define BLE_DBG_GLS_MSG             PRINT_NO_MESG
+#endif
+
+#if (BLE_DBG_BAS_EN != 0)
+#define BLE_DBG_BAS_MSG             PRINT_MESG_DBG
+#else
+#define BLE_DBG_BAS_MSG             PRINT_NO_MESG
+#endif
+
+#if (BLE_DBG_RTUS_EN != 0)
+#define BLE_DBG_RTUS_MSG            PRINT_MESG_DBG
+#else
+#define BLE_DBG_RTUS_MSG            PRINT_NO_MESG
+#endif
+
+#if (BLE_DBG_HPS_EN != 0)
+#define BLE_DBG_HPS_MSG             PRINT_MESG_DBG
+#else
+#define BLE_DBG_HPS_MSG             PRINT_NO_MESG
+#endif
+
+#if (BLE_DBG_TPS_EN != 0)
+#define BLE_DBG_TPS_MSG             PRINT_MESG_DBG
+#else
+#define BLE_DBG_TPS_MSG             PRINT_NO_MESG
+#endif
+
+#if (BLE_DBG_LLS_EN != 0)
+#define BLE_DBG_LLS_MSG             PRINT_MESG_DBG
+#else
+#define BLE_DBG_LLS_MSG             PRINT_NO_MESG
+#endif
+
+#if (BLE_DBG_IAS_EN != 0)
+#define BLE_DBG_IAS_MSG             PRINT_MESG_DBG
+#else
+#define BLE_DBG_IAS_MSG             PRINT_NO_MESG
+#endif
+
+#if (BLE_DBG_WSS_EN != 0)
+#define BLE_DBG_WSS_MSG             PRINT_MESG_DBG
+#else
+#define BLE_DBG_WSS_MSG             PRINT_NO_MESG
+#endif
+
+#if (BLE_DBG_LNS_EN != 0)
+#define BLE_DBG_LNS_MSG             PRINT_MESG_DBG
+#else
+#define BLE_DBG_LNS_MSG             PRINT_NO_MESG
+#endif
+
+#if (BLE_DBG_SCPS_EN != 0)
+#define BLE_DBG_SCPS_MSG            PRINT_MESG_DBG
+#else
+#define BLE_DBG_SCPS_MSG            PRINT_NO_MESG
+#endif
+
+#if (BLE_DBG_DTS_EN != 0)
+#define BLE_DBG_DTS_MSG             PRINT_MESG_DBG
+#define BLE_DBG_DTS_BUF             PRINT_LOG_BUFF_DBG
+#else
+#define BLE_DBG_DTS_MSG             PRINT_NO_MESG
+#define BLE_DBG_DTS_BUF             PRINT_NO_MESG
+#endif
+
+#endif /*__BLE_DBG_CONF_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/firmware/targets/f3/ble-glue/dis_app.c b/firmware/targets/f3/ble-glue/dis_app.c
new file mode 100644
index 00000000..a77454d9
--- /dev/null
+++ b/firmware/targets/f3/ble-glue/dis_app.c
@@ -0,0 +1,155 @@
+#include "app_common.h"
+#include "ble.h"
+#include "dis_app.h"
+
+#if ((BLE_CFG_DIS_SYSTEM_ID != 0) || (CFG_MENU_DEVICE_INFORMATION != 0))
+static const uint8_t system_id[BLE_CFG_DIS_SYSTEM_ID_LEN_MAX] = {
+  (uint8_t)((DISAPP_MANUFACTURER_ID & 0xFF0000) >> 16),
+  (uint8_t)((DISAPP_MANUFACTURER_ID & 0x00FF00) >> 8),
+  (uint8_t)(DISAPP_MANUFACTURER_ID & 0x0000FF),
+  0xFE,
+  0xFF,
+  (uint8_t)((DISAPP_OUI & 0xFF0000) >> 16),
+  (uint8_t)((DISAPP_OUI & 0x00FF00) >> 8),
+  (uint8_t)(DISAPP_OUI & 0x0000FF)
+};
+#endif
+
+#if ((BLE_CFG_DIS_IEEE_CERTIFICATION != 0) || (CFG_MENU_DEVICE_INFORMATION != 0))
+static const uint8_t ieee_id[BLE_CFG_DIS_IEEE_CERTIFICATION_LEN_MAX] = {
+  0xFE, 0xCA, 0xFE, 0xCA, 0xFE, 0xCA, 0xFE, 0xCA,
+  0xFE, 0xCA, 0xFE, 0xCA, 0xFE, 0xCA, 0xFE, 0xCA,
+  0xFE, 0xCA, 0xFE, 0xCA, 0xFE, 0xCA, 0xFE, 0xCA,
+  0xFE, 0xCA, 0xFE, 0xCA, 0xFE, 0xCA, 0xFE, 0xCA,
+};
+#endif
+
+#if ((BLE_CFG_DIS_PNP_ID != 0) || (CFG_MENU_DEVICE_INFORMATION != 0))
+static const uint8_t pnp_id[BLE_CFG_DIS_PNP_ID_LEN_MAX] = {
+  0x1,
+  0xAD, 0xDE,
+  0xDE, 0xDA,
+  0x01, 0x00
+};
+#endif
+
+void DISAPP_Init(void) {
+  DIS_Data_t dis_information_data;
+
+#if ((BLE_CFG_DIS_MANUFACTURER_NAME_STRING != 0) || (CFG_MENU_DEVICE_INFORMATION != 0))
+  /**
+   * Update MANUFACTURER NAME Information
+   *
+   * @param UUID
+   * @param pPData
+   * @return
+   */
+  dis_information_data.pPayload = (uint8_t*)DISAPP_MANUFACTURER_NAME;
+  dis_information_data.Length = sizeof(DISAPP_MANUFACTURER_NAME);
+  DIS_UpdateChar(MANUFACTURER_NAME_UUID, &dis_information_data);
+#endif
+
+#if ((BLE_CFG_DIS_MODEL_NUMBER_STRING != 0) || (CFG_MENU_DEVICE_INFORMATION != 0))
+  /**
+   * Update MODEL NUMBERInformation
+   *
+   * @param UUID
+   * @param pPData
+   * @return
+   */
+  dis_information_data.pPayload = (uint8_t*)DISAPP_MODEL_NUMBER;
+  dis_information_data.Length = sizeof(DISAPP_MODEL_NUMBER);
+  DIS_UpdateChar(MODEL_NUMBER_UUID, &dis_information_data);
+#endif
+
+#if ((BLE_CFG_DIS_SERIAL_NUMBER_STRING != 0) || (CFG_MENU_DEVICE_INFORMATION != 0))
+  /**
+   * Update SERIAL NUMBERInformation
+   *
+   * @param UUID
+   * @param pPData
+   * @return
+   */
+  dis_information_data.pPayload = (uint8_t*)DISAPP_SERIAL_NUMBER;
+  dis_information_data.Length = sizeof(DISAPP_SERIAL_NUMBER);
+  DIS_UpdateChar(SERIAL_NUMBER_UUID, &dis_information_data);
+#endif
+
+#if ((BLE_CFG_DIS_HARDWARE_REVISION_STRING != 0) || (CFG_MENU_DEVICE_INFORMATION != 0))
+  /**
+   * Update HARDWARE REVISION NUMBERInformation
+   *
+   * @param UUID
+   * @param pPData
+   * @return
+   */
+  dis_information_data.pPayload = (uint8_t*)DISAPP_HARDWARE_REVISION_NUMBER;
+  dis_information_data.Length = sizeof(DISAPP_HARDWARE_REVISION_NUMBER);
+  DIS_UpdateChar(HARDWARE_REVISION_UUID, &dis_information_data);
+#endif
+
+#if ((BLE_CFG_DIS_FIRMWARE_REVISION_STRING != 0) || (CFG_MENU_DEVICE_INFORMATION != 0))
+  /**
+   * Update FIRMWARE REVISION NUMBERInformation
+   *
+   * @param UUID
+   * @param pPData
+   * @return
+   */
+  dis_information_data.pPayload = (uint8_t*)DISAPP_FIRMWARE_REVISION_NUMBER;
+  dis_information_data.Length = sizeof(DISAPP_FIRMWARE_REVISION_NUMBER);
+  DIS_UpdateChar(FIRMWARE_REVISION_UUID, &dis_information_data);
+#endif
+
+#if ((BLE_CFG_DIS_SOFTWARE_REVISION_STRING != 0) || (CFG_MENU_DEVICE_INFORMATION != 0))
+  /**
+   * Update SOFTWARE REVISION NUMBERInformation
+   *
+   * @param UUID
+   * @param pPData
+   * @return
+   */
+  dis_information_data.pPayload = (uint8_t*)DISAPP_SOFTWARE_REVISION_NUMBER;
+  dis_information_data.Length = sizeof(DISAPP_SOFTWARE_REVISION_NUMBER);
+  DIS_UpdateChar(SOFTWARE_REVISION_UUID, &dis_information_data);
+#endif
+
+#if ((BLE_CFG_DIS_SYSTEM_ID != 0) || (CFG_MENU_DEVICE_INFORMATION != 0))
+  /**
+   * Update SYSTEM ID Information
+   *
+   * @param UUID
+   * @param pPData
+   * @return
+   */
+  dis_information_data.pPayload = (uint8_t *)system_id;
+  dis_information_data.Length = BLE_CFG_DIS_SYSTEM_ID_LEN_MAX;
+  DIS_UpdateChar(SYSTEM_ID_UUID, &dis_information_data);
+#endif
+
+#if ((BLE_CFG_DIS_IEEE_CERTIFICATION != 0) || (CFG_MENU_DEVICE_INFORMATION != 0))
+  /**
+   * Update IEEE CERTIFICATION ID Information
+   *
+   * @param UUID
+   * @param pPData
+   * @return
+   */
+  dis_information_data.pPayload = (uint8_t *)ieee_id;
+  dis_information_data.Length = BLE_CFG_DIS_IEEE_CERTIFICATION_LEN_MAX;
+  DIS_UpdateChar(IEEE_CERTIFICATION_UUID, &dis_information_data);
+#endif
+
+#if ((BLE_CFG_DIS_PNP_ID != 0) || (CFG_MENU_DEVICE_INFORMATION != 0))
+  /**
+   * Update PNP ID Information
+   *
+   * @param UUID
+   * @param pPData
+   * @return
+   */
+  dis_information_data.pPayload = (uint8_t *)pnp_id;
+  dis_information_data.Length = BLE_CFG_DIS_PNP_ID_LEN_MAX;
+  DIS_UpdateChar(PNP_ID_UUID, &dis_information_data);
+#endif
+}
diff --git a/firmware/targets/f3/ble-glue/dis_app.h b/firmware/targets/f3/ble-glue/dis_app.h
new file mode 100644
index 00000000..c24fc775
--- /dev/null
+++ b/firmware/targets/f3/ble-glue/dis_app.h
@@ -0,0 +1,20 @@
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define DISAPP_MANUFACTURER_NAME              "Flipperdevice Inc."
+#define DISAPP_MODEL_NUMBER                   "FlipperZero"
+#define DISAPP_SERIAL_NUMBER                  "1.0"
+#define DISAPP_HARDWARE_REVISION_NUMBER       "1.0"
+#define DISAPP_FIRMWARE_REVISION_NUMBER       "1.0"
+#define DISAPP_SOFTWARE_REVISION_NUMBER       "1.0"
+#define DISAPP_OUI                            0x123456
+#define DISAPP_MANUFACTURER_ID                0x9ABCDE
+
+void DISAPP_Init(void);
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/firmware/targets/f3/ble-glue/hrs_app.c b/firmware/targets/f3/ble-glue/hrs_app.c
new file mode 100644
index 00000000..08cff558
--- /dev/null
+++ b/firmware/targets/f3/ble-glue/hrs_app.c
@@ -0,0 +1,256 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    hrs_app.c
+  * @author  MCD Application Team
+  * @brief   Heart Rate Service Application
+  ******************************************************************************
+  * @attention
+ *
+  * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics. 
+ * All rights reserved.</center></h2>
+ *
+  * This software component is licensed by ST under Ultimate Liberty license 
+  * SLA0044, the "License"; You may not use this file except in compliance with 
+ * the License. You may obtain a copy of the License at:
+ *                             www.st.com/SLA0044
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "app_common.h"
+
+#include "ble.h"
+#include "hrs_app.h"
+#include "cmsis_os.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+typedef struct
+{
+  HRS_BodySensorLocation_t BodySensorLocationChar;
+  HRS_MeasVal_t MeasurementvalueChar;
+  uint8_t ResetEnergyExpended;
+  uint8_t TimerMeasurement_Id;
+
+} HRSAPP_Context_t;
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private defines ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macros ------------------------------------------------------------*/
+#define HRSAPP_MEASUREMENT_INTERVAL   (1000000/CFG_TS_TICK_VAL)  /**< 1s */
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/**
+ * START of Section BLE_APP_CONTEXT
+ */
+
+PLACE_IN_SECTION("BLE_APP_CONTEXT") static HRSAPP_Context_t HRSAPP_Context;
+
+/**
+ * END of Section BLE_APP_CONTEXT
+ */
+
+osThreadId_t HrsProcessId;
+
+const osThreadAttr_t HrsProcess_attr = {
+    .name = CFG_HRS_PROCESS_NAME,
+    .attr_bits = CFG_HRS_PROCESS_ATTR_BITS,
+    .cb_mem = CFG_HRS_PROCESS_CB_MEM,
+    .cb_size = CFG_HRS_PROCESS_CB_SIZE,
+    .stack_mem = CFG_HRS_PROCESS_STACK_MEM,
+    .priority = CFG_HRS_PROCESS_PRIORITY,
+    .stack_size = CFG_HRS_PROCESS_STACK_SIZE
+};
+
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private functions prototypes-----------------------------------------------*/
+static void HrMeas( void );
+static void HrsProcess(void *argument);
+static void HRSAPP_Measurement(void);
+static uint32_t HRSAPP_Read_RTC_SSR_SS ( void );
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Functions Definition ------------------------------------------------------*/
+void HRS_Notification(HRS_App_Notification_evt_t *pNotification)
+{
+/* USER CODE BEGIN HRS_Notification_1 */
+
+/* USER CODE END HRS_Notification_1 */
+  switch(pNotification->HRS_Evt_Opcode)
+  {
+/* USER CODE BEGIN HRS_Notification_HRS_Evt_Opcode */
+
+/* USER CODE END HRS_Notification_HRS_Evt_Opcode */
+#if (BLE_CFG_HRS_ENERGY_EXPENDED_INFO_FLAG != 0)
+    case HRS_RESET_ENERGY_EXPENDED_EVT:
+/* USER CODE BEGIN HRS_RESET_ENERGY_EXPENDED_EVT */
+      HRSAPP_Context.MeasurementvalueChar.EnergyExpended = 0;
+      HRSAPP_Context.ResetEnergyExpended = 1;
+/* USER CODE END HRS_RESET_ENERGY_EXPENDED_EVT */
+      break;
+#endif
+
+    case HRS_NOTIFICATION_ENABLED:
+/* USER CODE BEGIN HRS_NOTIFICATION_ENABLED */
+      /**
+       * It could be the enable notification is received twice without the disable notification in between
+       */
+      HW_TS_Stop(HRSAPP_Context.TimerMeasurement_Id);
+      HW_TS_Start(HRSAPP_Context.TimerMeasurement_Id, HRSAPP_MEASUREMENT_INTERVAL);
+/* USER CODE END HRS_NOTIFICATION_ENABLED */
+      break;
+
+    case HRS_NOTIFICATION_DISABLED:
+/* USER CODE BEGIN HRS_NOTIFICATION_DISABLED */
+      HW_TS_Stop(HRSAPP_Context.TimerMeasurement_Id);
+/* USER CODE END HRS_NOTIFICATION_DISABLED */
+      break;
+
+#if (BLE_CFG_OTA_REBOOT_CHAR != 0)
+    case HRS_STM_BOOT_REQUEST_EVT:
+/* USER CODE BEGIN HRS_STM_BOOT_REQUEST_EVT */
+      *(uint32_t*)SRAM1_BASE = *(uint32_t*)pNotification->DataTransfered.pPayload;
+      NVIC_SystemReset();
+/* USER CODE END HRS_STM_BOOT_REQUEST_EVT */
+      break;
+#endif
+
+   default:
+/* USER CODE BEGIN HRS_Notification_Default */
+
+/* USER CODE END HRS_Notification_Default */
+      break;
+  }
+/* USER CODE BEGIN HRS_Notification_2 */
+
+/* USER CODE END HRS_Notification_2 */
+  return;
+}
+
+void HRSAPP_Init(void)
+{
+  HrsProcessId = osThreadNew(HrsProcess, NULL, &HrsProcess_attr);
+/* USER CODE BEGIN HRSAPP_Init */
+  /**
+   * Set Body Sensor Location
+   */
+  HRSAPP_Context.ResetEnergyExpended = 0;
+  HRSAPP_Context.BodySensorLocationChar = HRS_BODY_SENSOR_LOCATION_HAND;
+  HRS_UpdateChar(SENSOR_LOCATION_UUID, (uint8_t *)&HRSAPP_Context.BodySensorLocationChar);
+
+
+  /**
+   * Set Flags for measurement value
+   */
+
+  HRSAPP_Context.MeasurementvalueChar.Flags = ( HRS_HRM_VALUE_FORMAT_UINT16      | 
+                                                  HRS_HRM_SENSOR_CONTACTS_PRESENT   | 
+                                                  HRS_HRM_SENSOR_CONTACTS_SUPPORTED |
+                                                  HRS_HRM_ENERGY_EXPENDED_PRESENT  |
+                                                  HRS_HRM_RR_INTERVAL_PRESENT );
+
+#if (BLE_CFG_HRS_ENERGY_EXPENDED_INFO_FLAG != 0)
+  if(HRSAPP_Context.MeasurementvalueChar.Flags & HRS_HRM_ENERGY_EXPENDED_PRESENT)
+    HRSAPP_Context.MeasurementvalueChar.EnergyExpended = 10;
+#endif
+  
+#if (BLE_CFG_HRS_ENERGY_RR_INTERVAL_FLAG != 0)
+  if(HRSAPP_Context.MeasurementvalueChar.Flags & HRS_HRM_RR_INTERVAL_PRESENT)
+  {
+    uint8_t i;
+    
+    HRSAPP_Context.MeasurementvalueChar.NbreOfValidRRIntervalValues = BLE_CFG_HRS_ENERGY_RR_INTERVAL_FLAG;
+    for(i = 0; i < BLE_CFG_HRS_ENERGY_RR_INTERVAL_FLAG; i++)
+      HRSAPP_Context.MeasurementvalueChar.aRRIntervalValues[i] = 1024;
+  }
+#endif
+  
+  /**
+   * Create timer for Heart Rate Measurement
+   */
+  HW_TS_Create(CFG_TIM_PROC_ID_ISR, &(HRSAPP_Context.TimerMeasurement_Id), hw_ts_Repeated, HrMeas);
+
+/* USER CODE END HRSAPP_Init */
+  return;
+}
+
+static void HrsProcess(void *argument)
+{
+  UNUSED(argument);
+
+  for(;;)
+  {
+    osThreadFlagsWait( 1, osFlagsWaitAny, osWaitForever);
+    HRSAPP_Measurement( );
+  }
+}
+
+static void HRSAPP_Measurement(void)
+{
+/* USER CODE BEGIN HRSAPP_Measurement */
+  uint32_t measurement;
+
+  measurement = ((HRSAPP_Read_RTC_SSR_SS()) & 0x07) + 65;
+
+  HRSAPP_Context.MeasurementvalueChar.MeasurementValue = measurement;
+#if (BLE_CFG_HRS_ENERGY_EXPENDED_INFO_FLAG != 0)
+  if((HRSAPP_Context.MeasurementvalueChar.Flags & HRS_HRM_ENERGY_EXPENDED_PRESENT) &&
+     (HRSAPP_Context.ResetEnergyExpended == 0))
+    HRSAPP_Context.MeasurementvalueChar.EnergyExpended += 5;
+  else if(HRSAPP_Context.ResetEnergyExpended == 1)
+    HRSAPP_Context.ResetEnergyExpended = 0;
+#endif
+
+  HRS_UpdateChar(HEART_RATE_MEASURMENT_UUID, (uint8_t *)&HRSAPP_Context.MeasurementvalueChar);
+
+/* USER CODE END HRSAPP_Measurement */
+  return;
+}
+
+static void HrMeas( void )
+{
+  /**
+   * The code shall be executed in the background as aci command may be sent
+   * The background is the only place where the application can make sure a new aci command
+   * is not sent if there is a pending one
+   */
+  osThreadFlagsSet( HrsProcessId, 1 );
+
+/* USER CODE BEGIN HrMeas */
+
+/* USER CODE END HrMeas */
+
+  return;
+}
+
+static uint32_t HRSAPP_Read_RTC_SSR_SS ( void )
+{
+  return ((uint32_t)(READ_BIT(RTC->SSR, RTC_SSR_SS)));
+}
+
+/* USER CODE BEGIN FD */
+
+/* USER CODE END FD */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/firmware/targets/f3/ble-glue/hrs_app.h b/firmware/targets/f3/ble-glue/hrs_app.h
new file mode 100644
index 00000000..0246d281
--- /dev/null
+++ b/firmware/targets/f3/ble-glue/hrs_app.h
@@ -0,0 +1,69 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    hrs_app.h
+  * @author  MCD Application Team
+  * @brief   Header for hrs_application.c module
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics. 
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license 
+  * SLA0044, the "License"; You may not use this file except in compliance with 
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __HRS_APP_H
+#define __HRS_APP_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* External variables --------------------------------------------------------*/
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/* Exported macros ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions ---------------------------------------------*/
+void HRSAPP_Init( void );
+/* USER CODE BEGIN EF */
+
+/* USER CODE END EF */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /*__HRS_APP_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/firmware/targets/f3/ble-glue/hw_conf.h b/firmware/targets/f3/ble-glue/hw_conf.h
new file mode 100644
index 00000000..dcda0176
--- /dev/null
+++ b/firmware/targets/f3/ble-glue/hw_conf.h
@@ -0,0 +1,199 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file    hw_conf.h
+ * @author  MCD Application Team
+ * @brief   Configuration of hardware interface
+  ******************************************************************************
+  * @attention
+  *
+ * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license 
+  * SLA0044, the "License"; You may not use this file except in compliance with 
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef HW_CONF_H
+#define HW_CONF_H
+
+#include "FreeRTOSConfig.h"
+
+/******************************************************************************
+ * Semaphores
+ * THIS SHALL NO BE CHANGED AS THESE SEMAPHORES ARE USED AS WELL ON THE CM0+
+ *****************************************************************************/
+/**
+*  Index of the semaphore used by CPU2 to prevent the CPU1 to either write or erase data in flash
+*  The CPU1 shall not either write or erase in flash when this semaphore is taken by the CPU2
+*  When the CPU1 needs to either write or erase in flash, it shall first get the semaphore and release it just
+*  after writing a raw (64bits data) or erasing one sector.
+*  Once the Semaphore has been released, there shall be at least 1us before it can be taken again. This is required
+*  to give the opportunity to CPU2 to take it.
+*  On v1.4.0 and older CPU2 wireless firmware, this semaphore is unused and CPU2 is using PES bit.
+*  By default, CPU2 is using the PES bit to protect its timing. The CPU1 may request the CPU2 to use the semaphore
+*  instead of the PES bit by sending the system command SHCI_C2_SetFlashActivityControl()
+*/
+#define CFG_HW_BLOCK_FLASH_REQ_BY_CPU2_SEMID                    7
+
+/**
+*  Index of the semaphore used by CPU1 to prevent the CPU2 to either write or erase data in flash
+*  In order to protect its timing, the CPU1 may get this semaphore to prevent the  CPU2 to either
+*  write or erase in flash (as this will stall both CPUs)
+*  The PES bit shall not be used as this may stall the CPU2 in some cases.
+*/
+#define CFG_HW_BLOCK_FLASH_REQ_BY_CPU1_SEMID                    6
+
+/**
+*  Index of the semaphore used to manage the CLK48 clock configuration
+*  When the USB is required, this semaphore shall be taken before configuring te CLK48 for USB
+*  and should be released after the application switch OFF the clock when the USB is not used anymore
+*  When using the RNG, it is good enough to use CFG_HW_RNG_SEMID to control CLK48.
+*  More details in AN5289
+*/
+#define CFG_HW_CLK48_CONFIG_SEMID                               5
+
+/* Index of the semaphore used to manage the entry Stop Mode procedure */
+#define CFG_HW_ENTRY_STOP_MODE_SEMID                            4
+
+/* Index of the semaphore used to access the RCC */
+#define CFG_HW_RCC_SEMID                                        3
+
+/* Index of the semaphore used to access the FLASH */
+#define CFG_HW_FLASH_SEMID                                      2
+
+/* Index of the semaphore used to access the PKA */
+#define CFG_HW_PKA_SEMID                                        1
+
+/* Index of the semaphore used to access the RNG */
+#define CFG_HW_RNG_SEMID                                        0
+
+/******************************************************************************
+ * HW TIMER SERVER
+ *****************************************************************************/
+/**
+ * The user may define the maximum number of virtual timers supported.
+ * It shall not exceed 255
+ */
+#define CFG_HW_TS_MAX_NBR_CONCURRENT_TIMER  6
+
+/**
+ * The user may define the priority in the NVIC of the RTC_WKUP interrupt handler that is used to manage the
+ * wakeup timer.
+ * This setting is the preemptpriority part of the NVIC.
+ */
+#define CFG_HW_TS_NVIC_RTC_WAKEUP_IT_PREEMPTPRIO    (configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY + 1) /* FreeRTOS requirement */
+
+/**
+ * The user may define the priority in the NVIC of the RTC_WKUP interrupt handler that is used to manage the
+ * wakeup timer.
+ * This setting is the subpriority part of the NVIC. It does not exist on all processors. When it is not supported
+ * on the CPU, the setting is ignored
+ */
+#define CFG_HW_TS_NVIC_RTC_WAKEUP_IT_SUBPRIO  0
+
+/**
+ *  Define a critical section in the Timer server
+ *  The Timer server does not support the API to be nested
+ *  The  Application shall either:
+ *    a) Ensure this will never happen
+ *    b) Define the critical section
+ *  The default implementations is masking all interrupts using the PRIMASK bit
+ *  The TimerServer driver uses critical sections to avoid context corruption. This is achieved with the macro
+ *  TIMER_ENTER_CRITICAL_SECTION and TIMER_EXIT_CRITICAL_SECTION. When CFG_HW_TS_USE_PRIMASK_AS_CRITICAL_SECTION is set
+ *  to 1, all STM32 interrupts are masked with the PRIMASK bit of the CortexM CPU. It is possible to use the BASEPRI
+ *  register of the CortexM CPU to keep allowed some interrupts with high priority. In that case, the user shall
+ *  re-implement TIMER_ENTER_CRITICAL_SECTION and TIMER_EXIT_CRITICAL_SECTION and shall make sure that no TimerServer
+ *  API are called when the TIMER critical section is entered
+ */
+#define CFG_HW_TS_USE_PRIMASK_AS_CRITICAL_SECTION  1
+
+/**
+   * This value shall reflect the maximum delay there could be in the application between the time the RTC interrupt
+   * is generated by the Hardware and the time when the  RTC interrupt handler is called. This time is measured in
+   * number of RTCCLK ticks.
+   * A relaxed timing would be 10ms
+   * When the value is too short, the timerserver will not be able to count properly and all timeout may be random.
+   * When the value is too long, the device may wake up more often than the most optimal configuration. However, the
+   * impact on power consumption would be marginal (unless the value selected is extremely too long). It is strongly
+   * recommended to select a value large enough to make sure it is not too short to ensure reliability of the system
+   * as this will have marginal impact on low power mode
+   */
+#define CFG_HW_TS_RTC_HANDLER_MAX_DELAY  ( 10 * (LSI_VALUE/1000) )
+
+  /**
+   * Interrupt ID in the NVIC of the RTC Wakeup interrupt handler
+   * It shall be type of IRQn_Type
+   */
+#define CFG_HW_TS_RTC_WAKEUP_HANDLER_ID  RTC_WKUP_IRQn
+
+/******************************************************************************
+ * HW UART
+ *****************************************************************************/
+#define CFG_HW_LPUART1_ENABLED           0
+#define CFG_HW_LPUART1_DMA_TX_SUPPORTED  0
+
+#define CFG_HW_USART1_ENABLED           1
+#define CFG_HW_USART1_DMA_TX_SUPPORTED  1
+
+/**
+ * UART1
+ */
+#define CFG_HW_USART1_PREEMPTPRIORITY         0x0F
+#define CFG_HW_USART1_SUBPRIORITY             0
+
+/** < The application shall check the selected source clock is enable */
+#define CFG_HW_USART1_SOURCE_CLOCK              RCC_USART1CLKSOURCE_SYSCLK
+
+#define CFG_HW_USART1_BAUDRATE                115200
+#define CFG_HW_USART1_WORDLENGTH              UART_WORDLENGTH_8B
+#define CFG_HW_USART1_STOPBITS                UART_STOPBITS_1
+#define CFG_HW_USART1_PARITY                  UART_PARITY_NONE
+#define CFG_HW_USART1_HWFLOWCTL               UART_HWCONTROL_NONE
+#define CFG_HW_USART1_MODE                    UART_MODE_TX_RX
+#define CFG_HW_USART1_ADVFEATUREINIT          UART_ADVFEATURE_NO_INIT
+#define CFG_HW_USART1_OVERSAMPLING            UART_OVERSAMPLING_8
+
+#define CFG_HW_USART1_TX_PORT_CLK_ENABLE      __HAL_RCC_GPIOB_CLK_ENABLE
+#define CFG_HW_USART1_TX_PORT                 GPIOB
+#define CFG_HW_USART1_TX_PIN                  GPIO_PIN_6
+#define CFG_HW_USART1_TX_MODE                 GPIO_MODE_AF_PP
+#define CFG_HW_USART1_TX_PULL                 GPIO_NOPULL
+#define CFG_HW_USART1_TX_SPEED                GPIO_SPEED_FREQ_VERY_HIGH
+#define CFG_HW_USART1_TX_ALTERNATE            GPIO_AF7_USART1
+
+#define CFG_HW_USART1_RX_PORT_CLK_ENABLE      __HAL_RCC_GPIOB_CLK_ENABLE
+#define CFG_HW_USART1_RX_PORT                 GPIOB
+#define CFG_HW_USART1_RX_PIN                  GPIO_PIN_7
+#define CFG_HW_USART1_RX_MODE                 GPIO_MODE_AF_PP
+#define CFG_HW_USART1_RX_PULL                 GPIO_NOPULL
+#define CFG_HW_USART1_RX_SPEED                GPIO_SPEED_FREQ_VERY_HIGH
+#define CFG_HW_USART1_RX_ALTERNATE            GPIO_AF7_USART1
+
+#define CFG_HW_USART1_CTS_PORT_CLK_ENABLE     __HAL_RCC_GPIOA_CLK_ENABLE
+#define CFG_HW_USART1_CTS_PORT                GPIOA
+#define CFG_HW_USART1_CTS_PIN                 GPIO_PIN_11
+#define CFG_HW_USART1_CTS_MODE                GPIO_MODE_AF_PP
+#define CFG_HW_USART1_CTS_PULL                GPIO_PULLDOWN
+#define CFG_HW_USART1_CTS_SPEED               GPIO_SPEED_FREQ_VERY_HIGH
+#define CFG_HW_USART1_CTS_ALTERNATE           GPIO_AF7_USART1
+
+#define CFG_HW_USART1_DMA_TX_PREEMPTPRIORITY  0x0F
+#define CFG_HW_USART1_DMA_TX_SUBPRIORITY      0
+
+#define CFG_HW_USART1_DMAMUX_CLK_ENABLE       __HAL_RCC_DMAMUX1_CLK_ENABLE
+#define CFG_HW_USART1_DMA_CLK_ENABLE          __HAL_RCC_DMA2_CLK_ENABLE
+#define CFG_HW_USART1_TX_DMA_REQ			  DMA_REQUEST_USART1_TX
+#define CFG_HW_USART1_TX_DMA_CHANNEL          DMA2_Channel4
+#define CFG_HW_USART1_TX_DMA_IRQn             DMA2_Channel4_IRQn
+#define CFG_HW_USART1_DMA_TX_IRQHandler       DMA2_Channel4_IRQHandler
+
+#endif /*HW_CONF_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/firmware/targets/f3/ble-glue/hw_if.h b/firmware/targets/f3/ble-glue/hw_if.h
new file mode 100644
index 00000000..271a222a
--- /dev/null
+++ b/firmware/targets/f3/ble-glue/hw_if.h
@@ -0,0 +1,250 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    hw_if.h
+  * @author  MCD Application Team
+  * @brief   Hardware Interface
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef HW_IF_H
+#define HW_IF_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+  /* Includes ------------------------------------------------------------------*/
+#include "stm32wbxx.h"
+#include "stm32wbxx_ll_exti.h"
+#include "stm32wbxx_ll_system.h"
+#include "stm32wbxx_ll_rcc.h"
+#include "stm32wbxx_ll_ipcc.h"
+#include "stm32wbxx_ll_bus.h"
+#include "stm32wbxx_ll_pwr.h"
+#include "stm32wbxx_ll_cortex.h"
+#include "stm32wbxx_ll_utils.h"
+#include "stm32wbxx_ll_hsem.h"
+#include "stm32wbxx_ll_gpio.h"
+#include "stm32wbxx_ll_rtc.h"
+
+#ifdef  USE_STM32WBXX_USB_DONGLE
+#include "stm32wbxx_usb_dongle.h"
+#endif
+#ifdef  USE_STM32WBXX_NUCLEO
+#include "stm32wbxx_nucleo.h"
+#endif
+#ifdef  USE_X_NUCLEO_EPD
+#include "x_nucleo_epd.h"
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+  /******************************************************************************
+   * HW UART
+   ******************************************************************************/
+  typedef enum
+  {
+    hw_uart1,
+    hw_uart2,
+    hw_lpuart1,
+  } hw_uart_id_t;
+
+  typedef enum
+  {
+    hw_uart_ok,
+    hw_uart_error,
+    hw_uart_busy,
+    hw_uart_to,
+  } hw_status_t;
+
+  void HW_UART_Init(hw_uart_id_t hw_uart_id);
+  void HW_UART_Receive_IT(hw_uart_id_t hw_uart_id, uint8_t *pData, uint16_t Size, void (*Callback)(void));
+  void HW_UART_Transmit_IT(hw_uart_id_t hw_uart_id, uint8_t *pData, uint16_t Size,  void (*Callback)(void));
+  hw_status_t HW_UART_Transmit(hw_uart_id_t hw_uart_id, uint8_t *p_data, uint16_t size,  uint32_t timeout);
+  hw_status_t HW_UART_Transmit_DMA(hw_uart_id_t hw_uart_id, uint8_t *p_data, uint16_t size, void (*Callback)(void));
+  void HW_UART_Interrupt_Handler(hw_uart_id_t hw_uart_id);
+  void HW_UART_DMA_Interrupt_Handler(hw_uart_id_t hw_uart_id);
+
+  /******************************************************************************
+   * HW TimerServer
+   ******************************************************************************/
+  /* Exported types ------------------------------------------------------------*/
+  /**
+   * This setting is used when standby mode is supported.
+   * hw_ts_InitMode_Limited should be used when the device restarts from Standby Mode. In that case, the Timer Server does
+   * not re-initialized its context. Only the Hardware register which content has been lost is reconfigured
+   * Otherwise, hw_ts_InitMode_Full should be requested (Start from Power ON) and everything is re-initialized.
+   */
+  typedef enum
+  {
+    hw_ts_InitMode_Full,
+    hw_ts_InitMode_Limited,
+  } HW_TS_InitMode_t;
+
+  /**
+   * When a Timer is created as a SingleShot timer, it is not automatically restarted when the timeout occurs. However,
+   * the timer is kept reserved in the list and could be restarted at anytime with HW_TS_Start()
+   *
+   * When a Timer is created as a Repeated timer, it is automatically restarted when the timeout occurs.
+   */
+  typedef enum
+  {
+    hw_ts_SingleShot,
+    hw_ts_Repeated
+  } HW_TS_Mode_t;
+
+  /**
+   * hw_ts_Successful is returned when a Timer has been successfully created with HW_TS_Create(). Otherwise, hw_ts_Failed
+   * is returned. When hw_ts_Failed is returned, that means there are not enough free slots in the list to create a
+   * Timer. In that case, CFG_HW_TS_MAX_NBR_CONCURRENT_TIMER should be increased
+   */
+  typedef enum
+  {
+    hw_ts_Successful,
+    hw_ts_Failed,
+  }HW_TS_ReturnStatus_t;
+
+  typedef void (*HW_TS_pTimerCb_t)(void);
+
+  /**
+   * @brief  Initialize the timer server
+   *         This API shall be called by the application before any timer is requested to the timer server. It
+   *         configures the RTC module to be connected to the LSI input clock.
+   *
+   * @param  TimerInitMode: When the device restarts from Standby, it should request hw_ts_InitMode_Limited so that the
+   *         Timer context is not re-initialized. Otherwise, hw_ts_InitMode_Full should be requested
+   * @param  hrtc: RTC Handle
+   * @retval None
+   */
+  void HW_TS_Init(HW_TS_InitMode_t TimerInitMode, RTC_HandleTypeDef *hrtc);
+
+  /**
+   * @brief  Interface to create a virtual timer
+   *         The user shall call this API to create a timer. Once created, the timer is reserved to the module until it
+   *         has been deleted. When creating a timer, the user shall specify the mode (single shot or repeated), the
+   *         callback to be notified when the timer expires and a module ID to identify in the timer interrupt handler
+   *         which module is concerned. In return, the user gets a timer ID to handle it.
+   *
+   * @param  TimerProcessID:  This is an identifier provided by the user and returned in the callback to allow
+   *                          identification of the requester
+   * @param  pTimerId: Timer Id returned to the user to request operation (start, stop, delete)
+   * @param  TimerMode: Mode of the virtual timer (Single shot or repeated)
+   * @param  pTimerCallBack: Callback when the virtual timer expires
+   * @retval HW_TS_ReturnStatus_t: Return whether the creation is sucessfull or not
+   */
+  HW_TS_ReturnStatus_t HW_TS_Create(uint32_t TimerProcessID, uint8_t *pTimerId, HW_TS_Mode_t TimerMode, HW_TS_pTimerCb_t pTimerCallBack);
+
+  /**
+   * @brief  Stop a virtual timer
+   *         This API may be used to stop a running timer. A timer which is stopped is move to the pending state.
+   *         A pending timer may be restarted at any time with a different timeout value but the mode cannot be changed.
+   *         Nothing is done when it is called to stop a timer which has been already stopped
+   *
+   * @param  TimerID:  Id of the timer to stop
+   * @retval None
+   */
+  void HW_TS_Stop(uint8_t TimerID);
+
+  /**
+   * @brief  Start a virtual timer
+   *         This API shall be used to start a timer. The timeout value is specified and may be different each time.
+   *         When the timer is in the single shot mode, it will move to the pending state when it expires. The user may
+   *         restart it at any time with a different timeout value. When the timer is in the repeated mode, it always
+   *         stay in the running state. When the timer expires, it will be restarted with the same timeout value.
+   *         This API shall not be called on a running timer.
+   *
+   * @param  TimerID:  The ID Id of the timer to start
+   * @param  timeout_ticks: Number of ticks of the virtual timer (Maximum value is (0xFFFFFFFF-0xFFFF = 0xFFFF0000)
+   * @retval None
+   */
+  void HW_TS_Start(uint8_t TimerID, uint32_t timeout_ticks);
+
+  /**
+   * @brief  Delete a virtual timer from the list
+   *         This API should be used when a timer is not needed anymore by the user. A deleted timer is removed from
+   *         the timer list managed by the timer server. It cannot be restarted again. The user has to go with the
+   *         creation of a new timer if required and may get a different timer id
+   *
+   * @param  TimerID:  The ID of the timer to remove from the list
+   * @retval None
+   */
+  void HW_TS_Delete(uint8_t TimerID);
+
+  /**
+   * @brief  Schedule the timer list on the timer interrupt handler
+   *         This interrupt handler shall be called by the application in the RTC interrupt handler. This handler takes
+   *         care of clearing all status flag required in the RTC and EXTI peripherals
+   *
+   * @param  None
+   * @retval None
+   */
+  void HW_TS_RTC_Wakeup_Handler(void);
+
+  /**
+   * @brief  Return the number of ticks to count before the interrupt
+   *         This API returns the number of ticks left to be counted before an interrupt is generated by the
+   *         Timer Server. This API may be used by the application for power management optimization. When the system
+   *         enters low power mode, the mode selection is a tradeoff between the wakeup time where the CPU is running
+   *         and the time while the CPU will be kept in low power mode before next wakeup. The deeper is the
+   *         low power mode used, the longer is the wakeup time. The low power mode management considering wakeup time
+   *         versus time in low power mode is implementation specific
+   *         When the timer is disabled (No timer in the list), it returns 0xFFFF
+   *
+   * @param  None
+   * @retval The number of ticks left to count
+   */
+  uint16_t HW_TS_RTC_ReadLeftTicksToCount(void);
+
+  /**
+   * @brief  Notify the application that a registered timer has expired
+   *         This API shall be implemented by the user application.
+   *         This API notifies the application that a timer expires. This API is running in the RTC Wakeup interrupt
+   *         context. The application may implement an Operating System to change the context priority where the timer
+   *         callback may be handled. This API provides the module ID to identify which module is concerned and to allow
+   *         sending the information to the correct task
+   *
+   * @param  TimerProcessID: The TimerProcessId associated with the timer when it has been created
+   * @param  TimerID: The TimerID of the expired timer
+   * @param  pTimerCallBack: The Callback associated with the timer when it has been created
+   * @retval None
+   */
+  void HW_TS_RTC_Int_AppNot(uint32_t TimerProcessID, uint8_t TimerID, HW_TS_pTimerCb_t pTimerCallBack);
+
+  /**
+   * @brief  Notify the application that the wakeupcounter has been updated
+   *         This API should be implemented by the user application
+   *         This API notifies the application that the counter has been updated. This is expected to be used along
+   *         with the HW_TS_RTC_ReadLeftTicksToCount () API. It could be that the counter has been updated since the
+   *         last call of HW_TS_RTC_ReadLeftTicksToCount () and before entering low power mode. This notification
+   *         provides a way to the application to solve that race condition to reevaluate the counter value before
+   *         entering low power mode
+   *
+   * @param  None
+   * @retval None
+   */
+  void HW_TS_RTC_CountUpdated_AppNot(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /*HW_IF_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/firmware/targets/f3/ble-glue/hw_ipcc.c b/firmware/targets/f3/ble-glue/hw_ipcc.c
new file mode 100644
index 00000000..17b5a4d8
--- /dev/null
+++ b/firmware/targets/f3/ble-glue/hw_ipcc.c
@@ -0,0 +1,675 @@
+/**
+ ******************************************************************************
+  * File Name          : Target/hw_ipcc.c
+  * Description        : Hardware IPCC source file for STM32WPAN Middleware.
+  *
+ ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "app_common.h"
+#include "mbox_def.h"
+
+/* Global variables ---------------------------------------------------------*/
+/* Private defines -----------------------------------------------------------*/
+#define HW_IPCC_TX_PENDING( channel ) ( !(LL_C1_IPCC_IsActiveFlag_CHx( IPCC, channel )) ) &&  (((~(IPCC->C1MR)) & (channel << 16U)))
+#define HW_IPCC_RX_PENDING( channel )  (LL_C2_IPCC_IsActiveFlag_CHx( IPCC, channel )) && (((~(IPCC->C1MR)) & (channel << 0U)))
+
+/* Private macros ------------------------------------------------------------*/
+/* Private typedef -----------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+static void (*FreeBufCb)( void );
+
+/* Private function prototypes -----------------------------------------------*/
+static void HW_IPCC_BLE_EvtHandler( void );
+static void HW_IPCC_BLE_AclDataEvtHandler( void );
+static void HW_IPCC_MM_FreeBufHandler( void );
+static void HW_IPCC_SYS_CmdEvtHandler( void );
+static void HW_IPCC_SYS_EvtHandler( void );
+static void HW_IPCC_TRACES_EvtHandler( void );
+
+#ifdef THREAD_WB
+static void HW_IPCC_OT_CmdEvtHandler( void );
+static void HW_IPCC_THREAD_NotEvtHandler( void );
+static void HW_IPCC_THREAD_CliNotEvtHandler( void );
+#endif
+
+#ifdef LLD_TESTS_WB
+static void HW_IPCC_LLDTESTS_ReceiveCliRspHandler( void );
+static void HW_IPCC_LLDTESTS_ReceiveM0CmdHandler( void );
+#endif
+#ifdef LLD_BLE_WB
+/*static void HW_IPCC_LLD_BLE_ReceiveCliRspHandler( void );*/
+static void HW_IPCC_LLD_BLE_ReceiveRspHandler( void );
+static void HW_IPCC_LLD_BLE_ReceiveM0CmdHandler( void );
+#endif
+
+#ifdef MAC_802_15_4_WB
+static void HW_IPCC_MAC_802_15_4_CmdEvtHandler( void );
+static void HW_IPCC_MAC_802_15_4_NotEvtHandler( void );
+#endif
+
+#ifdef ZIGBEE_WB
+static void HW_IPCC_ZIGBEE_CmdEvtHandler( void );
+static void HW_IPCC_ZIGBEE_StackNotifEvtHandler( void );
+static void HW_IPCC_ZIGBEE_StackM0RequestHandler( void );
+#endif
+
+/* Public function definition -----------------------------------------------*/
+
+/******************************************************************************
+ * INTERRUPT HANDLER
+ ******************************************************************************/
+void HW_IPCC_Rx_Handler( void )
+{
+  if (HW_IPCC_RX_PENDING( HW_IPCC_SYSTEM_EVENT_CHANNEL ))
+  {
+      HW_IPCC_SYS_EvtHandler();
+  }
+#ifdef MAC_802_15_4_WB
+  else if (HW_IPCC_RX_PENDING( HW_IPCC_MAC_802_15_4_NOTIFICATION_ACK_CHANNEL ))
+  {
+    HW_IPCC_MAC_802_15_4_NotEvtHandler();
+  }
+#endif /* MAC_802_15_4_WB */
+#ifdef THREAD_WB
+  else if (HW_IPCC_RX_PENDING( HW_IPCC_THREAD_NOTIFICATION_ACK_CHANNEL ))
+  {
+    HW_IPCC_THREAD_NotEvtHandler();
+  }
+  else if (HW_IPCC_RX_PENDING( HW_IPCC_THREAD_CLI_NOTIFICATION_ACK_CHANNEL ))
+  {
+    HW_IPCC_THREAD_CliNotEvtHandler();
+  }
+#endif /* THREAD_WB */
+#ifdef LLD_TESTS_WB
+  else if (HW_IPCC_RX_PENDING( HW_IPCC_LLDTESTS_CLI_RSP_CHANNEL ))
+  {
+    HW_IPCC_LLDTESTS_ReceiveCliRspHandler();
+  }
+  else if (HW_IPCC_RX_PENDING( HW_IPCC_LLDTESTS_M0_CMD_CHANNEL ))
+  {
+    HW_IPCC_LLDTESTS_ReceiveM0CmdHandler();
+  }
+#endif /* LLD_TESTS_WB */
+#ifdef LLD_BLE_WB
+  else if (HW_IPCC_RX_PENDING( HW_IPCC_LLD_BLE_RSP_CHANNEL ))
+  {
+    HW_IPCC_LLD_BLE_ReceiveRspHandler();
+  }
+  else if (HW_IPCC_RX_PENDING( HW_IPCC_LLD_BLE_M0_CMD_CHANNEL ))
+  {
+    HW_IPCC_LLD_BLE_ReceiveM0CmdHandler();
+  }
+#endif /* LLD_TESTS_WB */
+#ifdef ZIGBEE_WB
+  else if (HW_IPCC_RX_PENDING( HW_IPCC_ZIGBEE_APPLI_NOTIF_ACK_CHANNEL ))
+  {
+    HW_IPCC_ZIGBEE_StackNotifEvtHandler();
+  }
+  else if (HW_IPCC_RX_PENDING( HW_IPCC_ZIGBEE_M0_REQUEST_CHANNEL ))
+  {
+    HW_IPCC_ZIGBEE_StackM0RequestHandler();
+  }
+#endif /* ZIGBEE_WB */
+  else if (HW_IPCC_RX_PENDING( HW_IPCC_BLE_EVENT_CHANNEL ))
+  {
+    HW_IPCC_BLE_EvtHandler();
+  }
+  else if (HW_IPCC_RX_PENDING( HW_IPCC_TRACES_CHANNEL ))
+  {
+    HW_IPCC_TRACES_EvtHandler();
+  }
+
+  return;
+}
+
+void HW_IPCC_Tx_Handler( void )
+{
+  if (HW_IPCC_TX_PENDING( HW_IPCC_SYSTEM_CMD_RSP_CHANNEL ))
+  {
+    HW_IPCC_SYS_CmdEvtHandler();
+  }
+#ifdef MAC_802_15_4_WB
+  else if (HW_IPCC_TX_PENDING( HW_IPCC_MAC_802_15_4_CMD_RSP_CHANNEL ))
+  {
+    HW_IPCC_MAC_802_15_4_CmdEvtHandler();
+  }
+#endif /* MAC_802_15_4_WB */
+#ifdef THREAD_WB
+  else if (HW_IPCC_TX_PENDING( HW_IPCC_THREAD_OT_CMD_RSP_CHANNEL ))
+  {
+    HW_IPCC_OT_CmdEvtHandler();
+  }
+#endif /* THREAD_WB */
+#ifdef LLD_TESTS_WB
+// No TX handler for LLD tests
+#endif /* LLD_TESTS_WB */
+#ifdef ZIGBEE_WB
+  if (HW_IPCC_TX_PENDING( HW_IPCC_ZIGBEE_CMD_APPLI_CHANNEL ))
+  {
+      HW_IPCC_ZIGBEE_CmdEvtHandler();
+  }
+#endif /* ZIGBEE_WB */
+  else if (HW_IPCC_TX_PENDING( HW_IPCC_SYSTEM_CMD_RSP_CHANNEL ))
+  {
+    HW_IPCC_SYS_CmdEvtHandler();
+  }
+  else if (HW_IPCC_TX_PENDING( HW_IPCC_MM_RELEASE_BUFFER_CHANNEL ))
+  {
+    HW_IPCC_MM_FreeBufHandler();
+  }
+  else if (HW_IPCC_TX_PENDING( HW_IPCC_HCI_ACL_DATA_CHANNEL ))
+  {
+    HW_IPCC_BLE_AclDataEvtHandler();
+  }
+
+  return;
+}
+/******************************************************************************
+ * GENERAL
+ ******************************************************************************/
+void HW_IPCC_Enable( void )
+{
+  /**
+  * Such as IPCC IP available to the CPU2, it is required to keep the IPCC clock running
+    when FUS is running on CPU2 and CPU1 enters deep sleep mode
+  */
+  LL_C2_AHB3_GRP1_EnableClock(LL_C2_AHB3_GRP1_PERIPH_IPCC);
+
+   /**
+   * When the device is out of standby, it is required to use the EXTI mechanism to wakeup CPU2
+   */
+  LL_C2_EXTI_EnableEvent_32_63( LL_EXTI_LINE_41 );
+  LL_EXTI_EnableRisingTrig_32_63( LL_EXTI_LINE_41 );
+
+  /**
+   * In case the SBSFU is implemented, it may have already set the C2BOOT bit to startup the CPU2.
+   * In that case, to keep the mechanism transparent to the user application, it shall call the system command
+   * SHCI_C2_Reinit( ) before jumping to the application.
+   * When the CPU2 receives that command, it waits for its event input to be set to restart the CPU2 firmware.
+   * This is required because once C2BOOT has been set once, a clear/set on C2BOOT has no effect.
+   * When SHCI_C2_Reinit( ) is not called, generating an event to the CPU2 does not have any effect
+   * So, by default, the application shall both set the event flag and set the C2BOOT bit.
+   */
+  __SEV( );       /* Set the internal event flag and send an event to the CPU2 */
+  __WFE( );       /* Clear the internal event flag */
+  LL_PWR_EnableBootC2( );
+
+  return;
+}
+
+void HW_IPCC_Init( void )
+{
+  LL_AHB3_GRP1_EnableClock( LL_AHB3_GRP1_PERIPH_IPCC );
+
+  LL_C1_IPCC_EnableIT_RXO( IPCC );
+  LL_C1_IPCC_EnableIT_TXF( IPCC );
+
+  HAL_NVIC_SetPriority(IPCC_C1_RX_IRQn, 6, 0);
+  HAL_NVIC_EnableIRQ(IPCC_C1_RX_IRQn);
+  HAL_NVIC_SetPriority(IPCC_C1_TX_IRQn, 6, 0);
+  HAL_NVIC_EnableIRQ(IPCC_C1_TX_IRQn);
+
+  return;
+}
+
+/******************************************************************************
+ * BLE
+ ******************************************************************************/
+void HW_IPCC_BLE_Init( void )
+{
+  LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_BLE_EVENT_CHANNEL );
+
+  return;
+}
+
+void HW_IPCC_BLE_SendCmd( void )
+{
+  LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_BLE_CMD_CHANNEL );
+
+  return;
+}
+
+static void HW_IPCC_BLE_EvtHandler( void )
+{
+  HW_IPCC_BLE_RxEvtNot();
+
+  LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_BLE_EVENT_CHANNEL );
+
+  return;
+}
+
+void HW_IPCC_BLE_SendAclData( void )
+{
+  LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_HCI_ACL_DATA_CHANNEL );
+  LL_C1_IPCC_EnableTransmitChannel( IPCC, HW_IPCC_HCI_ACL_DATA_CHANNEL );
+
+  return;
+}
+
+static void HW_IPCC_BLE_AclDataEvtHandler( void )
+{
+  LL_C1_IPCC_DisableTransmitChannel( IPCC, HW_IPCC_HCI_ACL_DATA_CHANNEL );
+
+  HW_IPCC_BLE_AclDataAckNot();
+
+  return;
+}
+
+__weak void HW_IPCC_BLE_AclDataAckNot( void ){};
+__weak void HW_IPCC_BLE_RxEvtNot( void ){};
+
+/******************************************************************************
+ * SYSTEM
+ ******************************************************************************/
+void HW_IPCC_SYS_Init( void )
+{
+  LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_SYSTEM_EVENT_CHANNEL );
+
+  return;
+}
+
+void HW_IPCC_SYS_SendCmd( void )
+{
+  LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_SYSTEM_CMD_RSP_CHANNEL );
+  LL_C1_IPCC_EnableTransmitChannel( IPCC, HW_IPCC_SYSTEM_CMD_RSP_CHANNEL );
+
+  return;
+}
+
+static void HW_IPCC_SYS_CmdEvtHandler( void )
+{
+  LL_C1_IPCC_DisableTransmitChannel( IPCC, HW_IPCC_SYSTEM_CMD_RSP_CHANNEL );
+
+  HW_IPCC_SYS_CmdEvtNot();
+
+  return;
+}
+
+static void HW_IPCC_SYS_EvtHandler( void )
+{
+  HW_IPCC_SYS_EvtNot();
+
+  LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_SYSTEM_EVENT_CHANNEL );
+
+  return;
+}
+
+__weak void HW_IPCC_SYS_CmdEvtNot( void ){};
+__weak void HW_IPCC_SYS_EvtNot( void ){};
+
+/******************************************************************************
+ * MAC 802.15.4
+ ******************************************************************************/
+#ifdef MAC_802_15_4_WB
+void HW_IPCC_MAC_802_15_4_Init( void )
+{
+  LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_MAC_802_15_4_NOTIFICATION_ACK_CHANNEL );
+
+  return;
+}
+
+void HW_IPCC_MAC_802_15_4_SendCmd( void )
+{
+  LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_MAC_802_15_4_CMD_RSP_CHANNEL );
+  LL_C1_IPCC_EnableTransmitChannel( IPCC, HW_IPCC_MAC_802_15_4_CMD_RSP_CHANNEL );
+
+  return;
+}
+
+void HW_IPCC_MAC_802_15_4_SendAck( void )
+{
+  LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_MAC_802_15_4_NOTIFICATION_ACK_CHANNEL );
+  LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_MAC_802_15_4_NOTIFICATION_ACK_CHANNEL );
+
+  return;
+}
+
+static void HW_IPCC_MAC_802_15_4_CmdEvtHandler( void )
+{
+  LL_C1_IPCC_DisableTransmitChannel( IPCC, HW_IPCC_MAC_802_15_4_CMD_RSP_CHANNEL );
+
+  HW_IPCC_MAC_802_15_4_CmdEvtNot();
+
+  return;
+}
+
+static void HW_IPCC_MAC_802_15_4_NotEvtHandler( void )
+{
+  LL_C1_IPCC_DisableReceiveChannel( IPCC, HW_IPCC_MAC_802_15_4_NOTIFICATION_ACK_CHANNEL );
+
+  HW_IPCC_MAC_802_15_4_EvtNot();
+
+  return;
+}
+__weak void HW_IPCC_MAC_802_15_4_CmdEvtNot( void ){};
+__weak void HW_IPCC_MAC_802_15_4_EvtNot( void ){};
+#endif
+
+/******************************************************************************
+ * THREAD
+ ******************************************************************************/
+#ifdef THREAD_WB
+void HW_IPCC_THREAD_Init( void )
+{
+  LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_THREAD_NOTIFICATION_ACK_CHANNEL );
+  LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_THREAD_CLI_NOTIFICATION_ACK_CHANNEL );
+
+  return;
+}
+
+void HW_IPCC_OT_SendCmd( void )
+{
+  LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_THREAD_OT_CMD_RSP_CHANNEL );
+  LL_C1_IPCC_EnableTransmitChannel( IPCC, HW_IPCC_THREAD_OT_CMD_RSP_CHANNEL );
+
+  return;
+}
+
+void HW_IPCC_CLI_SendCmd( void )
+{
+  LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_THREAD_CLI_CMD_CHANNEL );
+
+  return;
+}
+
+void HW_IPCC_THREAD_SendAck( void )
+{
+  LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_THREAD_NOTIFICATION_ACK_CHANNEL );
+  LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_THREAD_NOTIFICATION_ACK_CHANNEL );
+
+  return;
+}
+
+void HW_IPCC_THREAD_CliSendAck( void )
+{
+  LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_THREAD_CLI_NOTIFICATION_ACK_CHANNEL );
+  LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_THREAD_CLI_NOTIFICATION_ACK_CHANNEL );
+
+  return;
+}
+
+static void HW_IPCC_OT_CmdEvtHandler( void )
+{
+  LL_C1_IPCC_DisableTransmitChannel( IPCC, HW_IPCC_THREAD_OT_CMD_RSP_CHANNEL );
+
+  HW_IPCC_OT_CmdEvtNot();
+
+  return;
+}
+
+static void HW_IPCC_THREAD_NotEvtHandler( void )
+{
+  LL_C1_IPCC_DisableReceiveChannel( IPCC, HW_IPCC_THREAD_NOTIFICATION_ACK_CHANNEL );
+
+  HW_IPCC_THREAD_EvtNot();
+
+  return;
+}
+
+static void HW_IPCC_THREAD_CliNotEvtHandler( void )
+{
+  LL_C1_IPCC_DisableReceiveChannel( IPCC, HW_IPCC_THREAD_CLI_NOTIFICATION_ACK_CHANNEL );
+
+  HW_IPCC_THREAD_CliEvtNot();
+
+  return;
+}
+
+__weak void HW_IPCC_OT_CmdEvtNot( void ){};
+__weak void HW_IPCC_CLI_CmdEvtNot( void ){};
+__weak void HW_IPCC_THREAD_EvtNot( void ){};
+
+#endif /* THREAD_WB */
+
+/******************************************************************************
+ * LLD TESTS
+ ******************************************************************************/
+#ifdef LLD_TESTS_WB
+void HW_IPCC_LLDTESTS_Init( void )
+{
+  LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_LLDTESTS_CLI_RSP_CHANNEL );
+  LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_LLDTESTS_M0_CMD_CHANNEL );
+  return;
+}
+
+void HW_IPCC_LLDTESTS_SendCliCmd( void )
+{
+  LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_LLDTESTS_CLI_CMD_CHANNEL );
+  return;
+}
+
+static void HW_IPCC_LLDTESTS_ReceiveCliRspHandler( void )
+{
+  LL_C1_IPCC_DisableReceiveChannel( IPCC, HW_IPCC_LLDTESTS_CLI_RSP_CHANNEL );
+  HW_IPCC_LLDTESTS_ReceiveCliRsp();
+  return;
+}
+
+void HW_IPCC_LLDTESTS_SendCliRspAck( void )
+{
+  LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_LLDTESTS_CLI_RSP_CHANNEL );
+  LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_LLDTESTS_CLI_RSP_CHANNEL );
+  return;
+}
+
+static void HW_IPCC_LLDTESTS_ReceiveM0CmdHandler( void )
+{
+  LL_C1_IPCC_DisableReceiveChannel( IPCC, HW_IPCC_LLDTESTS_M0_CMD_CHANNEL );
+  HW_IPCC_LLDTESTS_ReceiveM0Cmd();
+  return;
+}
+
+void HW_IPCC_LLDTESTS_SendM0CmdAck( void )
+{
+  LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_LLDTESTS_M0_CMD_CHANNEL );
+  LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_LLDTESTS_M0_CMD_CHANNEL );
+  return;
+}
+__weak void HW_IPCC_LLDTESTS_ReceiveCliRsp( void ){};
+__weak void HW_IPCC_LLDTESTS_ReceiveM0Cmd( void ){};
+#endif /* LLD_TESTS_WB */
+
+/******************************************************************************
+ * LLD BLE
+ ******************************************************************************/
+#ifdef LLD_BLE_WB
+void HW_IPCC_LLD_BLE_Init( void )
+{
+  LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_LLD_BLE_RSP_CHANNEL );
+  LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_LLD_BLE_M0_CMD_CHANNEL );
+  return;
+}
+
+void HW_IPCC_LLD_BLE_SendCliCmd( void )
+{
+  LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_LLD_BLE_CLI_CMD_CHANNEL );
+  return;
+}
+
+/*static void HW_IPCC_LLD_BLE_ReceiveCliRspHandler( void )
+{
+  LL_C1_IPCC_DisableReceiveChannel( IPCC, HW_IPCC_LLD_BLE_CLI_RSP_CHANNEL );
+  HW_IPCC_LLD_BLE_ReceiveCliRsp();
+  return;
+}*/
+
+void HW_IPCC_LLD_BLE_SendCliRspAck( void )
+{
+  LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_LLD_BLE_CLI_RSP_CHANNEL );
+  LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_LLD_BLE_CLI_RSP_CHANNEL );
+  return;
+}
+
+static void HW_IPCC_LLD_BLE_ReceiveM0CmdHandler( void )
+{
+  //LL_C1_IPCC_DisableReceiveChannel( IPCC, HW_IPCC_LLD_BLE_M0_CMD_CHANNEL );
+  HW_IPCC_LLD_BLE_ReceiveM0Cmd();
+  return;
+}
+
+void HW_IPCC_LLD_BLE_SendM0CmdAck( void )
+{
+  LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_LLD_BLE_M0_CMD_CHANNEL );
+  //LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_LLD_BLE_M0_CMD_CHANNEL );
+  return;
+}
+__weak void HW_IPCC_LLD_BLE_ReceiveCliRsp( void ){};
+__weak void HW_IPCC_LLD_BLE_ReceiveM0Cmd( void ){};
+
+/* Transparent Mode */
+void HW_IPCC_LLD_BLE_SendCmd( void )
+{
+  LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_LLD_BLE_CMD_CHANNEL );
+  return;
+}
+
+static void HW_IPCC_LLD_BLE_ReceiveRspHandler( void )
+{
+  LL_C1_IPCC_DisableReceiveChannel( IPCC, HW_IPCC_LLD_BLE_RSP_CHANNEL );
+  HW_IPCC_LLD_BLE_ReceiveRsp();
+  return;
+}
+
+void HW_IPCC_LLD_BLE_SendRspAck( void )
+{
+  LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_LLD_BLE_RSP_CHANNEL );
+  LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_LLD_BLE_RSP_CHANNEL );
+  return;
+}
+
+#endif /* LLD_BLE_WB */
+
+/******************************************************************************
+ * ZIGBEE
+ ******************************************************************************/
+#ifdef ZIGBEE_WB
+void HW_IPCC_ZIGBEE_Init( void )
+{
+  LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_ZIGBEE_APPLI_NOTIF_ACK_CHANNEL );
+  LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_ZIGBEE_M0_REQUEST_CHANNEL );
+
+  return;
+}
+
+void HW_IPCC_ZIGBEE_SendM4RequestToM0( void )
+{
+  LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_ZIGBEE_CMD_APPLI_CHANNEL );
+  LL_C1_IPCC_EnableTransmitChannel( IPCC, HW_IPCC_ZIGBEE_CMD_APPLI_CHANNEL );
+
+  return;
+}
+
+void HW_IPCC_ZIGBEE_SendM4AckToM0Notify( void )
+{
+  LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_ZIGBEE_APPLI_NOTIF_ACK_CHANNEL );
+  LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_ZIGBEE_APPLI_NOTIF_ACK_CHANNEL );
+
+  return;
+}
+
+static void HW_IPCC_ZIGBEE_CmdEvtHandler( void )
+{
+  LL_C1_IPCC_DisableTransmitChannel( IPCC, HW_IPCC_ZIGBEE_CMD_APPLI_CHANNEL );
+
+  HW_IPCC_ZIGBEE_RecvAppliAckFromM0();
+
+  return;
+}
+
+static void HW_IPCC_ZIGBEE_StackNotifEvtHandler( void )
+{
+  LL_C1_IPCC_DisableReceiveChannel( IPCC, HW_IPCC_ZIGBEE_APPLI_NOTIF_ACK_CHANNEL );
+
+  HW_IPCC_ZIGBEE_RecvM0NotifyToM4();
+
+  return;
+}
+
+static void HW_IPCC_ZIGBEE_StackM0RequestHandler( void )
+{
+  LL_C1_IPCC_DisableReceiveChannel( IPCC, HW_IPCC_ZIGBEE_M0_REQUEST_CHANNEL );
+
+  HW_IPCC_ZIGBEE_RecvM0RequestToM4();
+
+  return;
+}
+
+void HW_IPCC_ZIGBEE_SendM4AckToM0Request( void )
+{
+  LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_ZIGBEE_M0_REQUEST_CHANNEL );
+  LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_ZIGBEE_M0_REQUEST_CHANNEL );
+
+  return;
+}
+
+__weak void HW_IPCC_ZIGBEE_RecvAppliAckFromM0( void ){};
+__weak void HW_IPCC_ZIGBEE_RecvM0NotifyToM4( void ){};
+__weak void HW_IPCC_ZIGBEE_RecvM0RequestToM4( void ){};
+#endif /* ZIGBEE_WB */
+
+/******************************************************************************
+ * MEMORY MANAGER
+ ******************************************************************************/
+void HW_IPCC_MM_SendFreeBuf( void (*cb)( void ) )
+{
+  if ( LL_C1_IPCC_IsActiveFlag_CHx( IPCC, HW_IPCC_MM_RELEASE_BUFFER_CHANNEL ) )
+  {
+    FreeBufCb = cb;
+    LL_C1_IPCC_EnableTransmitChannel( IPCC, HW_IPCC_MM_RELEASE_BUFFER_CHANNEL );
+  }
+  else
+  {
+    cb();
+
+    LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_MM_RELEASE_BUFFER_CHANNEL );
+  }
+
+  return;
+}
+
+static void HW_IPCC_MM_FreeBufHandler( void )
+{
+  LL_C1_IPCC_DisableTransmitChannel( IPCC, HW_IPCC_MM_RELEASE_BUFFER_CHANNEL );
+
+  FreeBufCb();
+
+  LL_C1_IPCC_SetFlag_CHx( IPCC, HW_IPCC_MM_RELEASE_BUFFER_CHANNEL );
+
+  return;
+}
+
+/******************************************************************************
+ * TRACES
+ ******************************************************************************/
+void HW_IPCC_TRACES_Init( void )
+{
+  LL_C1_IPCC_EnableReceiveChannel( IPCC, HW_IPCC_TRACES_CHANNEL );
+
+  return;
+}
+
+static void HW_IPCC_TRACES_EvtHandler( void )
+{
+  HW_IPCC_TRACES_EvtNot();
+
+  LL_C1_IPCC_ClearFlag_CHx( IPCC, HW_IPCC_TRACES_CHANNEL );
+
+  return;
+}
+
+__weak void HW_IPCC_TRACES_EvtNot( void ){};
+
+/******************* (C) COPYRIGHT 2019 STMicroelectronics *****END OF FILE****/
diff --git a/firmware/targets/f3/ble-glue/hw_timerserver.c b/firmware/targets/f3/ble-glue/hw_timerserver.c
new file mode 100644
index 00000000..e0e4fcb5
--- /dev/null
+++ b/firmware/targets/f3/ble-glue/hw_timerserver.c
@@ -0,0 +1,893 @@
+/**
+ ******************************************************************************
+  * File Name          : hw_timerserver.c
+  * Description        : Hardware timerserver source file for STM32WPAN Middleware.
+  *
+ ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "app_common.h"
+#include "hw_conf.h"
+
+/* Private typedef -----------------------------------------------------------*/
+typedef enum
+{
+  TimerID_Free,
+  TimerID_Created,
+  TimerID_Running
+}TimerIDStatus_t;
+
+typedef enum
+{
+  SSR_Read_Requested,
+  SSR_Read_Not_Requested
+}RequestReadSSR_t;
+
+typedef enum
+{
+  WakeupTimerValue_Overpassed,
+  WakeupTimerValue_LargeEnough
+}WakeupTimerLimitation_Status_t;
+
+typedef struct
+{
+  HW_TS_pTimerCb_t  pTimerCallBack;
+  uint32_t        CounterInit;
+  uint32_t        CountLeft;
+  TimerIDStatus_t     TimerIDStatus;
+  HW_TS_Mode_t   TimerMode;
+  uint32_t        TimerProcessID;
+  uint8_t         PreviousID;
+  uint8_t         NextID;
+}TimerContext_t;
+
+/* Private defines -----------------------------------------------------------*/
+#define SSR_FORBIDDEN_VALUE   0xFFFFFFFF
+#define TIMER_LIST_EMPTY      0xFFFF
+
+/* Private macros ------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+
+/**
+ * START of Section TIMERSERVER_CONTEXT
+ */
+
+PLACE_IN_SECTION("TIMERSERVER_CONTEXT") static volatile TimerContext_t aTimerContext[CFG_HW_TS_MAX_NBR_CONCURRENT_TIMER];
+PLACE_IN_SECTION("TIMERSERVER_CONTEXT") static volatile uint8_t CurrentRunningTimerID;
+PLACE_IN_SECTION("TIMERSERVER_CONTEXT") static volatile uint8_t PreviousRunningTimerID;
+PLACE_IN_SECTION("TIMERSERVER_CONTEXT") static volatile uint32_t SSRValueOnLastSetup;
+PLACE_IN_SECTION("TIMERSERVER_CONTEXT") static volatile WakeupTimerLimitation_Status_t  WakeupTimerLimitation;
+
+/**
+ * END of Section TIMERSERVER_CONTEXT
+ */
+
+static RTC_HandleTypeDef *phrtc;  /**< RTC handle */
+static uint8_t  WakeupTimerDivider;
+static uint8_t  AsynchPrescalerUserConfig;
+static uint16_t SynchPrescalerUserConfig;
+static volatile uint16_t MaxWakeupTimerSetup;
+
+/* Global variables ----------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+static void RestartWakeupCounter(uint16_t Value);
+static uint16_t ReturnTimeElapsed(void);
+static void RescheduleTimerList(void);
+static void UnlinkTimer(uint8_t TimerID, RequestReadSSR_t RequestReadSSR);
+static void LinkTimerBefore(uint8_t TimerID, uint8_t RefTimerID);
+static void LinkTimerAfter(uint8_t TimerID, uint8_t RefTimerID);
+static uint16_t linkTimer(uint8_t TimerID);
+static uint32_t ReadRtcSsrValue(void);
+
+__weak void HW_TS_RTC_CountUpdated_AppNot(void);
+
+/* Functions Definition ------------------------------------------------------*/
+
+/**
+ * @brief  Read the RTC_SSR value
+ *         As described in the reference manual, the RTC_SSR shall be read twice to ensure
+ *         reliability of the value
+ * @param  None
+ * @retval SSR value read
+ */
+static uint32_t ReadRtcSsrValue(void)
+{
+  uint32_t first_read;
+  uint32_t second_read;
+
+  first_read = (uint32_t)(READ_BIT(RTC->SSR, RTC_SSR_SS));
+
+  second_read = (uint32_t)(READ_BIT(RTC->SSR, RTC_SSR_SS));
+
+  while(first_read != second_read)
+  {
+    first_read = second_read;
+
+    second_read = (uint32_t)(READ_BIT(RTC->SSR, RTC_SSR_SS));
+  }
+
+  return second_read;
+}
+
+/**
+ * @brief  Insert a Timer in the list after the Timer ID specified
+ * @param  TimerID:   The ID of the Timer
+ * @param  RefTimerID: The ID of the Timer to be linked after
+ * @retval None
+ */
+static void LinkTimerAfter(uint8_t TimerID, uint8_t RefTimerID)
+{
+  uint8_t next_id;
+
+  next_id = aTimerContext[RefTimerID].NextID;
+
+  if(next_id != CFG_HW_TS_MAX_NBR_CONCURRENT_TIMER)
+  {
+    aTimerContext[next_id].PreviousID = TimerID;
+  }
+  aTimerContext[TimerID].NextID = next_id;
+  aTimerContext[TimerID].PreviousID = RefTimerID ;
+  aTimerContext[RefTimerID].NextID = TimerID;
+
+  return;
+}
+
+/**
+ * @brief  Insert a Timer in the list before the ID specified
+ * @param  TimerID:   The ID of the Timer
+ * @param  RefTimerID: The ID of the Timer to be linked before
+ * @retval None
+ */
+static void LinkTimerBefore(uint8_t TimerID, uint8_t RefTimerID)
+{
+  uint8_t previous_id;
+
+  if(RefTimerID != CurrentRunningTimerID)
+  {
+    previous_id = aTimerContext[RefTimerID].PreviousID;
+
+    aTimerContext[previous_id].NextID = TimerID;
+    aTimerContext[TimerID].NextID = RefTimerID;
+    aTimerContext[TimerID].PreviousID = previous_id ;
+    aTimerContext[RefTimerID].PreviousID = TimerID;
+  }
+  else
+  {
+    aTimerContext[TimerID].NextID = RefTimerID;
+    aTimerContext[RefTimerID].PreviousID = TimerID;
+  }
+
+  return;
+}
+
+/**
+ * @brief  Insert a Timer in the list
+ * @param  TimerID:   The ID of the Timer
+ * @retval None
+ */
+static uint16_t linkTimer(uint8_t TimerID)
+{
+  uint32_t time_left;
+  uint16_t time_elapsed;
+  uint8_t timer_id_lookup;
+  uint8_t next_id;
+
+  if(CurrentRunningTimerID == CFG_HW_TS_MAX_NBR_CONCURRENT_TIMER)
+  {
+    /**
+     * No timer in the list
+     */
+    PreviousRunningTimerID = CurrentRunningTimerID;
+    CurrentRunningTimerID = TimerID;
+    aTimerContext[TimerID].NextID = CFG_HW_TS_MAX_NBR_CONCURRENT_TIMER;
+
+    SSRValueOnLastSetup = SSR_FORBIDDEN_VALUE;
+    time_elapsed = 0;
+  }
+  else
+  {
+    time_elapsed = ReturnTimeElapsed();
+
+    /**
+     * update count of the timer to be linked
+     */
+    aTimerContext[TimerID].CountLeft += time_elapsed;
+    time_left = aTimerContext[TimerID].CountLeft;
+
+    /**
+     * Search for index where the new timer shall be linked
+     */
+    if(aTimerContext[CurrentRunningTimerID].CountLeft <= time_left)
+    {
+      /**
+       * Search for the ID after the first one
+       */
+      timer_id_lookup = CurrentRunningTimerID;
+      next_id = aTimerContext[timer_id_lookup].NextID;
+      while((next_id != CFG_HW_TS_MAX_NBR_CONCURRENT_TIMER) && (aTimerContext[next_id].CountLeft <= time_left))
+      {
+        timer_id_lookup = aTimerContext[timer_id_lookup].NextID;
+        next_id = aTimerContext[timer_id_lookup].NextID;
+      }
+
+      /**
+       * Link after the ID
+       */
+      LinkTimerAfter(TimerID, timer_id_lookup);
+    }
+    else
+    {
+      /**
+       * Link before the first ID
+       */
+      LinkTimerBefore(TimerID, CurrentRunningTimerID);
+      PreviousRunningTimerID = CurrentRunningTimerID;
+      CurrentRunningTimerID = TimerID;
+    }
+  }
+
+  return time_elapsed;
+}
+
+/**
+ * @brief  Remove a Timer from the list
+ * @param  TimerID:   The ID of the Timer
+ * @param  RequestReadSSR: Request to read the SSR register or not
+ * @retval None
+ */
+static void UnlinkTimer(uint8_t TimerID, RequestReadSSR_t RequestReadSSR)
+{
+  uint8_t previous_id;
+  uint8_t next_id;
+
+  if(TimerID == CurrentRunningTimerID)
+  {
+    PreviousRunningTimerID = CurrentRunningTimerID;
+    CurrentRunningTimerID = aTimerContext[TimerID].NextID;
+  }
+  else
+  {
+    previous_id = aTimerContext[TimerID].PreviousID;
+    next_id = aTimerContext[TimerID].NextID;
+
+    aTimerContext[previous_id].NextID = aTimerContext[TimerID].NextID;
+    if(next_id != CFG_HW_TS_MAX_NBR_CONCURRENT_TIMER)
+    {
+      aTimerContext[next_id].PreviousID = aTimerContext[TimerID].PreviousID;
+    }
+  }
+
+  /**
+   * Timer is out of the list
+   */
+  aTimerContext[TimerID].TimerIDStatus = TimerID_Created;
+
+  if((CurrentRunningTimerID == CFG_HW_TS_MAX_NBR_CONCURRENT_TIMER) && (RequestReadSSR == SSR_Read_Requested))
+  {
+    SSRValueOnLastSetup = SSR_FORBIDDEN_VALUE;
+  }
+
+  return;
+}
+
+/**
+ * @brief  Return the number of ticks counted by the wakeuptimer since it has been started
+ * @note  The API is reading the SSR register to get how many ticks have been counted
+ *        since the time the timer has been started
+ * @param  None
+ * @retval Time expired in Ticks
+ */
+static uint16_t ReturnTimeElapsed(void)
+{
+  uint32_t  return_value;
+  uint32_t  wrap_counter;
+
+  if(SSRValueOnLastSetup != SSR_FORBIDDEN_VALUE)
+  {
+    return_value = ReadRtcSsrValue(); /**< Read SSR register first */
+
+    if (SSRValueOnLastSetup >= return_value)
+    {
+      return_value = SSRValueOnLastSetup - return_value;
+    }
+    else
+    {
+      wrap_counter = SynchPrescalerUserConfig - return_value;
+      return_value = SSRValueOnLastSetup + wrap_counter;
+    }
+
+    /**
+     * At this stage, ReturnValue holds the number of ticks counted by SSR
+     * Need to translate in number of ticks counted by the Wakeuptimer
+     */
+    return_value = return_value*AsynchPrescalerUserConfig;
+    return_value = return_value >> WakeupTimerDivider;
+  }
+  else
+  {
+    return_value = 0;
+  }
+
+  return (uint16_t)return_value;
+}
+
+/**
+ * @brief  Set the wakeup counter
+ * @note  The API is writing the counter value so that the value is decreased by one to cope with the fact
+ *    the interrupt is generated with 1 extra clock cycle (See RefManuel)
+ *    It assumes all condition are met to be allowed to write the wakeup counter
+ * @param  Value: Value to be written in the counter
+ * @retval None
+ */
+static void RestartWakeupCounter(uint16_t Value)
+{
+  /**
+   * The wakeuptimer has been disabled in the calling function to reduce the time to poll the WUTWF
+   * FLAG when the new value will have to be written
+   *  __HAL_RTC_WAKEUPTIMER_DISABLE(phrtc);
+   */
+
+  if(Value == 0)
+  {
+    SSRValueOnLastSetup = ReadRtcSsrValue();
+
+    /**
+     * Simulate that the Timer expired
+     */
+    HAL_NVIC_SetPendingIRQ(CFG_HW_TS_RTC_WAKEUP_HANDLER_ID);
+  }
+  else
+  {
+    if((Value > 1) ||(WakeupTimerDivider != 1))
+    {
+      Value -= 1;
+    }
+
+    while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(phrtc, RTC_FLAG_WUTWF) == RESET);
+
+    /**
+     * make sure to clear the flags after checking the WUTWF.
+     * It takes 2 RTCCLK between the time the WUTE bit is disabled and the
+     * time the timer is disabled. The WUTWF bit somehow guarantee the system is stable
+     * Otherwise, when the timer is periodic with 1 Tick, it may generate an extra interrupt in between
+     * due to the autoreload feature
+     */
+    __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(phrtc, RTC_FLAG_WUTF);   /**<  Clear flag in RTC module */
+    __HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_FLAG(); /**<  Clear flag in EXTI module */
+    HAL_NVIC_ClearPendingIRQ(CFG_HW_TS_RTC_WAKEUP_HANDLER_ID);   /**<  Clear pending bit in NVIC */
+
+    MODIFY_REG(RTC->WUTR, RTC_WUTR_WUT, Value);
+
+    /**
+     * Update the value here after the WUTWF polling that may take some time
+     */
+    SSRValueOnLastSetup = ReadRtcSsrValue();
+
+    __HAL_RTC_WAKEUPTIMER_ENABLE(phrtc);    /**<  Enable the Wakeup Timer */
+
+    HW_TS_RTC_CountUpdated_AppNot();
+  }
+
+  return ;
+}
+
+/**
+ * @brief  Reschedule the list of timer
+ * @note  1) Update the count left for each timer in the list
+ *    2) Setup the wakeuptimer
+ * @param  None
+ * @retval None
+ */
+static void RescheduleTimerList(void)
+{
+  uint8_t   localTimerID;
+  uint32_t  timecountleft;
+  uint16_t  wakeup_timer_value;
+  uint16_t  time_elapsed;
+
+  /**
+   * The wakeuptimer is disabled now to reduce the time to poll the WUTWF
+   * FLAG when the new value will have to be written
+   */
+  if((READ_BIT(RTC->CR, RTC_CR_WUTE) == (RTC_CR_WUTE)) == SET)
+  {
+    /**
+     * Wait for the flag to be back to 0 when the wakeup timer is enabled
+     */
+    while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(phrtc, RTC_FLAG_WUTWF) == SET);
+  }
+  __HAL_RTC_WAKEUPTIMER_DISABLE(phrtc);   /**<  Disable the Wakeup Timer */
+
+  localTimerID = CurrentRunningTimerID;
+
+  /**
+   * Calculate what will be the value to write in the wakeuptimer
+   */
+  timecountleft = aTimerContext[localTimerID].CountLeft;
+
+  /**
+   * Read how much has been counted
+   */
+  time_elapsed = ReturnTimeElapsed();
+
+  if(timecountleft < time_elapsed )
+  {
+    /**
+     * There is no tick left to count
+     */
+    wakeup_timer_value = 0;
+    WakeupTimerLimitation = WakeupTimerValue_LargeEnough;
+  }
+  else
+  {
+    if(timecountleft > (time_elapsed + MaxWakeupTimerSetup))
+    {
+      /**
+       * The number of tick left is greater than the Wakeuptimer maximum value
+       */
+      wakeup_timer_value = MaxWakeupTimerSetup;
+
+      WakeupTimerLimitation = WakeupTimerValue_Overpassed;
+    }
+    else
+    {
+      wakeup_timer_value = timecountleft - time_elapsed;
+      WakeupTimerLimitation = WakeupTimerValue_LargeEnough;
+    }
+
+  }
+
+  /**
+   * update ticks left to be counted for each timer
+   */
+  while(localTimerID != CFG_HW_TS_MAX_NBR_CONCURRENT_TIMER)
+  {
+    if (aTimerContext[localTimerID].CountLeft < time_elapsed)
+    {
+      aTimerContext[localTimerID].CountLeft = 0;
+    }
+    else
+    {
+      aTimerContext[localTimerID].CountLeft -= time_elapsed;
+    }
+    localTimerID = aTimerContext[localTimerID].NextID;
+  }
+
+  /**
+   * Write next count
+   */
+  RestartWakeupCounter(wakeup_timer_value);
+
+  return ;
+}
+
+/* Public functions ----------------------------------------------------------*/
+
+/**
+ * For all public interface except that may need write access to the RTC, the RTC
+ * shall be unlock at the beginning and locked at the output
+ * In order to ease maintainability, the unlock is done at the top and the lock at then end
+ * in case some new implementation is coming in the future
+ */
+
+void HW_TS_RTC_Wakeup_Handler(void)
+{
+  HW_TS_pTimerCb_t ptimer_callback;
+  uint32_t timer_process_id;
+  uint8_t local_current_running_timer_id;
+#if (CFG_HW_TS_USE_PRIMASK_AS_CRITICAL_SECTION == 1)
+  uint32_t primask_bit;
+#endif
+
+#if (CFG_HW_TS_USE_PRIMASK_AS_CRITICAL_SECTION == 1)
+  primask_bit = __get_PRIMASK();  /**< backup PRIMASK bit */
+  __disable_irq();          /**< Disable all interrupts by setting PRIMASK bit on Cortex*/
+#endif
+
+/* Disable the write protection for RTC registers */
+  __HAL_RTC_WRITEPROTECTION_DISABLE( phrtc );
+
+  /**
+   * Disable the Wakeup Timer
+   * This may speed up a bit the processing to wait the timer to be disabled
+   * The timer is still counting 2 RTCCLK
+   */
+  __HAL_RTC_WAKEUPTIMER_DISABLE(phrtc);
+
+  local_current_running_timer_id = CurrentRunningTimerID;
+
+  if(aTimerContext[local_current_running_timer_id].TimerIDStatus == TimerID_Running)
+  {
+    ptimer_callback = aTimerContext[local_current_running_timer_id].pTimerCallBack;
+    timer_process_id = aTimerContext[local_current_running_timer_id].TimerProcessID;
+
+    /**
+     * It should be good to check whether the TimeElapsed is greater or not than the tick left to be counted
+     * However, due to the inaccuracy of the reading of the time elapsed, it may return there is 1 tick
+     * to be left whereas the count is over
+     * A more secure implementation has been done with a flag to state whereas the full count has been written
+     * in the wakeuptimer or not
+     */
+    if(WakeupTimerLimitation != WakeupTimerValue_Overpassed)
+    {
+      if(aTimerContext[local_current_running_timer_id].TimerMode == hw_ts_Repeated)
+      {
+        UnlinkTimer(local_current_running_timer_id, SSR_Read_Not_Requested);
+#if (CFG_HW_TS_USE_PRIMASK_AS_CRITICAL_SECTION == 1)
+        __set_PRIMASK(primask_bit); /**< Restore PRIMASK bit*/
+#endif
+        HW_TS_Start(local_current_running_timer_id, aTimerContext[local_current_running_timer_id].CounterInit);
+
+        /* Disable the write protection for RTC registers */
+        __HAL_RTC_WRITEPROTECTION_DISABLE( phrtc );
+        }
+      else
+      {
+#if (CFG_HW_TS_USE_PRIMASK_AS_CRITICAL_SECTION == 1)
+        __set_PRIMASK(primask_bit); /**< Restore PRIMASK bit*/
+#endif
+        HW_TS_Stop(local_current_running_timer_id);
+
+        /* Disable the write protection for RTC registers */
+        __HAL_RTC_WRITEPROTECTION_DISABLE( phrtc );
+        }
+
+      HW_TS_RTC_Int_AppNot(timer_process_id, local_current_running_timer_id, ptimer_callback);
+    }
+    else
+    {
+      RescheduleTimerList();
+#if (CFG_HW_TS_USE_PRIMASK_AS_CRITICAL_SECTION == 1)
+      __set_PRIMASK(primask_bit); /**< Restore PRIMASK bit*/
+#endif
+    }
+  }
+  else
+  {
+    /**
+     * We should never end up in this case
+     * However, if due to any bug in the timer server this is the case, the mistake may not impact the user.
+     * We could just clean the interrupt flag and get out from this unexpected interrupt
+     */
+    while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(phrtc, RTC_FLAG_WUTWF) == RESET);
+
+    /**
+     * make sure to clear the flags after checking the WUTWF.
+     * It takes 2 RTCCLK between the time the WUTE bit is disabled and the
+     * time the timer is disabled. The WUTWF bit somehow guarantee the system is stable
+     * Otherwise, when the timer is periodic with 1 Tick, it may generate an extra interrupt in between
+     * due to the autoreload feature
+     */
+    __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(phrtc, RTC_FLAG_WUTF);   /**<  Clear flag in RTC module */
+    __HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_FLAG(); /**<  Clear flag in EXTI module */
+
+#if (CFG_HW_TS_USE_PRIMASK_AS_CRITICAL_SECTION == 1)
+    __set_PRIMASK(primask_bit); /**< Restore PRIMASK bit*/
+#endif
+  }
+
+  /* Enable the write protection for RTC registers */
+  __HAL_RTC_WRITEPROTECTION_ENABLE( phrtc );
+
+  return;
+}
+
+void HW_TS_Init(HW_TS_InitMode_t TimerInitMode, RTC_HandleTypeDef *hrtc)
+{
+  uint8_t loop;
+  uint32_t localmaxwakeuptimersetup;
+
+  /**
+   * Get RTC handler
+   */
+  phrtc = hrtc;
+
+ /* Disable the write protection for RTC registers */
+  __HAL_RTC_WRITEPROTECTION_DISABLE( phrtc );
+
+  SET_BIT(RTC->CR, RTC_CR_BYPSHAD);
+
+  /**
+   * Readout the user config
+   */
+  WakeupTimerDivider = (4 - ((uint32_t)(READ_BIT(RTC->CR, RTC_CR_WUCKSEL))));
+
+  AsynchPrescalerUserConfig = (uint8_t)(READ_BIT(RTC->PRER, RTC_PRER_PREDIV_A) >> (uint32_t)POSITION_VAL(RTC_PRER_PREDIV_A)) + 1;
+
+  SynchPrescalerUserConfig = (uint16_t)(READ_BIT(RTC->PRER, RTC_PRER_PREDIV_S)) + 1;
+
+  /**
+   *  Margin is taken to avoid wrong calculation when the wrap around is there and some
+   *  application interrupts may have delayed the reading
+   */
+  localmaxwakeuptimersetup = ((((SynchPrescalerUserConfig - 1)*AsynchPrescalerUserConfig) - CFG_HW_TS_RTC_HANDLER_MAX_DELAY) >> WakeupTimerDivider);
+
+  if(localmaxwakeuptimersetup >= 0xFFFF)
+  {
+    MaxWakeupTimerSetup = 0xFFFF;
+  }
+  else
+  {
+    MaxWakeupTimerSetup = (uint16_t)localmaxwakeuptimersetup;
+  }
+
+  /**
+   * Configure EXTI module
+   */
+  LL_EXTI_EnableRisingTrig_0_31(RTC_EXTI_LINE_WAKEUPTIMER_EVENT);
+  LL_EXTI_EnableIT_0_31(RTC_EXTI_LINE_WAKEUPTIMER_EVENT);
+
+  if(TimerInitMode == hw_ts_InitMode_Full)
+  {
+    WakeupTimerLimitation = WakeupTimerValue_LargeEnough;
+    SSRValueOnLastSetup = SSR_FORBIDDEN_VALUE;
+
+    /**
+     * Initialize the timer server
+     */
+    for(loop = 0; loop < CFG_HW_TS_MAX_NBR_CONCURRENT_TIMER; loop++)
+    {
+      aTimerContext[loop].TimerIDStatus = TimerID_Free;
+    }
+
+    CurrentRunningTimerID = CFG_HW_TS_MAX_NBR_CONCURRENT_TIMER;   /**<  Set ID to non valid value */
+
+    __HAL_RTC_WAKEUPTIMER_DISABLE(phrtc);                       /**<  Disable the Wakeup Timer */
+    __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(phrtc, RTC_FLAG_WUTF);     /**<  Clear flag in RTC module */
+    __HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_FLAG(); /**<  Clear flag in EXTI module  */
+    HAL_NVIC_ClearPendingIRQ(CFG_HW_TS_RTC_WAKEUP_HANDLER_ID);       /**<  Clear pending bit in NVIC  */
+    __HAL_RTC_WAKEUPTIMER_ENABLE_IT(phrtc, RTC_IT_WUT);         /**<  Enable interrupt in RTC module  */
+  }
+  else
+  {
+    if(__HAL_RTC_WAKEUPTIMER_GET_FLAG(phrtc, RTC_FLAG_WUTF) != RESET)
+    {
+      /**
+       * Simulate that the Timer expired
+       */
+      HAL_NVIC_SetPendingIRQ(CFG_HW_TS_RTC_WAKEUP_HANDLER_ID);
+    }
+  }
+
+  /* Enable the write protection for RTC registers */
+  __HAL_RTC_WRITEPROTECTION_ENABLE( phrtc );
+
+  HAL_NVIC_SetPriority(CFG_HW_TS_RTC_WAKEUP_HANDLER_ID, CFG_HW_TS_NVIC_RTC_WAKEUP_IT_PREEMPTPRIO, CFG_HW_TS_NVIC_RTC_WAKEUP_IT_SUBPRIO);   /**<  Set NVIC priority */
+  HAL_NVIC_EnableIRQ(CFG_HW_TS_RTC_WAKEUP_HANDLER_ID); /**<  Enable NVIC */
+
+  return;
+}
+
+HW_TS_ReturnStatus_t HW_TS_Create(uint32_t TimerProcessID, uint8_t *pTimerId, HW_TS_Mode_t TimerMode, HW_TS_pTimerCb_t pftimeout_handler)
+{
+  HW_TS_ReturnStatus_t localreturnstatus;
+  uint8_t loop = 0;
+#if (CFG_HW_TS_USE_PRIMASK_AS_CRITICAL_SECTION == 1)
+  uint32_t primask_bit;
+#endif
+
+#if (CFG_HW_TS_USE_PRIMASK_AS_CRITICAL_SECTION == 1)
+  primask_bit = __get_PRIMASK();  /**< backup PRIMASK bit */
+  __disable_irq();          /**< Disable all interrupts by setting PRIMASK bit on Cortex*/
+#endif
+
+  while((loop < CFG_HW_TS_MAX_NBR_CONCURRENT_TIMER) && (aTimerContext[loop].TimerIDStatus != TimerID_Free))
+  {
+    loop++;
+  }
+
+  if(loop != CFG_HW_TS_MAX_NBR_CONCURRENT_TIMER)
+  {
+    aTimerContext[loop].TimerIDStatus = TimerID_Created;
+
+#if (CFG_HW_TS_USE_PRIMASK_AS_CRITICAL_SECTION == 1)
+    __set_PRIMASK(primask_bit); /**< Restore PRIMASK bit*/
+#endif
+
+    aTimerContext[loop].TimerProcessID = TimerProcessID;
+    aTimerContext[loop].TimerMode = TimerMode;
+    aTimerContext[loop].pTimerCallBack = pftimeout_handler;
+    *pTimerId = loop;
+
+    localreturnstatus = hw_ts_Successful;
+  }
+  else
+  {
+#if (CFG_HW_TS_USE_PRIMASK_AS_CRITICAL_SECTION == 1)
+    __set_PRIMASK(primask_bit); /**< Restore PRIMASK bit*/
+#endif
+
+    localreturnstatus = hw_ts_Failed;
+  }
+
+  return(localreturnstatus);
+}
+
+void HW_TS_Delete(uint8_t timer_id)
+{
+  HW_TS_Stop(timer_id);
+
+  aTimerContext[timer_id].TimerIDStatus = TimerID_Free; /**<  release ID */
+
+  return;
+}
+
+void HW_TS_Stop(uint8_t timer_id)
+{
+  uint8_t localcurrentrunningtimerid;
+
+#if (CFG_HW_TS_USE_PRIMASK_AS_CRITICAL_SECTION == 1)
+  uint32_t primask_bit;
+#endif
+
+#if (CFG_HW_TS_USE_PRIMASK_AS_CRITICAL_SECTION == 1)
+  primask_bit = __get_PRIMASK();  /**< backup PRIMASK bit */
+  __disable_irq();          /**< Disable all interrupts by setting PRIMASK bit on Cortex*/
+#endif
+
+  HAL_NVIC_DisableIRQ(CFG_HW_TS_RTC_WAKEUP_HANDLER_ID);    /**<  Disable NVIC */
+
+  /* Disable the write protection for RTC registers */
+  __HAL_RTC_WRITEPROTECTION_DISABLE( phrtc );
+
+  if(aTimerContext[timer_id].TimerIDStatus == TimerID_Running)
+  {
+    UnlinkTimer(timer_id, SSR_Read_Requested);
+    localcurrentrunningtimerid = CurrentRunningTimerID;
+
+    if(localcurrentrunningtimerid == CFG_HW_TS_MAX_NBR_CONCURRENT_TIMER)
+    {
+      /**
+       * List is empty
+       */
+
+      /**
+       * Disable the timer
+       */
+      if((READ_BIT(RTC->CR, RTC_CR_WUTE) == (RTC_CR_WUTE)) == SET)
+      {
+        /**
+         * Wait for the flag to be back to 0 when the wakeup timer is enabled
+         */
+        while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(phrtc, RTC_FLAG_WUTWF) == SET);
+      }
+      __HAL_RTC_WAKEUPTIMER_DISABLE(phrtc);   /**<  Disable the Wakeup Timer */
+
+      while(__HAL_RTC_WAKEUPTIMER_GET_FLAG(phrtc, RTC_FLAG_WUTWF) == RESET);
+
+      /**
+       * make sure to clear the flags after checking the WUTWF.
+       * It takes 2 RTCCLK between the time the WUTE bit is disabled and the
+       * time the timer is disabled. The WUTWF bit somehow guarantee the system is stable
+       * Otherwise, when the timer is periodic with 1 Tick, it may generate an extra interrupt in between
+       * due to the autoreload feature
+       */
+      __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(phrtc, RTC_FLAG_WUTF);   /**<  Clear flag in RTC module */
+      __HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_FLAG(); /**<  Clear flag in EXTI module */
+      HAL_NVIC_ClearPendingIRQ(CFG_HW_TS_RTC_WAKEUP_HANDLER_ID);   /**<  Clear pending bit in NVIC */
+    }
+    else if(PreviousRunningTimerID != localcurrentrunningtimerid)
+    {
+      RescheduleTimerList();
+    }
+  }
+
+  /* Enable the write protection for RTC registers */
+  __HAL_RTC_WRITEPROTECTION_ENABLE( phrtc );
+
+  HAL_NVIC_EnableIRQ(CFG_HW_TS_RTC_WAKEUP_HANDLER_ID); /**<  Enable NVIC */
+
+#if (CFG_HW_TS_USE_PRIMASK_AS_CRITICAL_SECTION == 1)
+  __set_PRIMASK(primask_bit); /**< Restore PRIMASK bit*/
+#endif
+
+  return;
+}
+
+void HW_TS_Start(uint8_t timer_id, uint32_t timeout_ticks)
+{
+  uint16_t time_elapsed;
+  uint8_t localcurrentrunningtimerid;
+
+#if (CFG_HW_TS_USE_PRIMASK_AS_CRITICAL_SECTION == 1)
+  uint32_t primask_bit;
+#endif
+
+  if(aTimerContext[timer_id].TimerIDStatus == TimerID_Running)
+  {
+    HW_TS_Stop( timer_id );
+  }
+
+#if (CFG_HW_TS_USE_PRIMASK_AS_CRITICAL_SECTION == 1)
+  primask_bit = __get_PRIMASK();  /**< backup PRIMASK bit */
+  __disable_irq();          /**< Disable all interrupts by setting PRIMASK bit on Cortex*/
+#endif
+
+  HAL_NVIC_DisableIRQ(CFG_HW_TS_RTC_WAKEUP_HANDLER_ID);    /**<  Disable NVIC */
+
+  /* Disable the write protection for RTC registers */
+  __HAL_RTC_WRITEPROTECTION_DISABLE( phrtc );
+
+  aTimerContext[timer_id].TimerIDStatus = TimerID_Running;
+
+  aTimerContext[timer_id].CountLeft = timeout_ticks;
+  aTimerContext[timer_id].CounterInit = timeout_ticks;
+
+  time_elapsed =  linkTimer(timer_id);
+
+  localcurrentrunningtimerid = CurrentRunningTimerID;
+
+  if(PreviousRunningTimerID != localcurrentrunningtimerid)
+  {
+    RescheduleTimerList();
+  }
+  else
+  {
+    aTimerContext[timer_id].CountLeft -= time_elapsed;
+  }
+
+  /* Enable the write protection for RTC registers */
+  __HAL_RTC_WRITEPROTECTION_ENABLE( phrtc );
+
+  HAL_NVIC_EnableIRQ(CFG_HW_TS_RTC_WAKEUP_HANDLER_ID); /**<  Enable NVIC */
+
+#if (CFG_HW_TS_USE_PRIMASK_AS_CRITICAL_SECTION == 1)
+  __set_PRIMASK(primask_bit); /**< Restore PRIMASK bit*/
+#endif
+
+  return;
+}
+
+uint16_t HW_TS_RTC_ReadLeftTicksToCount(void)
+{
+  uint32_t primask_bit;
+  uint16_t return_value, auro_reload_value, elapsed_time_value;
+
+  primask_bit = __get_PRIMASK();  /**< backup PRIMASK bit */
+  __disable_irq();                /**< Disable all interrupts by setting PRIMASK bit on Cortex*/
+
+  if((READ_BIT(RTC->CR, RTC_CR_WUTE) == (RTC_CR_WUTE)) == SET)
+  {
+    auro_reload_value = (uint32_t)(READ_BIT(RTC->WUTR, RTC_WUTR_WUT));
+
+    elapsed_time_value = ReturnTimeElapsed();
+
+    if(auro_reload_value > elapsed_time_value)
+    {
+      return_value = auro_reload_value - elapsed_time_value;
+    }
+    else
+    {
+      return_value = 0;
+    }
+  }
+  else
+  {
+    return_value = TIMER_LIST_EMPTY;
+  }
+
+  __set_PRIMASK(primask_bit);     /**< Restore PRIMASK bit*/
+
+  return (return_value);
+}
+
+__weak void HW_TS_RTC_Int_AppNot(uint32_t TimerProcessID, uint8_t TimerID, HW_TS_pTimerCb_t pTimerCallBack)
+{
+  pTimerCallBack();
+
+  return;
+}
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/firmware/targets/f3/ble-glue/tl_dbg_conf.h b/firmware/targets/f3/ble-glue/tl_dbg_conf.h
new file mode 100644
index 00000000..bc4bf4d6
--- /dev/null
+++ b/firmware/targets/f3/ble-glue/tl_dbg_conf.h
@@ -0,0 +1,138 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+  * File Name          : App/tl_dbg_conf.h
+  * Description        : Debug configuration file for stm32wpan transport layer interface.
+  *
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __TL_DBG_CONF_H
+#define __TL_DBG_CONF_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* USER CODE BEGIN Tl_Conf */
+
+/* Includes ------------------------------------------------------------------*/
+#include "app_conf.h"   /* required as some configuration used in dbg_trace.h are set there */
+#include "dbg_trace.h"
+#include "hw_if.h"
+
+extern UART_HandleTypeDef DEBUG_UART;
+
+/**
+ * Enable or Disable traces
+ * The raw data output is the hci binary packet format as specified by the BT specification *
+ */
+#define TL_SHCI_CMD_DBG_EN      1   /* Reports System commands sent to CPU2 and the command response */
+#define TL_SHCI_CMD_DBG_RAW_EN  1   /* Reports raw data System commands sent to CPU2 and the command response */
+#define TL_SHCI_EVT_DBG_EN      1   /* Reports System Asynchronous Events received from CPU2 */
+#define TL_SHCI_EVT_DBG_RAW_EN  1   /* Reports raw data System Asynchronous Events received from CPU2 */
+
+#define TL_HCI_CMD_DBG_EN       1   /* Reports BLE command sent to CPU2 and the command response */
+#define TL_HCI_CMD_DBG_RAW_EN   1   /* Reports raw data BLE command sent to CPU2 and the command response */
+#define TL_HCI_EVT_DBG_EN       1   /* Reports BLE Asynchronous Events received from CPU2 */
+#define TL_HCI_EVT_DBG_RAW_EN   1   /* Reports raw data BLE Asynchronous Events received from CPU2 */
+
+#define TL_MM_DBG_EN            1   /* Reports the informations of the buffer released to CPU2 */
+
+/**
+ * Macro definition
+ */
+
+/**
+ * System Transport Layer
+ */
+#if (TL_SHCI_CMD_DBG_EN != 0)
+#define TL_SHCI_CMD_DBG_MSG             PRINT_MESG_DBG
+#define TL_SHCI_CMD_DBG_BUF             PRINT_LOG_BUFF_DBG
+#else
+#define TL_SHCI_CMD_DBG_MSG(...)
+#define TL_SHCI_CMD_DBG_BUF(...)
+#endif
+
+#if (TL_SHCI_CMD_DBG_RAW_EN != 0)
+#define TL_SHCI_CMD_DBG_RAW(_PDATA_, _SIZE_)  HAL_UART_Transmit(&DEBUG_UART, (uint8_t*)_PDATA_, _SIZE_, (~0))
+#else
+#define TL_SHCI_CMD_DBG_RAW(...)
+#endif
+
+#if (TL_SHCI_EVT_DBG_EN != 0)
+#define TL_SHCI_EVT_DBG_MSG             PRINT_MESG_DBG
+#define TL_SHCI_EVT_DBG_BUF             PRINT_LOG_BUFF_DBG
+#else
+#define TL_SHCI_EVT_DBG_MSG(...)
+#define TL_SHCI_EVT_DBG_BUF(...)
+#endif
+
+#if (TL_SHCI_EVT_DBG_RAW_EN != 0)
+#define TL_SHCI_EVT_DBG_RAW(_PDATA_, _SIZE_)  HAL_UART_Transmit(&DEBUG_UART, (uint8_t*)_PDATA_, _SIZE_, (~0))
+#else
+#define TL_SHCI_EVT_DBG_RAW(...)
+#endif
+
+/**
+ * BLE Transport Layer
+ */
+#if (TL_HCI_CMD_DBG_EN != 0)
+#define TL_HCI_CMD_DBG_MSG             PRINT_MESG_DBG
+#define TL_HCI_CMD_DBG_BUF             PRINT_LOG_BUFF_DBG
+#else
+#define TL_HCI_CMD_DBG_MSG(...)
+#define TL_HCI_CMD_DBG_BUF(...)
+#endif
+
+#if (TL_HCI_CMD_DBG_RAW_EN != 0)
+#define TL_HCI_CMD_DBG_RAW(_PDATA_, _SIZE_)  HAL_UART_Transmit(&DEBUG_UART, (uint8_t*)_PDATA_, _SIZE_, (~0))
+#else
+#define TL_HCI_CMD_DBG_RAW(...)
+#endif
+
+#if (TL_HCI_EVT_DBG_EN != 0)
+#define TL_HCI_EVT_DBG_MSG             PRINT_MESG_DBG
+#define TL_HCI_EVT_DBG_BUF             PRINT_LOG_BUFF_DBG
+#else
+#define TL_HCI_EVT_DBG_MSG(...)
+#define TL_HCI_EVT_DBG_BUF(...)
+#endif
+
+#if (TL_HCI_EVT_DBG_RAW_EN != 0)
+#define TL_HCI_EVT_DBG_RAW(_PDATA_, _SIZE_)  HAL_UART_Transmit(&DEBUG_UART, (uint8_t*)_PDATA_, _SIZE_, (~0))
+#else
+#define TL_HCI_EVT_DBG_RAW(...)
+#endif
+
+/**
+ * Memory Manager - Released buffer tracing
+ */
+#if (TL_MM_DBG_EN != 0)
+#define TL_MM_DBG_MSG             PRINT_MESG_DBG
+#else
+#define TL_MM_DBG_MSG(...)
+#endif
+
+/* USER CODE END Tl_Conf */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /*__TL_DBG_CONF_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/firmware/targets/f3/ble-glue/utilities_conf.h b/firmware/targets/f3/ble-glue/utilities_conf.h
new file mode 100644
index 00000000..92a5d07a
--- /dev/null
+++ b/firmware/targets/f3/ble-glue/utilities_conf.h
@@ -0,0 +1,68 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+  * File Name          : utilities_conf.h
+  * Description        : Configuration file for STM32 Utilities.
+  *
+ ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef UTILITIES_CONF_H
+#define UTILITIES_CONF_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "cmsis_compiler.h"
+#include "string.h"
+
+/******************************************************************************
+ * common
+ ******************************************************************************/
+#define UTILS_ENTER_CRITICAL_SECTION( )   uint32_t primask_bit = __get_PRIMASK( );\
+                                          __disable_irq( )
+
+#define UTILS_EXIT_CRITICAL_SECTION( )          __set_PRIMASK( primask_bit )
+
+#define UTILS_MEMSET8( dest, value, size )      memset( dest, value, size);
+
+/******************************************************************************
+ * tiny low power manager
+ * (any macro that does not need to be modified can be removed)
+ ******************************************************************************/
+#define UTIL_LPM_INIT_CRITICAL_SECTION( )
+#define UTIL_LPM_ENTER_CRITICAL_SECTION( )      UTILS_ENTER_CRITICAL_SECTION( )
+#define UTIL_LPM_EXIT_CRITICAL_SECTION( )       UTILS_EXIT_CRITICAL_SECTION( )
+
+/******************************************************************************
+ * sequencer
+ * (any macro that does not need to be modified can be removed)
+ ******************************************************************************/
+#define UTIL_SEQ_INIT_CRITICAL_SECTION( )
+#define UTIL_SEQ_ENTER_CRITICAL_SECTION( )      UTILS_ENTER_CRITICAL_SECTION( )
+#define UTIL_SEQ_EXIT_CRITICAL_SECTION( )       UTILS_EXIT_CRITICAL_SECTION( )
+#define UTIL_SEQ_CONF_TASK_NBR                  (32)
+#define UTIL_SEQ_CONF_PRIO_NBR                  (2)
+#define UTIL_SEQ_MEMSET8( dest, value, size )   UTILS_MEMSET8( dest, value, size )
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /*UTILITIES_CONF_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/firmware/targets/f3/f3-1/Inc/adc.h b/firmware/targets/f3/f3-1/Inc/adc.h
index fd4c3847..ad6e4ad1 100644
--- a/firmware/targets/f3/f3-1/Inc/adc.h
+++ b/firmware/targets/f3/f3-1/Inc/adc.h
@@ -1,8 +1,8 @@
 /**
   ******************************************************************************
-  * File Name          : ADC.h
-  * Description        : This file provides code for the configuration
-  *                      of the ADC instances.
+  * @file    adc.h
+  * @brief   This file contains all the function prototypes for
+  *          the adc.c file
   ******************************************************************************
   * @attention
   *
@@ -17,10 +17,11 @@
   ******************************************************************************
   */
 /* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __adc_H
-#define __adc_H
+#ifndef __ADC_H__
+#define __ADC_H__
+
 #ifdef __cplusplus
- extern "C" {
+extern "C" {
 #endif
 
 /* Includes ------------------------------------------------------------------*/
@@ -45,14 +46,7 @@ void MX_ADC1_Init(void);
 #ifdef __cplusplus
 }
 #endif
-#endif /*__ adc_H */
 
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
+#endif /* __ADC_H__ */
 
 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/firmware/targets/f3/f3-1/Inc/aes.h b/firmware/targets/f3/f3-1/Inc/aes.h
new file mode 100644
index 00000000..8e703f9d
--- /dev/null
+++ b/firmware/targets/f3/f3-1/Inc/aes.h
@@ -0,0 +1,54 @@
+/**
+  ******************************************************************************
+  * @file    aes.h
+  * @brief   This file contains all the function prototypes for
+  *          the aes.c file
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __AES_H__
+#define __AES_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+extern CRYP_HandleTypeDef hcryp1;
+extern CRYP_HandleTypeDef hcryp2;
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+void MX_AES1_Init(void);
+void MX_AES2_Init(void);
+
+/* USER CODE BEGIN Prototypes */
+
+/* USER CODE END Prototypes */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __AES_H__ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/firmware/targets/f3/f3-1/Inc/comp.h b/firmware/targets/f3/f3-1/Inc/comp.h
index 3ec923b1..92e61755 100644
--- a/firmware/targets/f3/f3-1/Inc/comp.h
+++ b/firmware/targets/f3/f3-1/Inc/comp.h
@@ -1,8 +1,8 @@
 /**
   ******************************************************************************
-  * File Name          : COMP.h
-  * Description        : This file provides code for the configuration
-  *                      of the COMP instances.
+  * @file    comp.h
+  * @brief   This file contains all the function prototypes for
+  *          the comp.c file
   ******************************************************************************
   * @attention
   *
@@ -17,10 +17,11 @@
   ******************************************************************************
   */
 /* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __comp_H
-#define __comp_H
+#ifndef __COMP_H__
+#define __COMP_H__
+
 #ifdef __cplusplus
- extern "C" {
+extern "C" {
 #endif
 
 /* Includes ------------------------------------------------------------------*/
@@ -45,14 +46,7 @@ void MX_COMP1_Init(void);
 #ifdef __cplusplus
 }
 #endif
-#endif /*__ comp_H */
 
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
+#endif /* __COMP_H__ */
 
 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/firmware/targets/f3/f3-1/Inc/crc.h b/firmware/targets/f3/f3-1/Inc/crc.h
new file mode 100644
index 00000000..cc36b7bc
--- /dev/null
+++ b/firmware/targets/f3/f3-1/Inc/crc.h
@@ -0,0 +1,52 @@
+/**
+  ******************************************************************************
+  * @file    crc.h
+  * @brief   This file contains all the function prototypes for
+  *          the crc.c file
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __CRC_H__
+#define __CRC_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+extern CRC_HandleTypeDef hcrc;
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+void MX_CRC_Init(void);
+
+/* USER CODE BEGIN Prototypes */
+
+/* USER CODE END Prototypes */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CRC_H__ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/firmware/targets/f3/f3-1/Inc/gpio.h b/firmware/targets/f3/f3-1/Inc/gpio.h
index 6fac8b7a..220f6191 100644
--- a/firmware/targets/f3/f3-1/Inc/gpio.h
+++ b/firmware/targets/f3/f3-1/Inc/gpio.h
@@ -1,8 +1,8 @@
 /**
   ******************************************************************************
-  * File Name          : gpio.h
-  * Description        : This file contains all the functions prototypes for
-  *                      the gpio
+  * @file    gpio.h
+  * @brief   This file contains all the function prototypes for
+  *          the gpio.c file
   ******************************************************************************
   * @attention
   *
@@ -16,12 +16,12 @@
   *
   ******************************************************************************
   */
-
 /* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __gpio_H
-#define __gpio_H
+#ifndef __GPIO_H__
+#define __GPIO_H__
+
 #ifdef __cplusplus
- extern "C" {
+extern "C" {
 #endif
 
 /* Includes ------------------------------------------------------------------*/
@@ -44,14 +44,6 @@ void MX_GPIO_Init(void);
 #ifdef __cplusplus
 }
 #endif
-#endif /*__ pinoutConfig_H */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
+#endif /*__ GPIO_H__ */
 
 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/firmware/targets/f3/f3-1/Inc/i2c.h b/firmware/targets/f3/f3-1/Inc/i2c.h
index 89392e4e..28396a60 100644
--- a/firmware/targets/f3/f3-1/Inc/i2c.h
+++ b/firmware/targets/f3/f3-1/Inc/i2c.h
@@ -1,8 +1,8 @@
 /**
   ******************************************************************************
-  * File Name          : I2C.h
-  * Description        : This file provides code for the configuration
-  *                      of the I2C instances.
+  * @file    i2c.h
+  * @brief   This file contains all the function prototypes for
+  *          the i2c.c file
   ******************************************************************************
   * @attention
   *
@@ -17,10 +17,11 @@
   ******************************************************************************
   */
 /* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __i2c_H
-#define __i2c_H
+#ifndef __I2C_H__
+#define __I2C_H__
+
 #ifdef __cplusplus
- extern "C" {
+extern "C" {
 #endif
 
 /* Includes ------------------------------------------------------------------*/
@@ -47,14 +48,7 @@ void MX_I2C1_Init(void);
 #ifdef __cplusplus
 }
 #endif
-#endif /*__ i2c_H */
 
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
+#endif /* __I2C_H__ */
 
 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/firmware/targets/f3/f3-1/Inc/pka.h b/firmware/targets/f3/f3-1/Inc/pka.h
new file mode 100644
index 00000000..06779391
--- /dev/null
+++ b/firmware/targets/f3/f3-1/Inc/pka.h
@@ -0,0 +1,52 @@
+/**
+  ******************************************************************************
+  * @file    pka.h
+  * @brief   This file contains all the function prototypes for
+  *          the pka.c file
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __PKA_H__
+#define __PKA_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+extern PKA_HandleTypeDef hpka;
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+void MX_PKA_Init(void);
+
+/* USER CODE BEGIN Prototypes */
+
+/* USER CODE END Prototypes */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __PKA_H__ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/firmware/targets/f3/f3-1/Inc/rf.h b/firmware/targets/f3/f3-1/Inc/rf.h
index 0ad8d042..cfb521db 100644
--- a/firmware/targets/f3/f3-1/Inc/rf.h
+++ b/firmware/targets/f3/f3-1/Inc/rf.h
@@ -1,8 +1,8 @@
 /**
   ******************************************************************************
-  * File Name          : RF.h
-  * Description        : This file provides code for the configuration
-  *                      of the RF instances.
+  * @file    rf.h
+  * @brief   This file contains all the function prototypes for
+  *          the rf.c file
   ******************************************************************************
   * @attention
   *
@@ -17,10 +17,11 @@
   ******************************************************************************
   */
 /* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __rf_H
-#define __rf_H
+#ifndef __RF_H__
+#define __RF_H__
+
 #ifdef __cplusplus
- extern "C" {
+extern "C" {
 #endif
 
 /* Includes ------------------------------------------------------------------*/
@@ -43,14 +44,7 @@ void MX_RF_Init(void);
 #ifdef __cplusplus
 }
 #endif
-#endif /*__ rf_H */
 
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
+#endif /* __RF_H__ */
 
 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/firmware/targets/f3/f3-1/Inc/rng.h b/firmware/targets/f3/f3-1/Inc/rng.h
new file mode 100644
index 00000000..08b72883
--- /dev/null
+++ b/firmware/targets/f3/f3-1/Inc/rng.h
@@ -0,0 +1,52 @@
+/**
+  ******************************************************************************
+  * @file    rng.h
+  * @brief   This file contains all the function prototypes for
+  *          the rng.c file
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __RNG_H__
+#define __RNG_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+extern RNG_HandleTypeDef hrng;
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+void MX_RNG_Init(void);
+
+/* USER CODE BEGIN Prototypes */
+
+/* USER CODE END Prototypes */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __RNG_H__ */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/firmware/targets/f3/f3-1/Inc/rtc.h b/firmware/targets/f3/f3-1/Inc/rtc.h
index 9c1d66eb..0ae33baa 100644
--- a/firmware/targets/f3/f3-1/Inc/rtc.h
+++ b/firmware/targets/f3/f3-1/Inc/rtc.h
@@ -1,8 +1,8 @@
 /**
   ******************************************************************************
-  * File Name          : RTC.h
-  * Description        : This file provides code for the configuration
-  *                      of the RTC instances.
+  * @file    rtc.h
+  * @brief   This file contains all the function prototypes for
+  *          the rtc.c file
   ******************************************************************************
   * @attention
   *
@@ -17,10 +17,11 @@
   ******************************************************************************
   */
 /* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __rtc_H
-#define __rtc_H
+#ifndef __RTC_H__
+#define __RTC_H__
+
 #ifdef __cplusplus
- extern "C" {
+extern "C" {
 #endif
 
 /* Includes ------------------------------------------------------------------*/
@@ -45,14 +46,7 @@ void MX_RTC_Init(void);
 #ifdef __cplusplus
 }
 #endif
-#endif /*__ rtc_H */
 
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
+#endif /* __RTC_H__ */
 
 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/firmware/targets/f3/f3-1/Inc/spi.h b/firmware/targets/f3/f3-1/Inc/spi.h
index e497d347..7e313320 100644
--- a/firmware/targets/f3/f3-1/Inc/spi.h
+++ b/firmware/targets/f3/f3-1/Inc/spi.h
@@ -1,8 +1,8 @@
 /**
   ******************************************************************************
-  * File Name          : SPI.h
-  * Description        : This file provides code for the configuration
-  *                      of the SPI instances.
+  * @file    spi.h
+  * @brief   This file contains all the function prototypes for
+  *          the spi.c file
   ******************************************************************************
   * @attention
   *
@@ -17,10 +17,11 @@
   ******************************************************************************
   */
 /* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __spi_H
-#define __spi_H
+#ifndef __SPI_H__
+#define __SPI_H__
+
 #ifdef __cplusplus
- extern "C" {
+extern "C" {
 #endif
 
 /* Includes ------------------------------------------------------------------*/
@@ -50,14 +51,7 @@ void CC1101_SPI_Reconfigure();
 #ifdef __cplusplus
 }
 #endif
-#endif /*__ spi_H */
 
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
+#endif /* __SPI_H__ */
 
 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/firmware/targets/f3/f3-1/Inc/stm32wbxx_hal_conf.h b/firmware/targets/f3/f3-1/Inc/stm32wbxx_hal_conf.h
index 03ce8e9c..57e2d7cb 100644
--- a/firmware/targets/f3/f3-1/Inc/stm32wbxx_hal_conf.h
+++ b/firmware/targets/f3/f3-1/Inc/stm32wbxx_hal_conf.h
@@ -34,21 +34,20 @@
   */
 #define HAL_MODULE_ENABLED
 #define HAL_ADC_MODULE_ENABLED
-/*#define HAL_CRYP_MODULE_ENABLED   */
+#define HAL_CRYP_MODULE_ENABLED
 #define HAL_COMP_MODULE_ENABLED
-/*#define HAL_CRC_MODULE_ENABLED   */
+#define HAL_CRC_MODULE_ENABLED
 #define HAL_HSEM_MODULE_ENABLED
 #define HAL_I2C_MODULE_ENABLED
-/*#define HAL_I2S_MODULE_ENABLED   */
 /*#define HAL_IPCC_MODULE_ENABLED   */
 /*#define HAL_IRDA_MODULE_ENABLED   */
 /*#define HAL_IWDG_MODULE_ENABLED   */
 /*#define HAL_LCD_MODULE_ENABLED   */
 /*#define HAL_LPTIM_MODULE_ENABLED   */
 #define HAL_PCD_MODULE_ENABLED
-/*#define HAL_PKA_MODULE_ENABLED   */
+#define HAL_PKA_MODULE_ENABLED
 /*#define HAL_QSPI_MODULE_ENABLED   */
-/*#define HAL_RNG_MODULE_ENABLED   */
+#define HAL_RNG_MODULE_ENABLED
 #define HAL_RTC_MODULE_ENABLED
 /*#define HAL_SAI_MODULE_ENABLED   */
 /*#define HAL_SMBUS_MODULE_ENABLED   */
@@ -71,7 +70,6 @@
 #define USE_HAL_COMP_REGISTER_CALLBACKS      0u
 #define USE_HAL_CRYP_REGISTER_CALLBACKS      0u
 #define USE_HAL_I2C_REGISTER_CALLBACKS       0u
-#define USE_HAL_I2S_REGISTER_CALLBACKS       0u
 #define USE_HAL_IRDA_REGISTER_CALLBACKS      0u
 #define USE_HAL_LPTIM_REGISTER_CALLBACKS     0u
 #define USE_HAL_PCD_REGISTER_CALLBACKS       0u
@@ -245,10 +243,6 @@
  #include "stm32wbxx_hal_i2c.h"
 #endif /* HAL_I2C_MODULE_ENABLED */
 
-#ifdef HAL_I2S_MODULE_ENABLED
- #include "stm32wbxx_hal_i2s.h"
-#endif /* HAL_I2S_MODULE_ENABLED */
-
 #ifdef HAL_IPCC_MODULE_ENABLED
  #include "stm32wbxx_hal_ipcc.h"
 #endif /* HAL_IPCC_MODULE_ENABLED */
diff --git a/firmware/targets/f3/f3-1/Inc/tim.h b/firmware/targets/f3/f3-1/Inc/tim.h
index b6e88184..6f1e7c78 100644
--- a/firmware/targets/f3/f3-1/Inc/tim.h
+++ b/firmware/targets/f3/f3-1/Inc/tim.h
@@ -1,8 +1,8 @@
 /**
   ******************************************************************************
-  * File Name          : TIM.h
-  * Description        : This file provides code for the configuration
-  *                      of the TIM instances.
+  * @file    tim.h
+  * @brief   This file contains all the function prototypes for
+  *          the tim.c file
   ******************************************************************************
   * @attention
   *
@@ -17,10 +17,11 @@
   ******************************************************************************
   */
 /* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __tim_H
-#define __tim_H
+#ifndef __TIM_H__
+#define __TIM_H__
+
 #ifdef __cplusplus
- extern "C" {
+extern "C" {
 #endif
 
 /* Includes ------------------------------------------------------------------*/
@@ -51,14 +52,7 @@ void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
 #ifdef __cplusplus
 }
 #endif
-#endif /*__ tim_H */
 
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
+#endif /* __TIM_H__ */
 
 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/firmware/targets/f3/f3-1/Inc/usart.h b/firmware/targets/f3/f3-1/Inc/usart.h
index e87a9998..15e65d1e 100644
--- a/firmware/targets/f3/f3-1/Inc/usart.h
+++ b/firmware/targets/f3/f3-1/Inc/usart.h
@@ -1,8 +1,8 @@
 /**
   ******************************************************************************
-  * File Name          : USART.h
-  * Description        : This file provides code for the configuration
-  *                      of the USART instances.
+  * @file    usart.h
+  * @brief   This file contains all the function prototypes for
+  *          the usart.c file
   ******************************************************************************
   * @attention
   *
@@ -17,10 +17,11 @@
   ******************************************************************************
   */
 /* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __usart_H
-#define __usart_H
+#ifndef __USART_H__
+#define __USART_H__
+
 #ifdef __cplusplus
- extern "C" {
+extern "C" {
 #endif
 
 /* Includes ------------------------------------------------------------------*/
@@ -45,14 +46,7 @@ void MX_USART1_UART_Init(void);
 #ifdef __cplusplus
 }
 #endif
-#endif /*__ usart_H */
 
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
+#endif /* __USART_H__ */
 
 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/firmware/targets/f3/f3-1/Src/adc.c b/firmware/targets/f3/f3-1/Src/adc.c
index 8d39940b..d924c244 100644
--- a/firmware/targets/f3/f3-1/Src/adc.c
+++ b/firmware/targets/f3/f3-1/Src/adc.c
@@ -1,8 +1,8 @@
 /**
   ******************************************************************************
-  * File Name          : ADC.c
-  * Description        : This file provides code for the configuration
-  *                      of the ADC instances.
+  * @file    adc.c
+  * @brief   This file provides code for the configuration
+  *          of the ADC instances.
   ******************************************************************************
   * @attention
   *
diff --git a/firmware/targets/f3/f3-1/Src/aes.c b/firmware/targets/f3/f3-1/Src/aes.c
new file mode 100644
index 00000000..31624851
--- /dev/null
+++ b/firmware/targets/f3/f3-1/Src/aes.c
@@ -0,0 +1,127 @@
+/**
+  ******************************************************************************
+  * @file    aes.c
+  * @brief   This file provides code for the configuration
+  *          of the AES instances.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "aes.h"
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+CRYP_HandleTypeDef hcryp1;
+__ALIGN_BEGIN static const uint32_t pKeyAES1[4] __ALIGN_END = {
+                            0x00000000,0x00000000,0x00000000,0x00000000};
+CRYP_HandleTypeDef hcryp2;
+__ALIGN_BEGIN static const uint32_t pKeyAES2[4] __ALIGN_END = {
+                            0x00000000,0x00000000,0x00000000,0x00000000};
+
+/* AES1 init function */
+void MX_AES1_Init(void)
+{
+
+  hcryp1.Instance = AES1;
+  hcryp1.Init.DataType = CRYP_DATATYPE_32B;
+  hcryp1.Init.KeySize = CRYP_KEYSIZE_128B;
+  hcryp1.Init.pKey = (uint32_t *)pKeyAES1;
+  hcryp1.Init.Algorithm = CRYP_AES_ECB;
+  hcryp1.Init.DataWidthUnit = CRYP_DATAWIDTHUNIT_WORD;
+  hcryp1.Init.KeyIVConfigSkip = CRYP_KEYIVCONFIG_ALWAYS;
+  if (HAL_CRYP_Init(&hcryp1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+}
+/* AES2 init function */
+void MX_AES2_Init(void)
+{
+
+  hcryp2.Instance = AES2;
+  hcryp2.Init.DataType = CRYP_DATATYPE_32B;
+  hcryp2.Init.KeySize = CRYP_KEYSIZE_128B;
+  hcryp2.Init.pKey = (uint32_t *)pKeyAES2;
+  hcryp2.Init.Algorithm = CRYP_AES_ECB;
+  hcryp2.Init.DataWidthUnit = CRYP_DATAWIDTHUNIT_WORD;
+  hcryp2.Init.KeyIVConfigSkip = CRYP_KEYIVCONFIG_ALWAYS;
+  if (HAL_CRYP_Init(&hcryp2) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+}
+
+void HAL_CRYP_MspInit(CRYP_HandleTypeDef* crypHandle)
+{
+
+  if(crypHandle->Instance==AES1)
+  {
+  /* USER CODE BEGIN AES1_MspInit 0 */
+
+  /* USER CODE END AES1_MspInit 0 */
+    /* AES1 clock enable */
+    __HAL_RCC_AES1_CLK_ENABLE();
+  /* USER CODE BEGIN AES1_MspInit 1 */
+
+  /* USER CODE END AES1_MspInit 1 */
+  }
+  else if(crypHandle->Instance==AES2)
+  {
+  /* USER CODE BEGIN AES2_MspInit 0 */
+
+  /* USER CODE END AES2_MspInit 0 */
+    /* AES2 clock enable */
+    __HAL_RCC_AES2_CLK_ENABLE();
+  /* USER CODE BEGIN AES2_MspInit 1 */
+
+  /* USER CODE END AES2_MspInit 1 */
+  }
+}
+
+void HAL_CRYP_MspDeInit(CRYP_HandleTypeDef* crypHandle)
+{
+
+  if(crypHandle->Instance==AES1)
+  {
+  /* USER CODE BEGIN AES1_MspDeInit 0 */
+
+  /* USER CODE END AES1_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_AES1_CLK_DISABLE();
+  /* USER CODE BEGIN AES1_MspDeInit 1 */
+
+  /* USER CODE END AES1_MspDeInit 1 */
+  }
+  else if(crypHandle->Instance==AES2)
+  {
+  /* USER CODE BEGIN AES2_MspDeInit 0 */
+
+  /* USER CODE END AES2_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_AES2_CLK_DISABLE();
+  /* USER CODE BEGIN AES2_MspDeInit 1 */
+
+  /* USER CODE END AES2_MspDeInit 1 */
+  }
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/firmware/targets/f3/f3-1/Src/app_freertos.c b/firmware/targets/f3/f3-1/Src/app_freertos.c
index 01623a9f..b24d522e 100644
--- a/firmware/targets/f3/f3-1/Src/app_freertos.c
+++ b/firmware/targets/f3/f3-1/Src/app_freertos.c
@@ -153,6 +153,10 @@ void MX_FREERTOS_Init(void) {
   /* add threads, ... */
   /* USER CODE END RTOS_THREADS */
 
+  /* USER CODE BEGIN RTOS_EVENTS */
+  /* add events, ... */
+  /* USER CODE END RTOS_EVENTS */
+
 }
 
 /* USER CODE BEGIN Header_StartDefaultTask */
diff --git a/firmware/targets/f3/f3-1/Src/comp.c b/firmware/targets/f3/f3-1/Src/comp.c
index f8d69ed4..0182f260 100644
--- a/firmware/targets/f3/f3-1/Src/comp.c
+++ b/firmware/targets/f3/f3-1/Src/comp.c
@@ -1,8 +1,8 @@
 /**
   ******************************************************************************
-  * File Name          : COMP.c
-  * Description        : This file provides code for the configuration
-  *                      of the COMP instances.
+  * @file    comp.c
+  * @brief   This file provides code for the configuration
+  *          of the COMP instances.
   ******************************************************************************
   * @attention
   *
diff --git a/firmware/targets/f3/f3-1/Src/crc.c b/firmware/targets/f3/f3-1/Src/crc.c
new file mode 100644
index 00000000..b42b3a1c
--- /dev/null
+++ b/firmware/targets/f3/f3-1/Src/crc.c
@@ -0,0 +1,82 @@
+/**
+  ******************************************************************************
+  * @file    crc.c
+  * @brief   This file provides code for the configuration
+  *          of the CRC instances.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "crc.h"
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+CRC_HandleTypeDef hcrc;
+
+/* CRC init function */
+void MX_CRC_Init(void)
+{
+
+  hcrc.Instance = CRC;
+  hcrc.Init.DefaultPolynomialUse = DEFAULT_POLYNOMIAL_ENABLE;
+  hcrc.Init.DefaultInitValueUse = DEFAULT_INIT_VALUE_ENABLE;
+  hcrc.Init.InputDataInversionMode = CRC_INPUTDATA_INVERSION_NONE;
+  hcrc.Init.OutputDataInversionMode = CRC_OUTPUTDATA_INVERSION_DISABLE;
+  hcrc.InputDataFormat = CRC_INPUTDATA_FORMAT_BYTES;
+  if (HAL_CRC_Init(&hcrc) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+}
+
+void HAL_CRC_MspInit(CRC_HandleTypeDef* crcHandle)
+{
+
+  if(crcHandle->Instance==CRC)
+  {
+  /* USER CODE BEGIN CRC_MspInit 0 */
+
+  /* USER CODE END CRC_MspInit 0 */
+    /* CRC clock enable */
+    __HAL_RCC_CRC_CLK_ENABLE();
+  /* USER CODE BEGIN CRC_MspInit 1 */
+
+  /* USER CODE END CRC_MspInit 1 */
+  }
+}
+
+void HAL_CRC_MspDeInit(CRC_HandleTypeDef* crcHandle)
+{
+
+  if(crcHandle->Instance==CRC)
+  {
+  /* USER CODE BEGIN CRC_MspDeInit 0 */
+
+  /* USER CODE END CRC_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_CRC_CLK_DISABLE();
+  /* USER CODE BEGIN CRC_MspDeInit 1 */
+
+  /* USER CODE END CRC_MspDeInit 1 */
+  }
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/firmware/targets/f3/f3-1/Src/gpio.c b/firmware/targets/f3/f3-1/Src/gpio.c
index 64d47c68..b0040fe6 100644
--- a/firmware/targets/f3/f3-1/Src/gpio.c
+++ b/firmware/targets/f3/f3-1/Src/gpio.c
@@ -1,8 +1,8 @@
 /**
   ******************************************************************************
-  * File Name          : gpio.c
-  * Description        : This file provides code for the configuration
-  *                      of all used GPIO pins.
+  * @file    gpio.c
+  * @brief   This file provides code for the configuration
+  *          of all used GPIO pins.
   ******************************************************************************
   * @attention
   *
@@ -19,6 +19,7 @@
 
 /* Includes ------------------------------------------------------------------*/
 #include "gpio.h"
+
 /* USER CODE BEGIN 0 */
 
 /* USER CODE END 0 */
diff --git a/firmware/targets/f3/f3-1/Src/i2c.c b/firmware/targets/f3/f3-1/Src/i2c.c
index 32712c56..e3f3f8cd 100644
--- a/firmware/targets/f3/f3-1/Src/i2c.c
+++ b/firmware/targets/f3/f3-1/Src/i2c.c
@@ -1,8 +1,8 @@
 /**
   ******************************************************************************
-  * File Name          : I2C.c
-  * Description        : This file provides code for the configuration
-  *                      of the I2C instances.
+  * @file    i2c.c
+  * @brief   This file provides code for the configuration
+  *          of the I2C instances.
   ******************************************************************************
   * @attention
   *
diff --git a/firmware/targets/f3/f3-1/Src/main.c b/firmware/targets/f3/f3-1/Src/main.c
index c089ee16..b54b01bb 100644
--- a/firmware/targets/f3/f3-1/Src/main.c
+++ b/firmware/targets/f3/f3-1/Src/main.c
@@ -21,9 +21,13 @@
 #include "main.h"
 #include "cmsis_os.h"
 #include "adc.h"
+#include "aes.h"
 #include "comp.h"
+#include "crc.h"
 #include "i2c.h"
+#include "pka.h"
 #include "rf.h"
+#include "rng.h"
 #include "rtc.h"
 #include "spi.h"
 #include "tim.h"
@@ -108,6 +112,11 @@ int main(void)
   MX_TIM16_Init();
   MX_COMP1_Init();
   MX_RF_Init();
+  MX_PKA_Init();
+  MX_RNG_Init();
+  MX_AES1_Init();
+  MX_AES2_Init();
+  MX_CRC_Init();
   /* USER CODE BEGIN 2 */
   MX_FATFS_Init();
   delay_us_init_DWT();
@@ -189,7 +198,8 @@ void SystemClock_Config(void)
   */
   PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SMPS|RCC_PERIPHCLK_RFWAKEUP
                               |RCC_PERIPHCLK_RTC|RCC_PERIPHCLK_USART1
-                              |RCC_PERIPHCLK_I2C1|RCC_PERIPHCLK_USB
+                              |RCC_PERIPHCLK_I2C1|RCC_PERIPHCLK_CLK48SEL
+                              |RCC_PERIPHCLK_USB|RCC_PERIPHCLK_RNG
                               |RCC_PERIPHCLK_ADC;
   PeriphClkInitStruct.PLLSAI1.PLLN = 6;
   PeriphClkInitStruct.PLLSAI1.PLLP = RCC_PLLP_DIV2;
@@ -199,9 +209,10 @@ void SystemClock_Config(void)
   PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
   PeriphClkInitStruct.I2c1ClockSelection = RCC_I2C1CLKSOURCE_PCLK1;
   PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLLSAI1;
+  PeriphClkInitStruct.RngClockSelection = RCC_RNGCLKSOURCE_CLK48;
   PeriphClkInitStruct.AdcClockSelection = RCC_ADCCLKSOURCE_PLLSAI1;
   PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSE;
-  PeriphClkInitStruct.RFWakeUpClockSelection = RCC_RFWKPCLKSOURCE_HSE_DIV1024;
+  PeriphClkInitStruct.RFWakeUpClockSelection = RCC_RFWKPCLKSOURCE_LSE;
   PeriphClkInitStruct.SmpsClockSelection = RCC_SMPSCLKSOURCE_HSE;
   PeriphClkInitStruct.SmpsDivSelection = RCC_SMPSCLKDIV_RANGE0;
   if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
@@ -214,13 +225,16 @@ void SystemClock_Config(void)
   /** Enables the Clock Security System
   */
   HAL_RCC_EnableCSS();
+  /** Enables the Clock Security System
+  */
+  HAL_RCCEx_EnableLSECSS();
 }
 
 /* USER CODE BEGIN 4 */
 
 /* USER CODE END 4 */
 
-/**
+ /**
   * @brief  Period elapsed callback in non blocking mode
   * @note   This function is called  when TIM17 interrupt took place, inside
   * HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment
diff --git a/firmware/targets/f3/f3-1/Src/pka.c b/firmware/targets/f3/f3-1/Src/pka.c
new file mode 100644
index 00000000..3fcf83eb
--- /dev/null
+++ b/firmware/targets/f3/f3-1/Src/pka.c
@@ -0,0 +1,77 @@
+/**
+  ******************************************************************************
+  * @file    pka.c
+  * @brief   This file provides code for the configuration
+  *          of the PKA instances.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "pka.h"
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+PKA_HandleTypeDef hpka;
+
+/* PKA init function */
+void MX_PKA_Init(void)
+{
+
+  hpka.Instance = PKA;
+  if (HAL_PKA_Init(&hpka) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+}
+
+void HAL_PKA_MspInit(PKA_HandleTypeDef* pkaHandle)
+{
+
+  if(pkaHandle->Instance==PKA)
+  {
+  /* USER CODE BEGIN PKA_MspInit 0 */
+
+  /* USER CODE END PKA_MspInit 0 */
+    /* PKA clock enable */
+    __HAL_RCC_PKA_CLK_ENABLE();
+  /* USER CODE BEGIN PKA_MspInit 1 */
+
+  /* USER CODE END PKA_MspInit 1 */
+  }
+}
+
+void HAL_PKA_MspDeInit(PKA_HandleTypeDef* pkaHandle)
+{
+
+  if(pkaHandle->Instance==PKA)
+  {
+  /* USER CODE BEGIN PKA_MspDeInit 0 */
+
+  /* USER CODE END PKA_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_PKA_CLK_DISABLE();
+  /* USER CODE BEGIN PKA_MspDeInit 1 */
+
+  /* USER CODE END PKA_MspDeInit 1 */
+  }
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/firmware/targets/f3/f3-1/Src/rf.c b/firmware/targets/f3/f3-1/Src/rf.c
index fe014fec..00f46606 100644
--- a/firmware/targets/f3/f3-1/Src/rf.c
+++ b/firmware/targets/f3/f3-1/Src/rf.c
@@ -1,8 +1,8 @@
 /**
   ******************************************************************************
-  * File Name          : RF.c
-  * Description        : This file provides code for the configuration
-  *                      of the RF instances.
+  * @file    rf.c
+  * @brief   This file provides code for the configuration
+  *          of the RF instances.
   ******************************************************************************
   * @attention
   *
diff --git a/firmware/targets/f3/f3-1/Src/rng.c b/firmware/targets/f3/f3-1/Src/rng.c
new file mode 100644
index 00000000..36bc8bb4
--- /dev/null
+++ b/firmware/targets/f3/f3-1/Src/rng.c
@@ -0,0 +1,77 @@
+/**
+  ******************************************************************************
+  * @file    rng.c
+  * @brief   This file provides code for the configuration
+  *          of the RNG instances.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "rng.h"
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+RNG_HandleTypeDef hrng;
+
+/* RNG init function */
+void MX_RNG_Init(void)
+{
+
+  hrng.Instance = RNG;
+  if (HAL_RNG_Init(&hrng) != HAL_OK)
+  {
+    Error_Handler();
+  }
+
+}
+
+void HAL_RNG_MspInit(RNG_HandleTypeDef* rngHandle)
+{
+
+  if(rngHandle->Instance==RNG)
+  {
+  /* USER CODE BEGIN RNG_MspInit 0 */
+
+  /* USER CODE END RNG_MspInit 0 */
+    /* RNG clock enable */
+    __HAL_RCC_RNG_CLK_ENABLE();
+  /* USER CODE BEGIN RNG_MspInit 1 */
+
+  /* USER CODE END RNG_MspInit 1 */
+  }
+}
+
+void HAL_RNG_MspDeInit(RNG_HandleTypeDef* rngHandle)
+{
+
+  if(rngHandle->Instance==RNG)
+  {
+  /* USER CODE BEGIN RNG_MspDeInit 0 */
+
+  /* USER CODE END RNG_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_RNG_CLK_DISABLE();
+  /* USER CODE BEGIN RNG_MspDeInit 1 */
+
+  /* USER CODE END RNG_MspDeInit 1 */
+  }
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/firmware/targets/f3/f3-1/Src/rtc.c b/firmware/targets/f3/f3-1/Src/rtc.c
index 05a624b3..636877d2 100644
--- a/firmware/targets/f3/f3-1/Src/rtc.c
+++ b/firmware/targets/f3/f3-1/Src/rtc.c
@@ -1,8 +1,8 @@
 /**
   ******************************************************************************
-  * File Name          : RTC.c
-  * Description        : This file provides code for the configuration
-  *                      of the RTC instances.
+  * @file    rtc.c
+  * @brief   This file provides code for the configuration
+  *          of the RTC instances.
   ******************************************************************************
   * @attention
   *
diff --git a/firmware/targets/f3/f3-1/Src/spi.c b/firmware/targets/f3/f3-1/Src/spi.c
index 29562fb4..b5929653 100644
--- a/firmware/targets/f3/f3-1/Src/spi.c
+++ b/firmware/targets/f3/f3-1/Src/spi.c
@@ -1,8 +1,8 @@
 /**
   ******************************************************************************
-  * File Name          : SPI.c
-  * Description        : This file provides code for the configuration
-  *                      of the SPI instances.
+  * @file    spi.c
+  * @brief   This file provides code for the configuration
+  *          of the SPI instances.
   ******************************************************************************
   * @attention
   *
diff --git a/firmware/targets/f3/f3-1/Src/stm32wbxx_hal_msp.c b/firmware/targets/f3/f3-1/Src/stm32wbxx_hal_msp.c
index 83887d1b..4b2a90aa 100644
--- a/firmware/targets/f3/f3-1/Src/stm32wbxx_hal_msp.c
+++ b/firmware/targets/f3/f3-1/Src/stm32wbxx_hal_msp.c
@@ -70,6 +70,8 @@ void HAL_MspInit(void)
   __HAL_RCC_HSEM_CLK_ENABLE();
 
   /* System interrupt init*/
+  /* PendSV_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(PendSV_IRQn, 15, 0);
 
   /* Peripheral interrupt init */
   /* HSEM_IRQn interrupt configuration */
diff --git a/firmware/targets/f3/f3-1/Src/stm32wbxx_hal_timebase_tim.c b/firmware/targets/f3/f3-1/Src/stm32wbxx_hal_timebase_tim.c
index 72af9eeb..745a9c95 100644
--- a/firmware/targets/f3/f3-1/Src/stm32wbxx_hal_timebase_tim.c
+++ b/firmware/targets/f3/f3-1/Src/stm32wbxx_hal_timebase_tim.c
@@ -58,9 +58,8 @@ HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
 
   /* Compute TIM17 clock */
   uwTimclock = HAL_RCC_GetPCLK2Freq();
-
   /* Compute the prescaler value to have TIM17 counter clock equal to 1MHz */
-  uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000) - 1);
+  uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000U) - 1U);
 
   /* Initialize TIM17 */
   htim17.Instance = TIM17;
@@ -71,7 +70,7 @@ HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
   + ClockDivision = 0
   + Counter direction = Up
   */
-  htim17.Init.Period = (1000000 / 1000) - 1;
+  htim17.Init.Period = (1000000U / 1000U) - 1U;
   htim17.Init.Prescaler = uwPrescalerValue;
   htim17.Init.ClockDivision = 0;
   htim17.Init.CounterMode = TIM_COUNTERMODE_UP;
diff --git a/firmware/targets/f3/f3-1/Src/stm32wbxx_it.c b/firmware/targets/f3/f3-1/Src/stm32wbxx_it.c
index 73bd28bb..8ae9d91b 100644
--- a/firmware/targets/f3/f3-1/Src/stm32wbxx_it.c
+++ b/firmware/targets/f3/f3-1/Src/stm32wbxx_it.c
@@ -322,5 +322,28 @@ void EXTI4_IRQHandler(void)
   /* USER CODE END EXTI4_IRQn 1 */
 }
 
+extern void HW_TS_RTC_Wakeup_Handler();
+extern void HW_IPCC_Tx_Handler();
+extern void HW_IPCC_Rx_Handler();
+
+
+void RTC_WKUP_IRQHandler(void)
+{
+  HW_TS_RTC_Wakeup_Handler();
+}
+
+void IPCC_C1_TX_IRQHandler(void)
+{
+  HW_IPCC_Tx_Handler();
+
+  return;
+}
+
+void IPCC_C1_RX_IRQHandler(void)
+{
+  HW_IPCC_Rx_Handler();
+  return;
+}
+
 /* USER CODE END 1 */
 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/firmware/targets/f3/f3-1/Src/tim.c b/firmware/targets/f3/f3-1/Src/tim.c
index 2cc45ff7..8ed10ebe 100644
--- a/firmware/targets/f3/f3-1/Src/tim.c
+++ b/firmware/targets/f3/f3-1/Src/tim.c
@@ -1,8 +1,8 @@
 /**
   ******************************************************************************
-  * File Name          : TIM.c
-  * Description        : This file provides code for the configuration
-  *                      of the TIM instances.
+  * @file    tim.c
+  * @brief   This file provides code for the configuration
+  *          of the TIM instances.
   ******************************************************************************
   * @attention
   *
diff --git a/firmware/targets/f3/f3-1/Src/usart.c b/firmware/targets/f3/f3-1/Src/usart.c
index bfe6303f..9bf64275 100644
--- a/firmware/targets/f3/f3-1/Src/usart.c
+++ b/firmware/targets/f3/f3-1/Src/usart.c
@@ -1,8 +1,8 @@
 /**
   ******************************************************************************
-  * File Name          : USART.c
-  * Description        : This file provides code for the configuration
-  *                      of the USART instances.
+  * @file    usart.c
+  * @brief   This file provides code for the configuration
+  *          of the USART instances.
   ******************************************************************************
   * @attention
   *
diff --git a/firmware/targets/f3/f3-1/f3-1.ioc b/firmware/targets/f3/f3-1/f3-1.ioc
index 7ae5ce48..efc53a5f 100644
--- a/firmware/targets/f3/f3-1/f3-1.ioc
+++ b/firmware/targets/f3/f3-1/f3-1.ioc
@@ -8,6 +8,7 @@ PB10.GPIO_PuPd=GPIO_PULLUP
 RF1.Signal=RF_RF1
 SPI2.VirtualType=VM_MASTER
 VP_ADC1_TempSens_Input.Mode=IN-TempSens
+VP_AES1_VS_AES.Signal=AES1_VS_AES
 PC12.Locked=true
 TIM1.IPParameters=Channel-Output Compare1 CH1N,Channel-PWM Generation3 CH3N
 PC12.Signal=GPIO_Output
@@ -49,6 +50,7 @@ PD0.Signal=GPIO_Output
 VP_TIM2_VS_ClockSourceINT.Signal=TIM2_VS_ClockSourceINT
 RCC.PREFETCH_ENABLE=1
 PB13.Locked=true
+VP_AES2_VS_AES.Signal=AES2_VS_AES
 NVIC.EXTI15_10_IRQn=true\:5\:0\:true\:false\:true\:false\:true\:true
 ProjectManager.ProjectBuild=false
 NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
@@ -61,9 +63,9 @@ RCC.RTCClockSelection=RCC_RTCCLKSOURCE_LSE
 SH.GPXTI12.0=GPIO_EXTI12
 PD1.GPIO_Label=SPI_D_SCK
 PB12.GPIO_Label=BUTTON_RIGHT
-ProjectManager.FirmwarePackage=STM32Cube FW_WB V1.9.0
+ProjectManager.FirmwarePackage=STM32Cube FW_WB V1.10.0
 VP_ADC1_Vref_Input.Mode=IN-Vrefint
-MxDb.Version=DB.6.0.0
+MxDb.Version=DB.6.0.10
 PB0.GPIOParameters=GPIO_Label
 PA1.GPIOParameters=GPIO_Speed,PinState,GPIO_Label,GPIO_ModeDefaultOutputPP
 ProjectManager.BackupPrevious=false
@@ -79,14 +81,14 @@ PA8.Signal=GPXTI8
 RCC.PLLRCLKFreq_Value=64000000
 SH.GPXTI11.ConfNb=1
 PB6.Locked=true
-NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:false\:false\:false\:false
+NVIC.PendSV_IRQn=true\:15\:0\:false\:false\:false\:true\:false\:false
 ProjectManager.HalAssertFull=false
-ADC1.SamplingTime-0\#ChannelRegularConversion=ADC_SAMPLETIME_2CYCLES_5
 VP_TIM1_VS_ClockSourceINT.Mode=Internal
+ADC1.SamplingTime-0\#ChannelRegularConversion=ADC_SAMPLETIME_2CYCLES_5
 TIM16.Pulse=145
 PA0.Signal=S_TIM2_CH1
 PH3-BOOT0.Signal=GPXTI3
-NVIC.HSEM_IRQn=true\:5\:0\:true\:false\:true\:true\:false\:true
+NVIC.HSEM_IRQn=true\:5\:0\:true\:false\:true\:false\:false\:true
 PB9.Signal=TIM1_CH3N
 Mcu.Package=VFQFPN68
 TIM2.Prescaler=64-1
@@ -96,6 +98,7 @@ SPI2.Mode=SPI_MODE_MASTER
 PA2.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_OD
 SH.GPXTI11.0=GPIO_EXTI11
 SH.GPXTI8.0=GPIO_EXTI8
+VP_PKA_VS_PKA.Mode=PKA_Activate
 PA14.Locked=true
 SH.GPXTI8.ConfNb=1
 NVIC.TimeBaseIP=TIM17
@@ -105,7 +108,7 @@ VP_RTC_VS_RTC_Calendar.Mode=RTC_Calendar
 FREERTOS.FootprintOK=true
 PA5.GPIOParameters=GPIO_Label
 PA1.PinState=GPIO_PIN_SET
-NVIC.USB_LP_IRQn=true\:5\:0\:true\:false\:true\:true\:false\:true
+NVIC.USB_LP_IRQn=true\:5\:0\:true\:false\:true\:false\:false\:true
 PB14.GPIOParameters=GPIO_Label
 VP_HSEM_VS_HSEM.Mode=HSEM_Activate
 RCC.PLLPoutputFreq_Value=64000000
@@ -133,7 +136,7 @@ PA3.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_OD
 FREERTOS.Tasks01=defaultTask,24,1024,StartDefaultTask,Default,NULL,Dynamic,NULL,NULL;app_main,8,1024,app,As external,NULL,Dynamic,NULL,NULL
 ADC1.Rank-0\#ChannelRegularConversion=1
 PA15.GPIOParameters=GPIO_PuPd,GPIO_Label
-Mcu.PinsNb=64
+Mcu.PinsNb=69
 PC11.Locked=true
 VP_SYS_VS_tim17.Mode=TIM17
 ADC1.IPParameters=Rank-0\#ChannelRegularConversion,Channel-0\#ChannelRegularConversion,SamplingTime-0\#ChannelRegularConversion,OffsetNumber-0\#ChannelRegularConversion,NbrOfConversionFlag,master,EnableAnalogWatchDog1,ContinuousConvMode
@@ -151,14 +154,19 @@ SH.S_TIM16_CH1.0=TIM16_CH1,PWM Generation1 CH1
 VP_TIM16_VS_ClockSourceINT.Mode=Enable_Timer
 SPI1.CLKPhase=SPI_PHASE_2EDGE
 OSC_IN.Locked=true
+Mcu.Pin68=VP_USB_DEVICE_VS_USB_DEVICE_CDC_FS
 RCC.HCLK2Freq_Value=32000000
 PC0.Signal=GPIO_Analog
 PC14-OSC32_IN.Signal=RCC_OSC32_IN
 PC11.GPIOParameters=PinState,GPIO_Label
-Mcu.Pin62=VP_TIM16_VS_ClockSourceINT
-Mcu.Pin63=VP_USB_DEVICE_VS_USB_DEVICE_CDC_FS
-Mcu.Pin60=VP_TIM1_VS_ClockSourceINT
-Mcu.Pin61=VP_TIM2_VS_ClockSourceINT
+Mcu.Pin62=VP_RTC_VS_RTC_Activate
+Mcu.Pin63=VP_RTC_VS_RTC_Calendar
+Mcu.Pin60=VP_PKA_VS_PKA
+Mcu.Pin61=VP_RNG_VS_RNG
+Mcu.Pin66=VP_TIM2_VS_ClockSourceINT
+Mcu.Pin67=VP_TIM16_VS_ClockSourceINT
+Mcu.Pin64=VP_SYS_VS_tim17
+Mcu.Pin65=VP_TIM1_VS_ClockSourceINT
 PD0.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
 PC3.GPIOParameters=GPIO_Label
 PB8.GPIO_Label=SPEAKER
@@ -166,18 +174,19 @@ PA11.Locked=true
 PA15.Locked=true
 PA8.GPIO_Label=RFID_PULL
 PC15-OSC32_OUT.Locked=true
-Mcu.Pin59=VP_SYS_VS_tim17
-Mcu.Pin57=VP_RTC_VS_RTC_Activate
-Mcu.Pin58=VP_RTC_VS_RTC_Calendar
+Mcu.Pin59=VP_HSEM_VS_HSEM
+Mcu.Pin57=VP_CRC_VS_CRC
+Mcu.Pin58=VP_FREERTOS_VS_CMSIS_V2
 PC12.PinState=GPIO_PIN_SET
 USB_DEVICE.PRODUCT_STRING_CDC_FS=Flipper Control Virtual ComPort
 Mcu.Pin51=PB7
 Mcu.Pin52=VP_ADC1_TempSens_Input
 Mcu.Pin50=PB6
-Mcu.Pin55=VP_FREERTOS_VS_CMSIS_V2
-Mcu.Pin56=VP_HSEM_VS_HSEM
+VP_CRC_VS_CRC.Signal=CRC_VS_CRC
+Mcu.Pin55=VP_AES2_VS_AES
+Mcu.Pin56=VP_COMP1_VS_VREFINT14
 Mcu.Pin53=VP_ADC1_Vref_Input
-Mcu.Pin54=VP_COMP1_VS_VREFINT14
+Mcu.Pin54=VP_AES1_VS_AES
 PC6.Locked=true
 PA9.Signal=I2C1_SCL
 VP_TIM1_VS_ClockSourceINT.Signal=TIM1_VS_ClockSourceINT
@@ -200,9 +209,11 @@ Mcu.Pin44=PC12
 Mcu.Pin45=PD0
 Mcu.Pin42=PC10
 Mcu.Pin43=PC11
+VP_PKA_VS_PKA.Signal=PKA_VS_PKA
 RCC.Cortex2Freq_Value=32000000
 ProjectManager.LastFirmware=true
 PD1.Mode=Full_Duplex_Master
+RCC.RNGCLockSelection=RCC_RNGCLKSOURCE_CLK48
 Mcu.Pin37=PA11
 PB4.GPIO_Label=SPI_R_MISO
 PCC.Ble.DataLength=6
@@ -214,7 +225,7 @@ Mcu.Pin36=PA10
 SPI1.Mode=SPI_MODE_MASTER
 Mcu.Pin39=PA13
 RCC.LCDFreq_Value=32768
-RCC.RNGFreq_Value=32000
+RCC.RNGFreq_Value=16000000
 VP_ADC1_TempSens_Input.Signal=ADC1_TempSens_Input
 Mcu.Pin30=PE4
 NVIC.COMP_IRQn=true\:5\:0\:true\:false\:true\:false\:false\:true
@@ -255,7 +266,7 @@ NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
 PC12.GPIO_Label=SD_CS
 ProjectManager.CompilerOptimize=6
 PA11.Signal=USB_DM
-ProjectManager.HeapSize=0x200
+ProjectManager.HeapSize=0x400
 PA0.GPIOParameters=GPIO_Label
 Mcu.Pin15=PA5
 NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
@@ -279,6 +290,7 @@ PA3.PinState=GPIO_PIN_SET
 PE4.PinState=GPIO_PIN_SET
 RCC.PWRFreq_Value=64000000
 SPI2.DataSize=SPI_DATASIZE_8BIT
+VP_AES1_VS_AES.Mode=AES_Activate
 SH.SharedAnalog_PC5.ConfNb=2
 SH.GPXTI1.ConfNb=1
 PB12.GPIO_PuPd=GPIO_PULLUP
@@ -298,13 +310,13 @@ TIM2.Channel-Input_Capture1_from_TI1=TIM_CHANNEL_1
 ProjectManager.KeepUserCode=true
 Mcu.UserName=STM32WB55RGVx
 ADC1.ContinuousConvMode=DISABLE
-RCC.RFWKPFreq_Value=976.5625
+RCC.RFWKPFreq_Value=32768
 PC10.Signal=GPIO_Analog
 RCC.PLLSAI1RoutputFreq_Value=48000000
 PC5.Locked=true
 PA0.GPIO_Label=IR_RX
 PA12.GPIOParameters=GPIO_Speed
-ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_ADC1_Init-ADC1-false-HAL-true,4-MX_I2C1_Init-I2C1-false-HAL-true,5-MX_RTC_Init-RTC-false-HAL-true,6-MX_SPI1_Init-SPI1-false-HAL-true,7-MX_SPI2_Init-SPI2-false-HAL-true,8-MX_USART1_UART_Init-USART1-false-HAL-true,9-MX_USB_Device_Init-USB_DEVICE-false-HAL-false,10-MX_TIM1_Init-TIM1-false-HAL-true,11-MX_TIM2_Init-TIM2-false-HAL-true,12-MX_TIM16_Init-TIM16-false-HAL-true,13-MX_COMP1_Init-COMP1-false-HAL-true,14-MX_RF_Init-RF-false-HAL-true,0-MX_HSEM_Init-HSEM-false-HAL-true
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_ADC1_Init-ADC1-false-HAL-true,4-MX_I2C1_Init-I2C1-false-HAL-true,5-MX_RTC_Init-RTC-false-HAL-true,6-MX_SPI1_Init-SPI1-false-HAL-true,7-MX_SPI2_Init-SPI2-false-HAL-true,8-MX_USART1_UART_Init-USART1-false-HAL-true,9-MX_USB_Device_Init-USB_DEVICE-false-HAL-false,10-MX_TIM1_Init-TIM1-false-HAL-true,11-MX_TIM2_Init-TIM2-false-HAL-true,12-MX_TIM16_Init-TIM16-false-HAL-true,13-MX_COMP1_Init-COMP1-false-HAL-true,14-MX_RF_Init-RF-false-HAL-true,15-MX_PKA_Init-PKA-false-HAL-true,16-MX_RNG_Init-RNG-false-HAL-true,17-MX_AES1_Init-AES1-false-HAL-true,18-MX_AES2_Init-AES2-false-HAL-true,19-MX_CRC_Init-CRC-false-HAL-true,0-MX_HSEM_Init-HSEM-false-HAL-true
 PC0.GPIOParameters=GPIO_Label
 PA9.GPIOParameters=GPIO_Speed,GPIO_Label
 PA2.GPIO_Speed=GPIO_SPEED_FREQ_LOW
@@ -322,22 +334,22 @@ PB13.GPIO_Label=RFID_OUT
 PB11.Signal=GPXTI11
 PB15.Signal=SPI2_MOSI
 OSC_OUT.GPIOParameters=GPIO_Label
-ProjectManager.StackSize=0x400
+ProjectManager.StackSize=0x1000
 PB5.GPIOParameters=GPIO_Label
 VP_FREERTOS_VS_CMSIS_V2.Mode=CMSIS_V2
 RCC.I2C3Freq_Value=64000000
-Mcu.IP4=I2C1
-Mcu.IP5=NVIC
+Mcu.IP4=CRC
+Mcu.IP5=FREERTOS
 RCC.FCLKCortexFreq_Value=64000000
 USB_DEVICE.MANUFACTURER_STRING=Flipper
-Mcu.IP2=FREERTOS
+Mcu.IP2=AES2
 I2C1.IPParameters=Timing,CustomTiming
-Mcu.IP3=HSEM
-Mcu.IP0=ADC1
-PB4.GPIOParameters=GPIO_Label
+Mcu.IP3=COMP1
 PA15.GPIO_Label=DISPLAY_BACKLIGHT
+PB4.GPIOParameters=GPIO_Label
+Mcu.IP0=ADC1
 PA12.Locked=true
-Mcu.IP1=COMP1
+Mcu.IP1=AES1
 PA12.Signal=USB_DP
 PE4.GPIOParameters=GPIO_Speed,PinState,GPIO_Label
 Mcu.UserConstants=
@@ -348,7 +360,7 @@ SH.GPXTI13.ConfNb=1
 Mcu.ThirdPartyNb=0
 PB1.GPIO_PuPd=GPIO_PULLUP
 RCC.HCLKFreq_Value=64000000
-Mcu.IPNb=18
+Mcu.IPNb=23
 ProjectManager.PreviousToolchain=
 PB1.GPIO_ModeDefaultEXTI=GPIO_MODE_IT_RISING_FALLING
 PA8.GPIOParameters=GPIO_Label
@@ -374,18 +386,20 @@ RCC.FCLK2Freq_Value=32000000
 FREERTOS.configUSE_TIMERS=1
 NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
 PH3-BOOT0.GPIOParameters=GPIO_Label,GPIO_ModeDefaultEXTI
-Mcu.IP10=SPI2
-NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:false\:false\:false\:false
-Mcu.IP12=TIM1
-Mcu.IP11=SYS
-Mcu.IP17=USB_DEVICE
+Mcu.IP10=RCC
+NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:false\:true\:false\:true
+Mcu.IP12=RNG
+Mcu.IP11=RF
+Mcu.IP18=TIM2
+Mcu.IP17=TIM1
 NVIC.TIM1_TRG_COM_TIM17_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true
 PA2.PinState=GPIO_PIN_SET
-Mcu.IP14=TIM16
+Mcu.IP19=TIM16
+Mcu.IP14=SPI1
 PB4.Mode=Full_Duplex_Master
-Mcu.IP13=TIM2
-Mcu.IP16=USB
-Mcu.IP15=USART1
+Mcu.IP13=RTC
+Mcu.IP16=SYS
+Mcu.IP15=SPI2
 PC14-OSC32_IN.Mode=LSE-External-Oscillator
 RCC.VCOInputFreq_Value=16000000
 PD0.PinState=GPIO_PIN_SET
@@ -399,7 +413,10 @@ PC13.GPIO_PuPd=GPIO_PULLUP
 PB3.GPIOParameters=GPIO_Label
 SH.S_TIM2_CH1.ConfNb=2
 PB7.Signal=USART1_RX
+Mcu.IP21=USB
 PB8.Locked=true
+Mcu.IP20=USART1
+Mcu.IP22=USB_DEVICE
 PE4.Signal=GPIO_Output
 PB0.Locked=true
 FREERTOS.configTOTAL_HEAP_SIZE=40960
@@ -420,6 +437,7 @@ SPI2.CLKPhase=SPI_PHASE_1EDGE
 PA10.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
 PB5.GPIO_Label=SPI_R_MOSI
 PC4.Locked=true
+VP_AES2_VS_AES.Mode=AES_Activate
 PC14-OSC32_IN.GPIO_Label=QUARTZ_32MHZ_IN
 SPI2.Direction=SPI_DIRECTION_2LINES
 PC5.Signal=SharedAnalog_PC5
@@ -457,6 +475,7 @@ VP_HSEM_VS_HSEM.Signal=HSEM_VS_HSEM
 OSC_IN.GPIOParameters=GPIO_Label
 PB12.Locked=true
 ProjectManager.DeletePrevious=true
+VP_RNG_VS_RNG.Mode=RNG_Activate
 PB10.Locked=true
 USB_DEVICE.IPParameters=VirtualMode,VirtualModeFS,CLASS_NAME_FS,MANUFACTURER_STRING,PRODUCT_STRING_CDC_FS,APP_RX_DATA_SIZE,APP_TX_DATA_SIZE
 TIM16.Channel=TIM_CHANNEL_1
@@ -473,6 +492,7 @@ TIM1.Channel-Output\ Compare1\ CH1N=TIM_CHANNEL_1
 FREERTOS.configRECORD_STACK_HIGH_ADDRESS=1
 ProjectManager.TargetToolchain=Makefile
 PB10.GPIO_Label=BUTTON_UP
+VP_RNG_VS_RNG.Signal=RNG_VS_RNG
 VP_USB_DEVICE_VS_USB_DEVICE_CDC_FS.Mode=CDC_FS
 RCC.HCLKRFFreq_Value=16000000
 PC5.GPIOParameters=GPIO_Label
@@ -500,7 +520,7 @@ NVIC.SavedSystickIrqHandlerGenerated=true
 RCC.APB2Freq_Value=64000000
 PC11.PinState=GPIO_PIN_SET
 COMP1.IPParameters=TriggerMode,Hysteresis,Mode
-MxCube.Version=6.0.1
+MxCube.Version=6.1.0
 VP_TIM2_VS_ClockSourceINT.Mode=Internal
 PC13.GPIOParameters=GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultEXTI
 PA1.GPIO_Speed=GPIO_SPEED_FREQ_LOW
@@ -515,16 +535,17 @@ OSC_OUT.Locked=true
 PA4.GPIOParameters=GPIO_Label
 PH3-BOOT0.GPIO_ModeDefaultEXTI=GPIO_MODE_IT_RISING_FALLING
 PB15.GPIOParameters=GPIO_Label
-RCC.IPParameters=ADCFreq_Value,AHB2CLKDivider,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,APB3Freq_Value,Cortex2Freq_Value,CortexFreq_Value,EnbaleCSS,FCLK2Freq_Value,FCLKCortexFreq_Value,FamilyName,HCLK2Freq_Value,HCLK3Freq_Value,HCLKFreq_Value,HCLKRFFreq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C3Freq_Value,LCDFreq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSI_VALUE,MCO1PinFreq_Value,MSIOscState,PLLM,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PLLSAI1N,PLLSAI1PoutputFreq_Value,PLLSAI1QoutputFreq_Value,PLLSAI1RoutputFreq_Value,PLLSourceVirtual,PREFETCH_ENABLE,PWRFreq_Value,RFWKPFreq_Value,RNGFreq_Value,RTCClockSelection,RTCFreq_Value,SAI1Freq_Value,SMPS1Freq_Value,SMPSCLockSelectionVirtual,SMPSFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,USART1Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VCOSAI1OutputFreq_Value
+RCC.IPParameters=ADCFreq_Value,AHB2CLKDivider,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,APB3Freq_Value,Cortex2Freq_Value,CortexFreq_Value,EnableCSSLSE,EnbaleCSS,FCLK2Freq_Value,FCLKCortexFreq_Value,FamilyName,HCLK2Freq_Value,HCLK3Freq_Value,HCLKFreq_Value,HCLKRFFreq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C3Freq_Value,LCDFreq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSI_VALUE,MCO1PinFreq_Value,MSIOscState,PLLM,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PLLSAI1N,PLLSAI1PoutputFreq_Value,PLLSAI1QoutputFreq_Value,PLLSAI1RoutputFreq_Value,PLLSourceVirtual,PREFETCH_ENABLE,PWRFreq_Value,RFWKPClockSelection,RFWKPFreq_Value,RNGCLockSelection,RNGFreq_Value,RTCClockSelection,RTCFreq_Value,SAI1Freq_Value,SMPS1Freq_Value,SMPSCLockSelectionVirtual,SMPSFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,USART1Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VCOSAI1OutputFreq_Value
 ProjectManager.AskForMigrate=true
 Mcu.Name=STM32WB55RGVx
 NVIC.SavedPendsvIrqHandlerGenerated=false
+RCC.EnableCSSLSE=true
 PA2.Signal=GPIO_Output
-Mcu.IP8=RTC
+Mcu.IP8=NVIC
 VP_FREERTOS_VS_CMSIS_V2.Signal=FREERTOS_VS_CMSIS_V2
-Mcu.IP9=SPI1
-Mcu.IP6=RCC
-Mcu.IP7=RF
+Mcu.IP9=PKA
+Mcu.IP6=HSEM
+Mcu.IP7=I2C1
 ProjectManager.CoupleFile=true
 PB3.Signal=SPI1_SCK
 RCC.SYSCLKFreq_VALUE=64000000
@@ -555,7 +576,9 @@ PB8.Signal=S_TIM16_CH1
 PA9.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
 TIM16.IPParameters=Channel,Pulse,Prescaler,Period
 RCC.APB1Freq_Value=64000000
+RCC.RFWKPClockSelection=RCC_RFWKPCLKSOURCE_LSE
 PC12.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
+VP_CRC_VS_CRC.Mode=CRC_Activate
 USB_DEVICE.VirtualMode=Cdc
 PB11.Locked=true
 ProjectManager.DeviceId=STM32WB55RGVx
diff --git a/firmware/targets/f3/f3-1/startup_stm32wb55xx_cm4.s b/firmware/targets/f3/f3-1/startup_stm32wb55xx_cm4.s
index 295f58d9..fc26cb42 100644
--- a/firmware/targets/f3/f3-1/startup_stm32wb55xx_cm4.s
+++ b/firmware/targets/f3/f3-1/startup_stm32wb55xx_cm4.s
@@ -1,445 +1,445 @@
-/**
-  ******************************************************************************
-  * @file      startup_stm32wb55xx_cm4.s
-  * @author    MCD Application Team
-  * @brief     STM32WB55xx devices vector table GCC toolchain.
-  *            This module performs:
-  *                - Set the initial SP
-  *                - Set the initial PC == Reset_Handler,
-  *                - Set the vector table entries with the exceptions ISR address
-  *                - Branches to main in the C library (which eventually
-  *                  calls main()).
-  *            After Reset the Cortex-M4 processor is in Thread mode,
-  *            priority is Privileged, and the Stack is set to Main.
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics. 
-  * All rights reserved.</center></h2>
-  *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the 
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
-  *
-  ******************************************************************************
-  */
-
-  .syntax unified
-	.cpu cortex-m4
-	.fpu softvfp
-	.thumb
-
-.global	g_pfnVectors
-.global	Default_Handler
-
-/* start address for the initialization values of the .data section.
-defined in linker script */
-.word	_sidata
-/* start address for the .data section. defined in linker script */
-.word	_sdata
-/* end address for the .data section. defined in linker script */
-.word	_edata
-/* start address for the .bss section. defined in linker script */
-.word	_sbss
-/* end address for the .bss section. defined in linker script */
-.word	_ebss
-/* start address for the .MB_MEM2 section. defined in linker script */
-.word _sMB_MEM2
-/* end address for the .MB_MEM2 section. defined in linker script */
-.word _eMB_MEM2
-
-/* INIT_BSS macro is used to fill the specified region [start : end] with zeros */
-.macro INIT_BSS start, end
-  ldr r0, =\start
-  ldr r1, =\end
-  movs r3, #0
-  bl LoopFillZerobss
-.endm
-
-/* INIT_DATA macro is used to copy data in the region [start : end] starting from 'src' */
-.macro INIT_DATA start, end, src
-  ldr r0, =\start
-  ldr r1, =\end
-  ldr r2, =\src
-  movs r3, #0
-  bl LoopCopyDataInit
-.endm
-
-.section  .text.data_initializers
-CopyDataInit:
-  ldr r4, [r2, r3]
-  str r4, [r0, r3]
-  adds r3, r3, #4
-
-LoopCopyDataInit:
-  adds r4, r0, r3
-  cmp r4, r1
-  bcc  CopyDataInit
-  bx lr
-
-FillZerobss:
-  str  r3, [r0]
-  adds r0, r0, #4
-
-LoopFillZerobss:
-  cmp r0, r1
-  bcc FillZerobss
-  bx lr
-
-  .section .text.Reset_Handler
-  .weak Reset_Handler
-  .type Reset_Handler, %function
-Reset_Handler:
-  ldr   r0, =_estack
-  mov   sp, r0          /* set stack pointer */
-/* Call the clock system intitialization function.*/
-  bl  SystemInit
-
-/* Copy the data segment initializers from flash to SRAM */
-  INIT_DATA _sdata, _edata, _sidata
-
-/* Zero fill the bss segments. */
-  INIT_BSS _sbss, _ebss
-  INIT_BSS _sMB_MEM2, _eMB_MEM2
-
-/* Call static constructors */
-  bl __libc_init_array
-/* Call the application s entry point.*/
-	bl	main
-
-LoopForever:
-  b LoopForever
-    
-.size	Reset_Handler, .-Reset_Handler
-
-/**
- * @brief  This is the code that gets called when the processor receives an
- *         unexpected interrupt.  This simply enters an infinite loop, preserving
- *         the system state for examination by a debugger.
- *
- * @param  None
- * @retval None
-*/
-  .section .text.Default_Handler,"ax",%progbits
-Default_Handler:
-Infinite_Loop:
-	b	Infinite_Loop
-	.size	Default_Handler, .-Default_Handler
-/******************************************************************************
-*
-* The minimal vector table for a Cortex-M4.  Note that the proper constructs
-* must be placed on this to ensure that it ends up at physical address
-* 0x0000.0000.
-*
-******************************************************************************/
- 	.section	.isr_vector,"a",%progbits
-	.type	g_pfnVectors, %object
-	.size	g_pfnVectors, .-g_pfnVectors
-
-
-g_pfnVectors:
-  .word _estack
-  .word Reset_Handler
-	.word	NMI_Handler
-  .word HardFault_Handler
-  .word MemManage_Handler
-  .word BusFault_Handler
-  .word UsageFault_Handler
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word SVC_Handler
-  .word DebugMon_Handler
-  .word 0
-  .word PendSV_Handler
-  .word SysTick_Handler
-  .word WWDG_IRQHandler
-  .word PVD_PVM_IRQHandler
-  .word TAMP_STAMP_LSECSS_IRQHandler
-  .word RTC_WKUP_IRQHandler
-  .word FLASH_IRQHandler
-  .word RCC_IRQHandler
-  .word EXTI0_IRQHandler
-  .word EXTI1_IRQHandler
-  .word EXTI2_IRQHandler
-  .word EXTI3_IRQHandler
-  .word EXTI4_IRQHandler
-  .word DMA1_Channel1_IRQHandler
-  .word DMA1_Channel2_IRQHandler
-  .word DMA1_Channel3_IRQHandler
-  .word DMA1_Channel4_IRQHandler
-  .word DMA1_Channel5_IRQHandler
-  .word DMA1_Channel6_IRQHandler
-  .word DMA1_Channel7_IRQHandler
-  .word ADC1_IRQHandler
-  .word USB_HP_IRQHandler
-  .word USB_LP_IRQHandler
-  .word C2SEV_PWR_C2H_IRQHandler
-  .word COMP_IRQHandler
-  .word EXTI9_5_IRQHandler
-  .word TIM1_BRK_IRQHandler
-  .word TIM1_UP_TIM16_IRQHandler
-  .word TIM1_TRG_COM_TIM17_IRQHandler
-  .word TIM1_CC_IRQHandler
-  .word TIM2_IRQHandler
-  .word PKA_IRQHandler
-  .word I2C1_EV_IRQHandler
-  .word I2C1_ER_IRQHandler
-  .word I2C3_EV_IRQHandler
-  .word I2C3_ER_IRQHandler
-  .word SPI1_IRQHandler
-  .word SPI2_IRQHandler
-  .word USART1_IRQHandler
-  .word LPUART1_IRQHandler
-  .word SAI1_IRQHandler
-  .word TSC_IRQHandler
-  .word EXTI15_10_IRQHandler
-  .word RTC_Alarm_IRQHandler
-  .word CRS_IRQHandler
-  .word PWR_SOTF_BLEACT_802ACT_RFPHASE_IRQHandler
-  .word IPCC_C1_RX_IRQHandler
-  .word IPCC_C1_TX_IRQHandler
-  .word HSEM_IRQHandler
-  .word LPTIM1_IRQHandler
-  .word LPTIM2_IRQHandler
-  .word LCD_IRQHandler
-  .word QUADSPI_IRQHandler
-  .word AES1_IRQHandler
-  .word AES2_IRQHandler
-  .word RNG_IRQHandler
-  .word FPU_IRQHandler
-  .word DMA2_Channel1_IRQHandler
-  .word DMA2_Channel2_IRQHandler
-  .word DMA2_Channel3_IRQHandler
-  .word DMA2_Channel4_IRQHandler
-  .word DMA2_Channel5_IRQHandler
-  .word DMA2_Channel6_IRQHandler
-  .word DMA2_Channel7_IRQHandler
-  .word DMAMUX1_OVR_IRQHandler
-
-/*******************************************************************************
-*
-* Provide weak aliases for each Exception handler to the Default_Handler.
-* As they are weak aliases, any function with the same name will override
-* this definition.
-*
-*******************************************************************************/
-  .weak	NMI_Handler
-  .thumb_set NMI_Handler,Default_Handler
-  
-  .weak  HardFault_Handler
-  .thumb_set HardFault_Handler,Default_Handler
-
-  .weak  MemManage_Handler
-  .thumb_set MemManage_Handler,Default_Handler
-
-  .weak  BusFault_Handler
-  .thumb_set BusFault_Handler,Default_Handler
-
-  .weak  UsageFault_Handler
-  .thumb_set UsageFault_Handler,Default_Handler
-
-  .weak  SVC_Handler
-  .thumb_set SVC_Handler,Default_Handler
-
-  .weak  DebugMon_Handler
-  .thumb_set DebugMon_Handler,Default_Handler
-
-  .weak  PendSV_Handler
-  .thumb_set PendSV_Handler,Default_Handler
-
-  .weak  SysTick_Handler
-  .thumb_set SysTick_Handler,Default_Handler
-
-  .weak  WWDG_IRQHandler
-  .thumb_set WWDG_IRQHandler,Default_Handler
-
-  .weak  PVD_PVM_IRQHandler
-  .thumb_set PVD_PVM_IRQHandler,Default_Handler
-
-  .weak  TAMP_STAMP_LSECSS_IRQHandler
-  .thumb_set TAMP_STAMP_LSECSS_IRQHandler,Default_Handler
-
-  .weak  RTC_WKUP_IRQHandler
-  .thumb_set RTC_WKUP_IRQHandler,Default_Handler
-
-  .weak  FLASH_IRQHandler
-  .thumb_set FLASH_IRQHandler,Default_Handler
-
-  .weak  RCC_IRQHandler
-  .thumb_set RCC_IRQHandler,Default_Handler
-
-  .weak  EXTI0_IRQHandler
-  .thumb_set EXTI0_IRQHandler,Default_Handler
-
-  .weak  EXTI1_IRQHandler
-  .thumb_set EXTI1_IRQHandler,Default_Handler
-
-  .weak  EXTI2_IRQHandler
-  .thumb_set EXTI2_IRQHandler,Default_Handler
-
-  .weak  EXTI3_IRQHandler
-  .thumb_set EXTI3_IRQHandler,Default_Handler
-
-  .weak  EXTI4_IRQHandler
-  .thumb_set EXTI4_IRQHandler,Default_Handler
-
-  .weak  DMA1_Channel1_IRQHandler
-  .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
-
-  .weak  DMA1_Channel2_IRQHandler
-  .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
-
-  .weak  DMA1_Channel3_IRQHandler
-  .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
-
-  .weak  DMA1_Channel4_IRQHandler
-  .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
-
-  .weak  DMA1_Channel5_IRQHandler
-  .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
-
-  .weak  DMA1_Channel6_IRQHandler
-  .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
-
-  .weak  DMA1_Channel7_IRQHandler
-  .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
-
-  .weak  ADC1_IRQHandler
-  .thumb_set ADC1_IRQHandler,Default_Handler
-
-  .weak  USB_HP_IRQHandler
-  .thumb_set USB_HP_IRQHandler,Default_Handler
-
-  .weak  USB_LP_IRQHandler
-  .thumb_set USB_LP_IRQHandler,Default_Handler
-
-  .weak  C2SEV_PWR_C2H_IRQHandler
-  .thumb_set C2SEV_PWR_C2H_IRQHandler,Default_Handler
-
-  .weak  COMP_IRQHandler
-  .thumb_set COMP_IRQHandler,Default_Handler
-
-  .weak  EXTI9_5_IRQHandler
-  .thumb_set EXTI9_5_IRQHandler,Default_Handler
-
-  .weak  TIM1_BRK_IRQHandler
-  .thumb_set TIM1_BRK_IRQHandler,Default_Handler
-
-  .weak  TIM1_UP_TIM16_IRQHandler
-  .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
-
-  .weak  TIM1_TRG_COM_TIM17_IRQHandler
-  .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
-
-  .weak  TIM1_CC_IRQHandler
-  .thumb_set TIM1_CC_IRQHandler,Default_Handler
-
-  .weak  TIM2_IRQHandler
-  .thumb_set TIM2_IRQHandler,Default_Handler
-
-  .weak  PKA_IRQHandler
-  .thumb_set PKA_IRQHandler,Default_Handler
-
-  .weak  I2C1_EV_IRQHandler
-  .thumb_set I2C1_EV_IRQHandler,Default_Handler
-
-  .weak  I2C1_ER_IRQHandler
-  .thumb_set I2C1_ER_IRQHandler,Default_Handler
-
-  .weak  I2C3_EV_IRQHandler
-  .thumb_set I2C3_EV_IRQHandler,Default_Handler
-
-  .weak  I2C3_ER_IRQHandler
-  .thumb_set I2C3_ER_IRQHandler,Default_Handler
-
-  .weak  SPI1_IRQHandler
-  .thumb_set SPI1_IRQHandler,Default_Handler
-
-  .weak  SPI2_IRQHandler
-  .thumb_set SPI2_IRQHandler,Default_Handler
-
-  .weak  USART1_IRQHandler
-  .thumb_set USART1_IRQHandler,Default_Handler
-
-  .weak  LPUART1_IRQHandler
-  .thumb_set LPUART1_IRQHandler,Default_Handler
-
-  .weak  SAI1_IRQHandler
-  .thumb_set SAI1_IRQHandler,Default_Handler
-
-  .weak  TSC_IRQHandler
-  .thumb_set TSC_IRQHandler,Default_Handler
-
-  .weak  EXTI15_10_IRQHandler
-  .thumb_set EXTI15_10_IRQHandler,Default_Handler
-
-  .weak  RTC_Alarm_IRQHandler
-  .thumb_set RTC_Alarm_IRQHandler,Default_Handler
-
-  .weak  CRS_IRQHandler
-  .thumb_set CRS_IRQHandler,Default_Handler
-
-  .weak  PWR_SOTF_BLEACT_802ACT_RFPHASE_IRQHandler
-  .thumb_set PWR_SOTF_BLEACT_802ACT_RFPHASE_IRQHandler,Default_Handler
-
-  .weak  IPCC_C1_RX_IRQHandler
-  .thumb_set IPCC_C1_RX_IRQHandler,Default_Handler
-
-  .weak  IPCC_C1_TX_IRQHandler
-  .thumb_set IPCC_C1_TX_IRQHandler,Default_Handler
-
-  .weak  HSEM_IRQHandler
-  .thumb_set HSEM_IRQHandler,Default_Handler
-
-  .weak  LPTIM1_IRQHandler
-  .thumb_set LPTIM1_IRQHandler,Default_Handler
-
-  .weak  LPTIM2_IRQHandler
-  .thumb_set LPTIM2_IRQHandler,Default_Handler
-
-  .weak  LCD_IRQHandler
-  .thumb_set LCD_IRQHandler,Default_Handler
-
-  .weak  QUADSPI_IRQHandler
-  .thumb_set QUADSPI_IRQHandler,Default_Handler
-
-  .weak  AES1_IRQHandler
-  .thumb_set AES1_IRQHandler,Default_Handler
-
-  .weak  AES2_IRQHandler
-  .thumb_set AES2_IRQHandler,Default_Handler
-
-  .weak  RNG_IRQHandler
-  .thumb_set RNG_IRQHandler,Default_Handler
-
-  .weak  FPU_IRQHandler
-  .thumb_set FPU_IRQHandler,Default_Handler
-
-  .weak  DMA2_Channel1_IRQHandler
-  .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
-
-  .weak  DMA2_Channel2_IRQHandler
-  .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
-
-  .weak  DMA2_Channel3_IRQHandler
-  .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
-
-  .weak  DMA2_Channel4_IRQHandler
-  .thumb_set DMA2_Channel4_IRQHandler,Default_Handler
-
-  .weak  DMA2_Channel5_IRQHandler
-  .thumb_set DMA2_Channel5_IRQHandler,Default_Handler
-
-  .weak  DMA2_Channel6_IRQHandler
-  .thumb_set DMA2_Channel6_IRQHandler,Default_Handler
-
-  .weak  DMA2_Channel7_IRQHandler
-  .thumb_set DMA2_Channel7_IRQHandler,Default_Handler
-
-  .weak  DMAMUX1_OVR_IRQHandler
-  .thumb_set DMAMUX1_OVR_IRQHandler,Default_Handler
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+/**
+  ******************************************************************************
+  * @file      startup_stm32wb55xx_cm4.s
+  * @author    MCD Application Team
+  * @brief     STM32WB55xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics. 
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the 
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+/* start address for the .MB_MEM2 section. defined in linker script */
+.word _sMB_MEM2
+/* end address for the .MB_MEM2 section. defined in linker script */
+.word _eMB_MEM2
+
+/* INIT_BSS macro is used to fill the specified region [start : end] with zeros */
+.macro INIT_BSS start, end
+  ldr r0, =\start
+  ldr r1, =\end
+  movs r3, #0
+  bl LoopFillZerobss
+.endm
+
+/* INIT_DATA macro is used to copy data in the region [start : end] starting from 'src' */
+.macro INIT_DATA start, end, src
+  ldr r0, =\start
+  ldr r1, =\end
+  ldr r2, =\src
+  movs r3, #0
+  bl LoopCopyDataInit
+.endm
+
+.section  .text.data_initializers
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc  CopyDataInit
+  bx lr
+
+FillZerobss:
+  str  r3, [r0]
+  adds r0, r0, #4
+
+LoopFillZerobss:
+  cmp r0, r1
+  bcc FillZerobss
+  bx lr
+
+  .section .text.Reset_Handler
+  .weak Reset_Handler
+  .type Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+/* Call the clock system intitialization function.*/
+  bl  SystemInit
+
+/* Copy the data segment initializers from flash to SRAM */
+  INIT_DATA _sdata, _edata, _sidata
+
+/* Zero fill the bss segments. */
+  INIT_BSS _sbss, _ebss
+  INIT_BSS _sMB_MEM2, _eMB_MEM2
+
+/* Call static constructors */
+  bl __libc_init_array
+/* Call the application s entry point.*/
+	bl	main
+
+LoopForever:
+  b LoopForever
+    
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval None
+*/
+  .section .text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+	.size	g_pfnVectors, .-g_pfnVectors
+
+
+g_pfnVectors:
+  .word _estack
+  .word Reset_Handler
+	.word	NMI_Handler
+  .word HardFault_Handler
+  .word MemManage_Handler
+  .word BusFault_Handler
+  .word UsageFault_Handler
+  .word 0
+  .word 0
+  .word 0
+  .word 0
+  .word SVC_Handler
+  .word DebugMon_Handler
+  .word 0
+  .word PendSV_Handler
+  .word SysTick_Handler
+  .word WWDG_IRQHandler
+  .word PVD_PVM_IRQHandler
+  .word TAMP_STAMP_LSECSS_IRQHandler
+  .word RTC_WKUP_IRQHandler
+  .word FLASH_IRQHandler
+  .word RCC_IRQHandler
+  .word EXTI0_IRQHandler
+  .word EXTI1_IRQHandler
+  .word EXTI2_IRQHandler
+  .word EXTI3_IRQHandler
+  .word EXTI4_IRQHandler
+  .word DMA1_Channel1_IRQHandler
+  .word DMA1_Channel2_IRQHandler
+  .word DMA1_Channel3_IRQHandler
+  .word DMA1_Channel4_IRQHandler
+  .word DMA1_Channel5_IRQHandler
+  .word DMA1_Channel6_IRQHandler
+  .word DMA1_Channel7_IRQHandler
+  .word ADC1_IRQHandler
+  .word USB_HP_IRQHandler
+  .word USB_LP_IRQHandler
+  .word C2SEV_PWR_C2H_IRQHandler
+  .word COMP_IRQHandler
+  .word EXTI9_5_IRQHandler
+  .word TIM1_BRK_IRQHandler
+  .word TIM1_UP_TIM16_IRQHandler
+  .word TIM1_TRG_COM_TIM17_IRQHandler
+  .word TIM1_CC_IRQHandler
+  .word TIM2_IRQHandler
+  .word PKA_IRQHandler
+  .word I2C1_EV_IRQHandler
+  .word I2C1_ER_IRQHandler
+  .word I2C3_EV_IRQHandler
+  .word I2C3_ER_IRQHandler
+  .word SPI1_IRQHandler
+  .word SPI2_IRQHandler
+  .word USART1_IRQHandler
+  .word LPUART1_IRQHandler
+  .word SAI1_IRQHandler
+  .word TSC_IRQHandler
+  .word EXTI15_10_IRQHandler
+  .word RTC_Alarm_IRQHandler
+  .word CRS_IRQHandler
+  .word PWR_SOTF_BLEACT_802ACT_RFPHASE_IRQHandler
+  .word IPCC_C1_RX_IRQHandler
+  .word IPCC_C1_TX_IRQHandler
+  .word HSEM_IRQHandler
+  .word LPTIM1_IRQHandler
+  .word LPTIM2_IRQHandler
+  .word LCD_IRQHandler
+  .word QUADSPI_IRQHandler
+  .word AES1_IRQHandler
+  .word AES2_IRQHandler
+  .word RNG_IRQHandler
+  .word FPU_IRQHandler
+  .word DMA2_Channel1_IRQHandler
+  .word DMA2_Channel2_IRQHandler
+  .word DMA2_Channel3_IRQHandler
+  .word DMA2_Channel4_IRQHandler
+  .word DMA2_Channel5_IRQHandler
+  .word DMA2_Channel6_IRQHandler
+  .word DMA2_Channel7_IRQHandler
+  .word DMAMUX1_OVR_IRQHandler
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+  .weak	NMI_Handler
+  .thumb_set NMI_Handler,Default_Handler
+  
+  .weak  HardFault_Handler
+  .thumb_set HardFault_Handler,Default_Handler
+
+  .weak  MemManage_Handler
+  .thumb_set MemManage_Handler,Default_Handler
+
+  .weak  BusFault_Handler
+  .thumb_set BusFault_Handler,Default_Handler
+
+  .weak  UsageFault_Handler
+  .thumb_set UsageFault_Handler,Default_Handler
+
+  .weak  SVC_Handler
+  .thumb_set SVC_Handler,Default_Handler
+
+  .weak  DebugMon_Handler
+  .thumb_set DebugMon_Handler,Default_Handler
+
+  .weak  PendSV_Handler
+  .thumb_set PendSV_Handler,Default_Handler
+
+  .weak  SysTick_Handler
+  .thumb_set SysTick_Handler,Default_Handler
+
+  .weak  WWDG_IRQHandler
+  .thumb_set WWDG_IRQHandler,Default_Handler
+
+  .weak  PVD_PVM_IRQHandler
+  .thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+  .weak  TAMP_STAMP_LSECSS_IRQHandler
+  .thumb_set TAMP_STAMP_LSECSS_IRQHandler,Default_Handler
+
+  .weak  RTC_WKUP_IRQHandler
+  .thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+  .weak  FLASH_IRQHandler
+  .thumb_set FLASH_IRQHandler,Default_Handler
+
+  .weak  RCC_IRQHandler
+  .thumb_set RCC_IRQHandler,Default_Handler
+
+  .weak  EXTI0_IRQHandler
+  .thumb_set EXTI0_IRQHandler,Default_Handler
+
+  .weak  EXTI1_IRQHandler
+  .thumb_set EXTI1_IRQHandler,Default_Handler
+
+  .weak  EXTI2_IRQHandler
+  .thumb_set EXTI2_IRQHandler,Default_Handler
+
+  .weak  EXTI3_IRQHandler
+  .thumb_set EXTI3_IRQHandler,Default_Handler
+
+  .weak  EXTI4_IRQHandler
+  .thumb_set EXTI4_IRQHandler,Default_Handler
+
+  .weak  DMA1_Channel1_IRQHandler
+  .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+  .weak  DMA1_Channel2_IRQHandler
+  .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+  .weak  DMA1_Channel3_IRQHandler
+  .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+  .weak  DMA1_Channel4_IRQHandler
+  .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+  .weak  DMA1_Channel5_IRQHandler
+  .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+  .weak  DMA1_Channel6_IRQHandler
+  .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+  .weak  DMA1_Channel7_IRQHandler
+  .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+  .weak  ADC1_IRQHandler
+  .thumb_set ADC1_IRQHandler,Default_Handler
+
+  .weak  USB_HP_IRQHandler
+  .thumb_set USB_HP_IRQHandler,Default_Handler
+
+  .weak  USB_LP_IRQHandler
+  .thumb_set USB_LP_IRQHandler,Default_Handler
+
+  .weak  C2SEV_PWR_C2H_IRQHandler
+  .thumb_set C2SEV_PWR_C2H_IRQHandler,Default_Handler
+
+  .weak  COMP_IRQHandler
+  .thumb_set COMP_IRQHandler,Default_Handler
+
+  .weak  EXTI9_5_IRQHandler
+  .thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+  .weak  TIM1_BRK_IRQHandler
+  .thumb_set TIM1_BRK_IRQHandler,Default_Handler
+
+  .weak  TIM1_UP_TIM16_IRQHandler
+  .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+  .weak  TIM1_TRG_COM_TIM17_IRQHandler
+  .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+  .weak  TIM1_CC_IRQHandler
+  .thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+  .weak  TIM2_IRQHandler
+  .thumb_set TIM2_IRQHandler,Default_Handler
+
+  .weak  PKA_IRQHandler
+  .thumb_set PKA_IRQHandler,Default_Handler
+
+  .weak  I2C1_EV_IRQHandler
+  .thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+  .weak  I2C1_ER_IRQHandler
+  .thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+  .weak  I2C3_EV_IRQHandler
+  .thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+  .weak  I2C3_ER_IRQHandler
+  .thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+  .weak  SPI1_IRQHandler
+  .thumb_set SPI1_IRQHandler,Default_Handler
+
+  .weak  SPI2_IRQHandler
+  .thumb_set SPI2_IRQHandler,Default_Handler
+
+  .weak  USART1_IRQHandler
+  .thumb_set USART1_IRQHandler,Default_Handler
+
+  .weak  LPUART1_IRQHandler
+  .thumb_set LPUART1_IRQHandler,Default_Handler
+
+  .weak  SAI1_IRQHandler
+  .thumb_set SAI1_IRQHandler,Default_Handler
+
+  .weak  TSC_IRQHandler
+  .thumb_set TSC_IRQHandler,Default_Handler
+
+  .weak  EXTI15_10_IRQHandler
+  .thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+  .weak  RTC_Alarm_IRQHandler
+  .thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+  .weak  CRS_IRQHandler
+  .thumb_set CRS_IRQHandler,Default_Handler
+
+  .weak  PWR_SOTF_BLEACT_802ACT_RFPHASE_IRQHandler
+  .thumb_set PWR_SOTF_BLEACT_802ACT_RFPHASE_IRQHandler,Default_Handler
+
+  .weak  IPCC_C1_RX_IRQHandler
+  .thumb_set IPCC_C1_RX_IRQHandler,Default_Handler
+
+  .weak  IPCC_C1_TX_IRQHandler
+  .thumb_set IPCC_C1_TX_IRQHandler,Default_Handler
+
+  .weak  HSEM_IRQHandler
+  .thumb_set HSEM_IRQHandler,Default_Handler
+
+  .weak  LPTIM1_IRQHandler
+  .thumb_set LPTIM1_IRQHandler,Default_Handler
+
+  .weak  LPTIM2_IRQHandler
+  .thumb_set LPTIM2_IRQHandler,Default_Handler
+
+  .weak  LCD_IRQHandler
+  .thumb_set LCD_IRQHandler,Default_Handler
+
+  .weak  QUADSPI_IRQHandler
+  .thumb_set QUADSPI_IRQHandler,Default_Handler
+
+  .weak  AES1_IRQHandler
+  .thumb_set AES1_IRQHandler,Default_Handler
+
+  .weak  AES2_IRQHandler
+  .thumb_set AES2_IRQHandler,Default_Handler
+
+  .weak  RNG_IRQHandler
+  .thumb_set RNG_IRQHandler,Default_Handler
+
+  .weak  FPU_IRQHandler
+  .thumb_set FPU_IRQHandler,Default_Handler
+
+  .weak  DMA2_Channel1_IRQHandler
+  .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+  .weak  DMA2_Channel2_IRQHandler
+  .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+  .weak  DMA2_Channel3_IRQHandler
+  .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+  .weak  DMA2_Channel4_IRQHandler
+  .thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+  .weak  DMA2_Channel5_IRQHandler
+  .thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+  .weak  DMA2_Channel6_IRQHandler
+  .thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+  .weak  DMA2_Channel7_IRQHandler
+  .thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+  .weak  DMAMUX1_OVR_IRQHandler
+  .thumb_set DMAMUX1_OVR_IRQHandler,Default_Handler
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/firmware/targets/f3/f3-1/stm32wb55xx_flash_cm4.ld b/firmware/targets/f3/f3-1/stm32wb55xx_flash_cm4.ld
index c8946a8e..07beda76 100644
--- a/firmware/targets/f3/f3-1/stm32wb55xx_flash_cm4.ld
+++ b/firmware/targets/f3/f3-1/stm32wb55xx_flash_cm4.ld
@@ -49,8 +49,8 @@ ENTRY(Reset_Handler)
 /* Highest address of the user mode stack */
 _estack = 0x20030000;    /* end of RAM */
 /* Generate a link error if heap and stack don't fit into RAM */
-_Min_Heap_Size = 0x200;      /* required amount of heap  */
-_Min_Stack_Size = 0x400; /* required amount of stack */
+_Min_Heap_Size = 0x400;      /* required amount of heap  */
+_Min_Stack_Size = 0x1000; /* required amount of stack */
 
 /* Specify the memory areas */
 MEMORY
diff --git a/firmware/targets/f3/f3-1/stm32wb55xx_flash_cm4_boot.ld b/firmware/targets/f3/f3-1/stm32wb55xx_flash_cm4_boot.ld
index c8946a8e..07beda76 100644
--- a/firmware/targets/f3/f3-1/stm32wb55xx_flash_cm4_boot.ld
+++ b/firmware/targets/f3/f3-1/stm32wb55xx_flash_cm4_boot.ld
@@ -49,8 +49,8 @@ ENTRY(Reset_Handler)
 /* Highest address of the user mode stack */
 _estack = 0x20030000;    /* end of RAM */
 /* Generate a link error if heap and stack don't fit into RAM */
-_Min_Heap_Size = 0x200;      /* required amount of heap  */
-_Min_Stack_Size = 0x400; /* required amount of stack */
+_Min_Heap_Size = 0x400;      /* required amount of heap  */
+_Min_Stack_Size = 0x1000; /* required amount of stack */
 
 /* Specify the memory areas */
 MEMORY
diff --git a/firmware/targets/f3/f3.ioc b/firmware/targets/f3/f3.ioc
index 177bdde6..ab4ecb90 100644
--- a/firmware/targets/f3/f3.ioc
+++ b/firmware/targets/f3/f3.ioc
@@ -8,6 +8,7 @@ PB10.GPIO_PuPd=GPIO_PULLUP
 RF1.Signal=RF_RF1
 SPI2.VirtualType=VM_MASTER
 VP_ADC1_TempSens_Input.Mode=IN-TempSens
+VP_AES1_VS_AES.Signal=AES1_VS_AES
 PC12.Locked=true
 TIM1.IPParameters=Channel-Output Compare1 CH1N,Channel-PWM Generation3 CH3N
 PC12.Signal=GPIO_Output
@@ -48,6 +49,7 @@ PD0.Signal=GPIO_Output
 VP_TIM2_VS_ClockSourceINT.Signal=TIM2_VS_ClockSourceINT
 RCC.PREFETCH_ENABLE=1
 PB13.Locked=true
+VP_AES2_VS_AES.Signal=AES2_VS_AES
 NVIC.EXTI15_10_IRQn=true\:5\:0\:true\:false\:true\:false\:true\:true
 ProjectManager.ProjectBuild=false
 NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
@@ -60,9 +62,9 @@ RCC.RTCClockSelection=RCC_RTCCLKSOURCE_LSE
 SH.GPXTI12.0=GPIO_EXTI12
 PD1.GPIO_Label=SPI_D_SCK
 PB12.GPIO_Label=BUTTON_RIGHT
-ProjectManager.FirmwarePackage=STM32Cube FW_WB V1.9.0
+ProjectManager.FirmwarePackage=STM32Cube FW_WB V1.10.0
 VP_ADC1_Vref_Input.Mode=IN-Vrefint
-MxDb.Version=DB.6.0.0
+MxDb.Version=DB.6.0.10
 PB0.GPIOParameters=GPIO_Label
 PA1.GPIOParameters=GPIO_Speed,PinState,GPIO_Label,GPIO_ModeDefaultOutputPP
 ProjectManager.BackupPrevious=false
@@ -78,14 +80,14 @@ PA8.Signal=GPXTI8
 RCC.PLLRCLKFreq_Value=64000000
 SH.GPXTI11.ConfNb=1
 PB6.Locked=true
-NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:false\:false\:false\:false
+NVIC.PendSV_IRQn=true\:15\:0\:false\:false\:false\:true\:false\:false
 ProjectManager.HalAssertFull=false
-ADC1.SamplingTime-0\#ChannelRegularConversion=ADC_SAMPLETIME_2CYCLES_5
 VP_TIM1_VS_ClockSourceINT.Mode=Internal
+ADC1.SamplingTime-0\#ChannelRegularConversion=ADC_SAMPLETIME_2CYCLES_5
 TIM16.Pulse=145
 PA0.Signal=S_TIM2_CH1
 PH3-BOOT0.Signal=GPIO_Analog
-NVIC.HSEM_IRQn=true\:5\:0\:true\:false\:true\:true\:false\:true
+NVIC.HSEM_IRQn=true\:5\:0\:true\:false\:true\:false\:false\:true
 PB9.Signal=TIM1_CH3N
 Mcu.Package=VFQFPN68
 TIM2.Prescaler=64-1
@@ -95,6 +97,7 @@ SPI2.Mode=SPI_MODE_MASTER
 PA2.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_OD
 SH.GPXTI11.0=GPIO_EXTI11
 SH.GPXTI8.0=GPIO_EXTI8
+VP_PKA_VS_PKA.Mode=PKA_Activate
 PA14.Locked=true
 SH.GPXTI8.ConfNb=1
 NVIC.TimeBaseIP=TIM17
@@ -104,7 +107,7 @@ VP_RTC_VS_RTC_Calendar.Mode=RTC_Calendar
 FREERTOS.FootprintOK=true
 PA5.GPIOParameters=GPIO_Label
 PA1.PinState=GPIO_PIN_SET
-NVIC.USB_LP_IRQn=true\:5\:0\:true\:false\:true\:true\:false\:true
+NVIC.USB_LP_IRQn=true\:5\:0\:true\:false\:true\:false\:false\:true
 PB14.GPIOParameters=GPIO_Label
 VP_HSEM_VS_HSEM.Mode=HSEM_Activate
 NVIC.EXTI2_IRQn=true\:5\:0\:true\:false\:true\:false\:true\:true
@@ -134,7 +137,7 @@ PA3.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_OD
 FREERTOS.Tasks01=defaultTask,24,1024,StartDefaultTask,Default,NULL,Dynamic,NULL,NULL;app_main,8,1024,app,As external,NULL,Dynamic,NULL,NULL
 ADC1.Rank-0\#ChannelRegularConversion=1
 PA15.GPIOParameters=GPIO_PuPd,GPIO_Label
-Mcu.PinsNb=64
+Mcu.PinsNb=69
 PC11.Locked=true
 VP_SYS_VS_tim17.Mode=TIM17
 ADC1.IPParameters=Rank-0\#ChannelRegularConversion,Channel-0\#ChannelRegularConversion,SamplingTime-0\#ChannelRegularConversion,OffsetNumber-0\#ChannelRegularConversion,NbrOfConversionFlag,master,EnableAnalogWatchDog1,ContinuousConvMode
@@ -152,14 +155,19 @@ SH.S_TIM16_CH1.0=TIM16_CH1,PWM Generation1 CH1
 VP_TIM16_VS_ClockSourceINT.Mode=Enable_Timer
 SPI1.CLKPhase=SPI_PHASE_2EDGE
 OSC_IN.Locked=true
+Mcu.Pin68=VP_USB_DEVICE_VS_USB_DEVICE_CDC_FS
 RCC.HCLK2Freq_Value=32000000
 PC0.Signal=GPIO_Analog
 PC14-OSC32_IN.Signal=RCC_OSC32_IN
 PC11.GPIOParameters=PinState,GPIO_Label
-Mcu.Pin62=VP_TIM16_VS_ClockSourceINT
-Mcu.Pin63=VP_USB_DEVICE_VS_USB_DEVICE_CDC_FS
-Mcu.Pin60=VP_TIM1_VS_ClockSourceINT
-Mcu.Pin61=VP_TIM2_VS_ClockSourceINT
+Mcu.Pin62=VP_RTC_VS_RTC_Activate
+Mcu.Pin63=VP_RTC_VS_RTC_Calendar
+Mcu.Pin60=VP_PKA_VS_PKA
+Mcu.Pin61=VP_RNG_VS_RNG
+Mcu.Pin66=VP_TIM2_VS_ClockSourceINT
+Mcu.Pin67=VP_TIM16_VS_ClockSourceINT
+Mcu.Pin64=VP_SYS_VS_tim17
+Mcu.Pin65=VP_TIM1_VS_ClockSourceINT
 PD0.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
 PC3.GPIOParameters=GPIO_Label
 PB8.GPIO_Label=SPEAKER
@@ -167,19 +175,20 @@ PA11.Locked=true
 PA15.Locked=true
 PA8.GPIO_Label=RFID_PULL
 PC15-OSC32_OUT.Locked=true
-Mcu.Pin59=VP_SYS_VS_tim17
+Mcu.Pin59=VP_HSEM_VS_HSEM
 SH.GPXTI2.ConfNb=1
-Mcu.Pin57=VP_RTC_VS_RTC_Activate
-Mcu.Pin58=VP_RTC_VS_RTC_Calendar
+Mcu.Pin57=VP_CRC_VS_CRC
+Mcu.Pin58=VP_FREERTOS_VS_CMSIS_V2
 PC12.PinState=GPIO_PIN_SET
 USB_DEVICE.PRODUCT_STRING_CDC_FS=Flipper Control Virtual ComPort
 Mcu.Pin51=PB7
 Mcu.Pin52=VP_ADC1_TempSens_Input
 Mcu.Pin50=PB6
-Mcu.Pin55=VP_FREERTOS_VS_CMSIS_V2
-Mcu.Pin56=VP_HSEM_VS_HSEM
+VP_CRC_VS_CRC.Signal=CRC_VS_CRC
+Mcu.Pin55=VP_AES2_VS_AES
+Mcu.Pin56=VP_COMP1_VS_VREFINT14
 Mcu.Pin53=VP_ADC1_Vref_Input
-Mcu.Pin54=VP_COMP1_VS_VREFINT14
+Mcu.Pin54=VP_AES1_VS_AES
 PC6.Locked=true
 PA9.Signal=I2C1_SCL
 VP_TIM1_VS_ClockSourceINT.Signal=TIM1_VS_ClockSourceINT
@@ -202,9 +211,11 @@ Mcu.Pin44=PC12
 Mcu.Pin45=PD0
 Mcu.Pin42=PC10
 Mcu.Pin43=PC11
+VP_PKA_VS_PKA.Signal=PKA_VS_PKA
 RCC.Cortex2Freq_Value=32000000
 ProjectManager.LastFirmware=true
 PD1.Mode=TX_Only_Simplex_Unidirect_Master
+RCC.RNGCLockSelection=RCC_RNGCLKSOURCE_CLK48
 Mcu.Pin37=PA11
 PB4.GPIO_Label=SPI_R_MISO
 PCC.Ble.DataLength=6
@@ -216,7 +227,7 @@ Mcu.Pin36=PA10
 SPI1.Mode=SPI_MODE_MASTER
 Mcu.Pin39=PA13
 RCC.LCDFreq_Value=32768
-RCC.RNGFreq_Value=32000
+RCC.RNGFreq_Value=16000000
 PC2.GPIOParameters=GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultEXTI
 VP_ADC1_TempSens_Input.Signal=ADC1_TempSens_Input
 Mcu.Pin30=PE4
@@ -258,7 +269,7 @@ NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
 PC12.GPIO_Label=SD_CS
 ProjectManager.CompilerOptimize=6
 PA11.Signal=USB_DM
-ProjectManager.HeapSize=0x200
+ProjectManager.HeapSize=0x400
 PA0.GPIOParameters=GPIO_Label
 Mcu.Pin15=PA5
 NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
@@ -282,6 +293,7 @@ PA3.PinState=GPIO_PIN_SET
 PE4.PinState=GPIO_PIN_SET
 RCC.PWRFreq_Value=64000000
 SPI2.DataSize=SPI_DATASIZE_8BIT
+VP_AES1_VS_AES.Mode=AES_Activate
 SH.SharedAnalog_PC5.ConfNb=2
 SH.GPXTI1.ConfNb=1
 PB12.GPIO_PuPd=GPIO_PULLUP
@@ -301,13 +313,13 @@ TIM2.Channel-Input_Capture1_from_TI1=TIM_CHANNEL_1
 ProjectManager.KeepUserCode=true
 Mcu.UserName=STM32WB55RGVx
 ADC1.ContinuousConvMode=DISABLE
-RCC.RFWKPFreq_Value=976.5625
+RCC.RFWKPFreq_Value=32768
 PC10.Signal=GPIO_Analog
 RCC.PLLSAI1RoutputFreq_Value=48000000
 PC5.Locked=true
 PA0.GPIO_Label=IR_RX
 PA12.GPIOParameters=GPIO_Speed
-ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_ADC1_Init-ADC1-false-HAL-true,4-MX_I2C1_Init-I2C1-false-HAL-true,5-MX_RTC_Init-RTC-false-HAL-true,6-MX_SPI1_Init-SPI1-false-HAL-true,7-MX_SPI2_Init-SPI2-false-HAL-true,8-MX_USART1_UART_Init-USART1-false-HAL-true,9-MX_USB_Device_Init-USB_DEVICE-false-HAL-false,10-MX_TIM1_Init-TIM1-false-HAL-true,11-MX_TIM2_Init-TIM2-false-HAL-true,12-MX_TIM16_Init-TIM16-false-HAL-true,13-MX_COMP1_Init-COMP1-false-HAL-true,14-MX_RF_Init-RF-false-HAL-true,0-MX_HSEM_Init-HSEM-false-HAL-true
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_ADC1_Init-ADC1-false-HAL-true,4-MX_I2C1_Init-I2C1-false-HAL-true,5-MX_RTC_Init-RTC-false-HAL-true,6-MX_SPI1_Init-SPI1-false-HAL-true,7-MX_SPI2_Init-SPI2-false-HAL-true,8-MX_USART1_UART_Init-USART1-false-HAL-true,9-MX_USB_Device_Init-USB_DEVICE-false-HAL-false,10-MX_TIM1_Init-TIM1-false-HAL-true,11-MX_TIM2_Init-TIM2-false-HAL-true,12-MX_TIM16_Init-TIM16-false-HAL-true,13-MX_COMP1_Init-COMP1-false-HAL-true,14-MX_RF_Init-RF-false-HAL-true,15-MX_PKA_Init-PKA-false-HAL-true,16-MX_RNG_Init-RNG-false-HAL-true,17-MX_AES1_Init-AES1-false-HAL-true,18-MX_AES2_Init-AES2-false-HAL-true,19-MX_CRC_Init-CRC-false-HAL-true,0-MX_HSEM_Init-HSEM-false-HAL-true
 PC0.GPIOParameters=GPIO_Label
 PA9.GPIOParameters=GPIO_Speed,GPIO_Label
 PA2.GPIO_Speed=GPIO_SPEED_FREQ_LOW
@@ -324,23 +336,23 @@ PB13.GPIO_Label=RFID_OUT
 PB11.Signal=GPXTI11
 PB15.Signal=SPI2_MOSI
 OSC_OUT.GPIOParameters=GPIO_Label
-ProjectManager.StackSize=0x400
+ProjectManager.StackSize=0x1000
 PB5.GPIOParameters=GPIO_Label
 VP_FREERTOS_VS_CMSIS_V2.Mode=CMSIS_V2
 SH.GPXTI2.0=GPIO_EXTI2
 RCC.I2C3Freq_Value=64000000
-Mcu.IP4=I2C1
-Mcu.IP5=NVIC
+Mcu.IP4=CRC
+Mcu.IP5=FREERTOS
 RCC.FCLKCortexFreq_Value=64000000
 USB_DEVICE.MANUFACTURER_STRING=Flipper
-Mcu.IP2=FREERTOS
+Mcu.IP2=AES2
 I2C1.IPParameters=Timing,CustomTiming
-Mcu.IP3=HSEM
+Mcu.IP3=COMP1
 PA15.GPIO_Label=DISPLAY_BACKLIGHT
 PB4.GPIOParameters=GPIO_Label
 Mcu.IP0=ADC1
 PA12.Locked=true
-Mcu.IP1=COMP1
+Mcu.IP1=AES1
 PA12.Signal=USB_DP
 PE4.GPIOParameters=GPIO_Speed,PinState,GPIO_Label
 Mcu.UserConstants=
@@ -351,7 +363,7 @@ SH.GPXTI13.ConfNb=1
 Mcu.ThirdPartyNb=0
 PB1.GPIO_PuPd=GPIO_PULLUP
 RCC.HCLKFreq_Value=64000000
-Mcu.IPNb=18
+Mcu.IPNb=23
 ProjectManager.PreviousToolchain=
 PB1.GPIO_ModeDefaultEXTI=GPIO_MODE_IT_RISING_FALLING
 PA8.GPIOParameters=GPIO_Label
@@ -377,18 +389,20 @@ RCC.FCLK2Freq_Value=32000000
 FREERTOS.configUSE_TIMERS=1
 NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
 PH3-BOOT0.GPIOParameters=GPIO_Label
-Mcu.IP10=SPI2
-NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:false\:false\:false\:false
-Mcu.IP12=TIM1
-Mcu.IP11=SYS
-Mcu.IP17=USB_DEVICE
+Mcu.IP10=RCC
+NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:false\:true\:false\:true
+Mcu.IP12=RNG
+Mcu.IP11=RF
+Mcu.IP18=TIM2
+Mcu.IP17=TIM1
 NVIC.TIM1_TRG_COM_TIM17_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true
 PA2.PinState=GPIO_PIN_SET
-Mcu.IP14=TIM16
+Mcu.IP19=TIM16
+Mcu.IP14=SPI1
 PB4.Mode=Full_Duplex_Master
-Mcu.IP13=TIM2
-Mcu.IP16=USB
-Mcu.IP15=USART1
+Mcu.IP13=RTC
+Mcu.IP16=SYS
+Mcu.IP15=SPI2
 PC14-OSC32_IN.Mode=LSE-External-Oscillator
 RCC.VCOInputFreq_Value=16000000
 PD0.PinState=GPIO_PIN_SET
@@ -402,7 +416,10 @@ PC13.GPIO_PuPd=GPIO_PULLUP
 PB3.GPIOParameters=GPIO_Label
 SH.S_TIM2_CH1.ConfNb=2
 PB7.Signal=USART1_RX
+Mcu.IP21=USB
 PB8.Locked=true
+Mcu.IP20=USART1
+Mcu.IP22=USB_DEVICE
 PE4.Signal=GPIO_Output
 PB0.Locked=true
 FREERTOS.configTOTAL_HEAP_SIZE=40960
@@ -423,6 +440,7 @@ SPI2.CLKPhase=SPI_PHASE_1EDGE
 PA10.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
 PB5.GPIO_Label=SPI_R_MOSI
 PC4.Locked=true
+VP_AES2_VS_AES.Mode=AES_Activate
 PC14-OSC32_IN.GPIO_Label=QUARTZ_32MHZ_IN
 SPI2.Direction=SPI_DIRECTION_2LINES
 PC5.Signal=SharedAnalog_PC5
@@ -460,6 +478,7 @@ VP_HSEM_VS_HSEM.Signal=HSEM_VS_HSEM
 OSC_IN.GPIOParameters=GPIO_Label
 PB12.Locked=true
 ProjectManager.DeletePrevious=true
+VP_RNG_VS_RNG.Mode=RNG_Activate
 PB10.Locked=true
 USB_DEVICE.IPParameters=VirtualMode,VirtualModeFS,CLASS_NAME_FS,MANUFACTURER_STRING,PRODUCT_STRING_CDC_FS,APP_RX_DATA_SIZE,APP_TX_DATA_SIZE
 TIM16.Channel=TIM_CHANNEL_1
@@ -476,6 +495,7 @@ TIM1.Channel-Output\ Compare1\ CH1N=TIM_CHANNEL_1
 FREERTOS.configRECORD_STACK_HIGH_ADDRESS=1
 ProjectManager.TargetToolchain=Makefile
 PB10.GPIO_Label=BUTTON_UP
+VP_RNG_VS_RNG.Signal=RNG_VS_RNG
 VP_USB_DEVICE_VS_USB_DEVICE_CDC_FS.Mode=CDC_FS
 RCC.HCLKRFFreq_Value=16000000
 PC5.GPIOParameters=GPIO_Label
@@ -502,7 +522,7 @@ NVIC.SavedSystickIrqHandlerGenerated=true
 RCC.APB2Freq_Value=64000000
 PC11.PinState=GPIO_PIN_SET
 COMP1.IPParameters=TriggerMode,Hysteresis,Mode
-MxCube.Version=6.0.1
+MxCube.Version=6.1.0
 VP_TIM2_VS_ClockSourceINT.Mode=Internal
 PC13.GPIOParameters=GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultEXTI
 PA1.GPIO_Speed=GPIO_SPEED_FREQ_LOW
@@ -517,16 +537,17 @@ OSC_OUT.Locked=true
 PA4.GPIOParameters=GPIO_Label
 PC2.GPIO_PuPd=GPIO_PULLUP
 PB15.GPIOParameters=GPIO_Label
-RCC.IPParameters=ADCFreq_Value,AHB2CLKDivider,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,APB3Freq_Value,Cortex2Freq_Value,CortexFreq_Value,EnbaleCSS,FCLK2Freq_Value,FCLKCortexFreq_Value,FamilyName,HCLK2Freq_Value,HCLK3Freq_Value,HCLKFreq_Value,HCLKRFFreq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C3Freq_Value,LCDFreq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSI_VALUE,MCO1PinFreq_Value,MSIOscState,PLLM,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PLLSAI1N,PLLSAI1PoutputFreq_Value,PLLSAI1QoutputFreq_Value,PLLSAI1RoutputFreq_Value,PLLSourceVirtual,PREFETCH_ENABLE,PWRFreq_Value,RFWKPFreq_Value,RNGFreq_Value,RTCClockSelection,RTCFreq_Value,SAI1Freq_Value,SMPS1Freq_Value,SMPSCLockSelectionVirtual,SMPSFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,USART1Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VCOSAI1OutputFreq_Value
+RCC.IPParameters=ADCFreq_Value,AHB2CLKDivider,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,APB3Freq_Value,Cortex2Freq_Value,CortexFreq_Value,EnableCSSLSE,EnbaleCSS,FCLK2Freq_Value,FCLKCortexFreq_Value,FamilyName,HCLK2Freq_Value,HCLK3Freq_Value,HCLKFreq_Value,HCLKRFFreq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C3Freq_Value,LCDFreq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSI_VALUE,MCO1PinFreq_Value,MSIOscState,PLLM,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PLLSAI1N,PLLSAI1PoutputFreq_Value,PLLSAI1QoutputFreq_Value,PLLSAI1RoutputFreq_Value,PLLSourceVirtual,PREFETCH_ENABLE,PWRFreq_Value,RFWKPClockSelection,RFWKPFreq_Value,RNGCLockSelection,RNGFreq_Value,RTCClockSelection,RTCFreq_Value,SAI1Freq_Value,SMPS1Freq_Value,SMPSCLockSelectionVirtual,SMPSFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,USART1Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VCOSAI1OutputFreq_Value
 ProjectManager.AskForMigrate=true
 Mcu.Name=STM32WB55RGVx
 NVIC.SavedPendsvIrqHandlerGenerated=false
+RCC.EnableCSSLSE=true
 PA2.Signal=GPIO_Output
-Mcu.IP8=RTC
+Mcu.IP8=NVIC
 VP_FREERTOS_VS_CMSIS_V2.Signal=FREERTOS_VS_CMSIS_V2
-Mcu.IP9=SPI1
-Mcu.IP6=RCC
-Mcu.IP7=RF
+Mcu.IP9=PKA
+Mcu.IP6=HSEM
+Mcu.IP7=I2C1
 ProjectManager.CoupleFile=true
 PB3.Signal=SPI1_SCK
 RCC.SYSCLKFreq_VALUE=64000000
@@ -557,7 +578,9 @@ PB8.Signal=S_TIM16_CH1
 PA9.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
 TIM16.IPParameters=Channel,Pulse,Prescaler,Period
 RCC.APB1Freq_Value=64000000
+RCC.RFWKPClockSelection=RCC_RFWKPCLKSOURCE_LSE
 PC12.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
+VP_CRC_VS_CRC.Mode=CRC_Activate
 USB_DEVICE.VirtualMode=Cdc
 PB11.Locked=true
 ProjectManager.DeviceId=STM32WB55RGVx
diff --git a/firmware/targets/f3/startup_stm32wb55xx_cm4.s b/firmware/targets/f3/startup_stm32wb55xx_cm4.s
index 295f58d9..fc26cb42 100644
--- a/firmware/targets/f3/startup_stm32wb55xx_cm4.s
+++ b/firmware/targets/f3/startup_stm32wb55xx_cm4.s
@@ -1,445 +1,445 @@
-/**
-  ******************************************************************************
-  * @file      startup_stm32wb55xx_cm4.s
-  * @author    MCD Application Team
-  * @brief     STM32WB55xx devices vector table GCC toolchain.
-  *            This module performs:
-  *                - Set the initial SP
-  *                - Set the initial PC == Reset_Handler,
-  *                - Set the vector table entries with the exceptions ISR address
-  *                - Branches to main in the C library (which eventually
-  *                  calls main()).
-  *            After Reset the Cortex-M4 processor is in Thread mode,
-  *            priority is Privileged, and the Stack is set to Main.
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics. 
-  * All rights reserved.</center></h2>
-  *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the 
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
-  *
-  ******************************************************************************
-  */
-
-  .syntax unified
-	.cpu cortex-m4
-	.fpu softvfp
-	.thumb
-
-.global	g_pfnVectors
-.global	Default_Handler
-
-/* start address for the initialization values of the .data section.
-defined in linker script */
-.word	_sidata
-/* start address for the .data section. defined in linker script */
-.word	_sdata
-/* end address for the .data section. defined in linker script */
-.word	_edata
-/* start address for the .bss section. defined in linker script */
-.word	_sbss
-/* end address for the .bss section. defined in linker script */
-.word	_ebss
-/* start address for the .MB_MEM2 section. defined in linker script */
-.word _sMB_MEM2
-/* end address for the .MB_MEM2 section. defined in linker script */
-.word _eMB_MEM2
-
-/* INIT_BSS macro is used to fill the specified region [start : end] with zeros */
-.macro INIT_BSS start, end
-  ldr r0, =\start
-  ldr r1, =\end
-  movs r3, #0
-  bl LoopFillZerobss
-.endm
-
-/* INIT_DATA macro is used to copy data in the region [start : end] starting from 'src' */
-.macro INIT_DATA start, end, src
-  ldr r0, =\start
-  ldr r1, =\end
-  ldr r2, =\src
-  movs r3, #0
-  bl LoopCopyDataInit
-.endm
-
-.section  .text.data_initializers
-CopyDataInit:
-  ldr r4, [r2, r3]
-  str r4, [r0, r3]
-  adds r3, r3, #4
-
-LoopCopyDataInit:
-  adds r4, r0, r3
-  cmp r4, r1
-  bcc  CopyDataInit
-  bx lr
-
-FillZerobss:
-  str  r3, [r0]
-  adds r0, r0, #4
-
-LoopFillZerobss:
-  cmp r0, r1
-  bcc FillZerobss
-  bx lr
-
-  .section .text.Reset_Handler
-  .weak Reset_Handler
-  .type Reset_Handler, %function
-Reset_Handler:
-  ldr   r0, =_estack
-  mov   sp, r0          /* set stack pointer */
-/* Call the clock system intitialization function.*/
-  bl  SystemInit
-
-/* Copy the data segment initializers from flash to SRAM */
-  INIT_DATA _sdata, _edata, _sidata
-
-/* Zero fill the bss segments. */
-  INIT_BSS _sbss, _ebss
-  INIT_BSS _sMB_MEM2, _eMB_MEM2
-
-/* Call static constructors */
-  bl __libc_init_array
-/* Call the application s entry point.*/
-	bl	main
-
-LoopForever:
-  b LoopForever
-    
-.size	Reset_Handler, .-Reset_Handler
-
-/**
- * @brief  This is the code that gets called when the processor receives an
- *         unexpected interrupt.  This simply enters an infinite loop, preserving
- *         the system state for examination by a debugger.
- *
- * @param  None
- * @retval None
-*/
-  .section .text.Default_Handler,"ax",%progbits
-Default_Handler:
-Infinite_Loop:
-	b	Infinite_Loop
-	.size	Default_Handler, .-Default_Handler
-/******************************************************************************
-*
-* The minimal vector table for a Cortex-M4.  Note that the proper constructs
-* must be placed on this to ensure that it ends up at physical address
-* 0x0000.0000.
-*
-******************************************************************************/
- 	.section	.isr_vector,"a",%progbits
-	.type	g_pfnVectors, %object
-	.size	g_pfnVectors, .-g_pfnVectors
-
-
-g_pfnVectors:
-  .word _estack
-  .word Reset_Handler
-	.word	NMI_Handler
-  .word HardFault_Handler
-  .word MemManage_Handler
-  .word BusFault_Handler
-  .word UsageFault_Handler
-  .word 0
-  .word 0
-  .word 0
-  .word 0
-  .word SVC_Handler
-  .word DebugMon_Handler
-  .word 0
-  .word PendSV_Handler
-  .word SysTick_Handler
-  .word WWDG_IRQHandler
-  .word PVD_PVM_IRQHandler
-  .word TAMP_STAMP_LSECSS_IRQHandler
-  .word RTC_WKUP_IRQHandler
-  .word FLASH_IRQHandler
-  .word RCC_IRQHandler
-  .word EXTI0_IRQHandler
-  .word EXTI1_IRQHandler
-  .word EXTI2_IRQHandler
-  .word EXTI3_IRQHandler
-  .word EXTI4_IRQHandler
-  .word DMA1_Channel1_IRQHandler
-  .word DMA1_Channel2_IRQHandler
-  .word DMA1_Channel3_IRQHandler
-  .word DMA1_Channel4_IRQHandler
-  .word DMA1_Channel5_IRQHandler
-  .word DMA1_Channel6_IRQHandler
-  .word DMA1_Channel7_IRQHandler
-  .word ADC1_IRQHandler
-  .word USB_HP_IRQHandler
-  .word USB_LP_IRQHandler
-  .word C2SEV_PWR_C2H_IRQHandler
-  .word COMP_IRQHandler
-  .word EXTI9_5_IRQHandler
-  .word TIM1_BRK_IRQHandler
-  .word TIM1_UP_TIM16_IRQHandler
-  .word TIM1_TRG_COM_TIM17_IRQHandler
-  .word TIM1_CC_IRQHandler
-  .word TIM2_IRQHandler
-  .word PKA_IRQHandler
-  .word I2C1_EV_IRQHandler
-  .word I2C1_ER_IRQHandler
-  .word I2C3_EV_IRQHandler
-  .word I2C3_ER_IRQHandler
-  .word SPI1_IRQHandler
-  .word SPI2_IRQHandler
-  .word USART1_IRQHandler
-  .word LPUART1_IRQHandler
-  .word SAI1_IRQHandler
-  .word TSC_IRQHandler
-  .word EXTI15_10_IRQHandler
-  .word RTC_Alarm_IRQHandler
-  .word CRS_IRQHandler
-  .word PWR_SOTF_BLEACT_802ACT_RFPHASE_IRQHandler
-  .word IPCC_C1_RX_IRQHandler
-  .word IPCC_C1_TX_IRQHandler
-  .word HSEM_IRQHandler
-  .word LPTIM1_IRQHandler
-  .word LPTIM2_IRQHandler
-  .word LCD_IRQHandler
-  .word QUADSPI_IRQHandler
-  .word AES1_IRQHandler
-  .word AES2_IRQHandler
-  .word RNG_IRQHandler
-  .word FPU_IRQHandler
-  .word DMA2_Channel1_IRQHandler
-  .word DMA2_Channel2_IRQHandler
-  .word DMA2_Channel3_IRQHandler
-  .word DMA2_Channel4_IRQHandler
-  .word DMA2_Channel5_IRQHandler
-  .word DMA2_Channel6_IRQHandler
-  .word DMA2_Channel7_IRQHandler
-  .word DMAMUX1_OVR_IRQHandler
-
-/*******************************************************************************
-*
-* Provide weak aliases for each Exception handler to the Default_Handler.
-* As they are weak aliases, any function with the same name will override
-* this definition.
-*
-*******************************************************************************/
-  .weak	NMI_Handler
-  .thumb_set NMI_Handler,Default_Handler
-  
-  .weak  HardFault_Handler
-  .thumb_set HardFault_Handler,Default_Handler
-
-  .weak  MemManage_Handler
-  .thumb_set MemManage_Handler,Default_Handler
-
-  .weak  BusFault_Handler
-  .thumb_set BusFault_Handler,Default_Handler
-
-  .weak  UsageFault_Handler
-  .thumb_set UsageFault_Handler,Default_Handler
-
-  .weak  SVC_Handler
-  .thumb_set SVC_Handler,Default_Handler
-
-  .weak  DebugMon_Handler
-  .thumb_set DebugMon_Handler,Default_Handler
-
-  .weak  PendSV_Handler
-  .thumb_set PendSV_Handler,Default_Handler
-
-  .weak  SysTick_Handler
-  .thumb_set SysTick_Handler,Default_Handler
-
-  .weak  WWDG_IRQHandler
-  .thumb_set WWDG_IRQHandler,Default_Handler
-
-  .weak  PVD_PVM_IRQHandler
-  .thumb_set PVD_PVM_IRQHandler,Default_Handler
-
-  .weak  TAMP_STAMP_LSECSS_IRQHandler
-  .thumb_set TAMP_STAMP_LSECSS_IRQHandler,Default_Handler
-
-  .weak  RTC_WKUP_IRQHandler
-  .thumb_set RTC_WKUP_IRQHandler,Default_Handler
-
-  .weak  FLASH_IRQHandler
-  .thumb_set FLASH_IRQHandler,Default_Handler
-
-  .weak  RCC_IRQHandler
-  .thumb_set RCC_IRQHandler,Default_Handler
-
-  .weak  EXTI0_IRQHandler
-  .thumb_set EXTI0_IRQHandler,Default_Handler
-
-  .weak  EXTI1_IRQHandler
-  .thumb_set EXTI1_IRQHandler,Default_Handler
-
-  .weak  EXTI2_IRQHandler
-  .thumb_set EXTI2_IRQHandler,Default_Handler
-
-  .weak  EXTI3_IRQHandler
-  .thumb_set EXTI3_IRQHandler,Default_Handler
-
-  .weak  EXTI4_IRQHandler
-  .thumb_set EXTI4_IRQHandler,Default_Handler
-
-  .weak  DMA1_Channel1_IRQHandler
-  .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
-
-  .weak  DMA1_Channel2_IRQHandler
-  .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
-
-  .weak  DMA1_Channel3_IRQHandler
-  .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
-
-  .weak  DMA1_Channel4_IRQHandler
-  .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
-
-  .weak  DMA1_Channel5_IRQHandler
-  .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
-
-  .weak  DMA1_Channel6_IRQHandler
-  .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
-
-  .weak  DMA1_Channel7_IRQHandler
-  .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
-
-  .weak  ADC1_IRQHandler
-  .thumb_set ADC1_IRQHandler,Default_Handler
-
-  .weak  USB_HP_IRQHandler
-  .thumb_set USB_HP_IRQHandler,Default_Handler
-
-  .weak  USB_LP_IRQHandler
-  .thumb_set USB_LP_IRQHandler,Default_Handler
-
-  .weak  C2SEV_PWR_C2H_IRQHandler
-  .thumb_set C2SEV_PWR_C2H_IRQHandler,Default_Handler
-
-  .weak  COMP_IRQHandler
-  .thumb_set COMP_IRQHandler,Default_Handler
-
-  .weak  EXTI9_5_IRQHandler
-  .thumb_set EXTI9_5_IRQHandler,Default_Handler
-
-  .weak  TIM1_BRK_IRQHandler
-  .thumb_set TIM1_BRK_IRQHandler,Default_Handler
-
-  .weak  TIM1_UP_TIM16_IRQHandler
-  .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
-
-  .weak  TIM1_TRG_COM_TIM17_IRQHandler
-  .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
-
-  .weak  TIM1_CC_IRQHandler
-  .thumb_set TIM1_CC_IRQHandler,Default_Handler
-
-  .weak  TIM2_IRQHandler
-  .thumb_set TIM2_IRQHandler,Default_Handler
-
-  .weak  PKA_IRQHandler
-  .thumb_set PKA_IRQHandler,Default_Handler
-
-  .weak  I2C1_EV_IRQHandler
-  .thumb_set I2C1_EV_IRQHandler,Default_Handler
-
-  .weak  I2C1_ER_IRQHandler
-  .thumb_set I2C1_ER_IRQHandler,Default_Handler
-
-  .weak  I2C3_EV_IRQHandler
-  .thumb_set I2C3_EV_IRQHandler,Default_Handler
-
-  .weak  I2C3_ER_IRQHandler
-  .thumb_set I2C3_ER_IRQHandler,Default_Handler
-
-  .weak  SPI1_IRQHandler
-  .thumb_set SPI1_IRQHandler,Default_Handler
-
-  .weak  SPI2_IRQHandler
-  .thumb_set SPI2_IRQHandler,Default_Handler
-
-  .weak  USART1_IRQHandler
-  .thumb_set USART1_IRQHandler,Default_Handler
-
-  .weak  LPUART1_IRQHandler
-  .thumb_set LPUART1_IRQHandler,Default_Handler
-
-  .weak  SAI1_IRQHandler
-  .thumb_set SAI1_IRQHandler,Default_Handler
-
-  .weak  TSC_IRQHandler
-  .thumb_set TSC_IRQHandler,Default_Handler
-
-  .weak  EXTI15_10_IRQHandler
-  .thumb_set EXTI15_10_IRQHandler,Default_Handler
-
-  .weak  RTC_Alarm_IRQHandler
-  .thumb_set RTC_Alarm_IRQHandler,Default_Handler
-
-  .weak  CRS_IRQHandler
-  .thumb_set CRS_IRQHandler,Default_Handler
-
-  .weak  PWR_SOTF_BLEACT_802ACT_RFPHASE_IRQHandler
-  .thumb_set PWR_SOTF_BLEACT_802ACT_RFPHASE_IRQHandler,Default_Handler
-
-  .weak  IPCC_C1_RX_IRQHandler
-  .thumb_set IPCC_C1_RX_IRQHandler,Default_Handler
-
-  .weak  IPCC_C1_TX_IRQHandler
-  .thumb_set IPCC_C1_TX_IRQHandler,Default_Handler
-
-  .weak  HSEM_IRQHandler
-  .thumb_set HSEM_IRQHandler,Default_Handler
-
-  .weak  LPTIM1_IRQHandler
-  .thumb_set LPTIM1_IRQHandler,Default_Handler
-
-  .weak  LPTIM2_IRQHandler
-  .thumb_set LPTIM2_IRQHandler,Default_Handler
-
-  .weak  LCD_IRQHandler
-  .thumb_set LCD_IRQHandler,Default_Handler
-
-  .weak  QUADSPI_IRQHandler
-  .thumb_set QUADSPI_IRQHandler,Default_Handler
-
-  .weak  AES1_IRQHandler
-  .thumb_set AES1_IRQHandler,Default_Handler
-
-  .weak  AES2_IRQHandler
-  .thumb_set AES2_IRQHandler,Default_Handler
-
-  .weak  RNG_IRQHandler
-  .thumb_set RNG_IRQHandler,Default_Handler
-
-  .weak  FPU_IRQHandler
-  .thumb_set FPU_IRQHandler,Default_Handler
-
-  .weak  DMA2_Channel1_IRQHandler
-  .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
-
-  .weak  DMA2_Channel2_IRQHandler
-  .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
-
-  .weak  DMA2_Channel3_IRQHandler
-  .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
-
-  .weak  DMA2_Channel4_IRQHandler
-  .thumb_set DMA2_Channel4_IRQHandler,Default_Handler
-
-  .weak  DMA2_Channel5_IRQHandler
-  .thumb_set DMA2_Channel5_IRQHandler,Default_Handler
-
-  .weak  DMA2_Channel6_IRQHandler
-  .thumb_set DMA2_Channel6_IRQHandler,Default_Handler
-
-  .weak  DMA2_Channel7_IRQHandler
-  .thumb_set DMA2_Channel7_IRQHandler,Default_Handler
-
-  .weak  DMAMUX1_OVR_IRQHandler
-  .thumb_set DMAMUX1_OVR_IRQHandler,Default_Handler
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+/**
+  ******************************************************************************
+  * @file      startup_stm32wb55xx_cm4.s
+  * @author    MCD Application Team
+  * @brief     STM32WB55xx devices vector table GCC toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M4 processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics. 
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under BSD 3-Clause license,
+  * the "License"; You may not use this file except in compliance with the 
+  * License. You may obtain a copy of the License at:
+  *                        opensource.org/licenses/BSD-3-Clause
+  *
+  ******************************************************************************
+  */
+
+  .syntax unified
+	.cpu cortex-m4
+	.fpu softvfp
+	.thumb
+
+.global	g_pfnVectors
+.global	Default_Handler
+
+/* start address for the initialization values of the .data section.
+defined in linker script */
+.word	_sidata
+/* start address for the .data section. defined in linker script */
+.word	_sdata
+/* end address for the .data section. defined in linker script */
+.word	_edata
+/* start address for the .bss section. defined in linker script */
+.word	_sbss
+/* end address for the .bss section. defined in linker script */
+.word	_ebss
+/* start address for the .MB_MEM2 section. defined in linker script */
+.word _sMB_MEM2
+/* end address for the .MB_MEM2 section. defined in linker script */
+.word _eMB_MEM2
+
+/* INIT_BSS macro is used to fill the specified region [start : end] with zeros */
+.macro INIT_BSS start, end
+  ldr r0, =\start
+  ldr r1, =\end
+  movs r3, #0
+  bl LoopFillZerobss
+.endm
+
+/* INIT_DATA macro is used to copy data in the region [start : end] starting from 'src' */
+.macro INIT_DATA start, end, src
+  ldr r0, =\start
+  ldr r1, =\end
+  ldr r2, =\src
+  movs r3, #0
+  bl LoopCopyDataInit
+.endm
+
+.section  .text.data_initializers
+CopyDataInit:
+  ldr r4, [r2, r3]
+  str r4, [r0, r3]
+  adds r3, r3, #4
+
+LoopCopyDataInit:
+  adds r4, r0, r3
+  cmp r4, r1
+  bcc  CopyDataInit
+  bx lr
+
+FillZerobss:
+  str  r3, [r0]
+  adds r0, r0, #4
+
+LoopFillZerobss:
+  cmp r0, r1
+  bcc FillZerobss
+  bx lr
+
+  .section .text.Reset_Handler
+  .weak Reset_Handler
+  .type Reset_Handler, %function
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
+/* Call the clock system intitialization function.*/
+  bl  SystemInit
+
+/* Copy the data segment initializers from flash to SRAM */
+  INIT_DATA _sdata, _edata, _sidata
+
+/* Zero fill the bss segments. */
+  INIT_BSS _sbss, _ebss
+  INIT_BSS _sMB_MEM2, _eMB_MEM2
+
+/* Call static constructors */
+  bl __libc_init_array
+/* Call the application s entry point.*/
+	bl	main
+
+LoopForever:
+  b LoopForever
+    
+.size	Reset_Handler, .-Reset_Handler
+
+/**
+ * @brief  This is the code that gets called when the processor receives an
+ *         unexpected interrupt.  This simply enters an infinite loop, preserving
+ *         the system state for examination by a debugger.
+ *
+ * @param  None
+ * @retval None
+*/
+  .section .text.Default_Handler,"ax",%progbits
+Default_Handler:
+Infinite_Loop:
+	b	Infinite_Loop
+	.size	Default_Handler, .-Default_Handler
+/******************************************************************************
+*
+* The minimal vector table for a Cortex-M4.  Note that the proper constructs
+* must be placed on this to ensure that it ends up at physical address
+* 0x0000.0000.
+*
+******************************************************************************/
+ 	.section	.isr_vector,"a",%progbits
+	.type	g_pfnVectors, %object
+	.size	g_pfnVectors, .-g_pfnVectors
+
+
+g_pfnVectors:
+  .word _estack
+  .word Reset_Handler
+	.word	NMI_Handler
+  .word HardFault_Handler
+  .word MemManage_Handler
+  .word BusFault_Handler
+  .word UsageFault_Handler
+  .word 0
+  .word 0
+  .word 0
+  .word 0
+  .word SVC_Handler
+  .word DebugMon_Handler
+  .word 0
+  .word PendSV_Handler
+  .word SysTick_Handler
+  .word WWDG_IRQHandler
+  .word PVD_PVM_IRQHandler
+  .word TAMP_STAMP_LSECSS_IRQHandler
+  .word RTC_WKUP_IRQHandler
+  .word FLASH_IRQHandler
+  .word RCC_IRQHandler
+  .word EXTI0_IRQHandler
+  .word EXTI1_IRQHandler
+  .word EXTI2_IRQHandler
+  .word EXTI3_IRQHandler
+  .word EXTI4_IRQHandler
+  .word DMA1_Channel1_IRQHandler
+  .word DMA1_Channel2_IRQHandler
+  .word DMA1_Channel3_IRQHandler
+  .word DMA1_Channel4_IRQHandler
+  .word DMA1_Channel5_IRQHandler
+  .word DMA1_Channel6_IRQHandler
+  .word DMA1_Channel7_IRQHandler
+  .word ADC1_IRQHandler
+  .word USB_HP_IRQHandler
+  .word USB_LP_IRQHandler
+  .word C2SEV_PWR_C2H_IRQHandler
+  .word COMP_IRQHandler
+  .word EXTI9_5_IRQHandler
+  .word TIM1_BRK_IRQHandler
+  .word TIM1_UP_TIM16_IRQHandler
+  .word TIM1_TRG_COM_TIM17_IRQHandler
+  .word TIM1_CC_IRQHandler
+  .word TIM2_IRQHandler
+  .word PKA_IRQHandler
+  .word I2C1_EV_IRQHandler
+  .word I2C1_ER_IRQHandler
+  .word I2C3_EV_IRQHandler
+  .word I2C3_ER_IRQHandler
+  .word SPI1_IRQHandler
+  .word SPI2_IRQHandler
+  .word USART1_IRQHandler
+  .word LPUART1_IRQHandler
+  .word SAI1_IRQHandler
+  .word TSC_IRQHandler
+  .word EXTI15_10_IRQHandler
+  .word RTC_Alarm_IRQHandler
+  .word CRS_IRQHandler
+  .word PWR_SOTF_BLEACT_802ACT_RFPHASE_IRQHandler
+  .word IPCC_C1_RX_IRQHandler
+  .word IPCC_C1_TX_IRQHandler
+  .word HSEM_IRQHandler
+  .word LPTIM1_IRQHandler
+  .word LPTIM2_IRQHandler
+  .word LCD_IRQHandler
+  .word QUADSPI_IRQHandler
+  .word AES1_IRQHandler
+  .word AES2_IRQHandler
+  .word RNG_IRQHandler
+  .word FPU_IRQHandler
+  .word DMA2_Channel1_IRQHandler
+  .word DMA2_Channel2_IRQHandler
+  .word DMA2_Channel3_IRQHandler
+  .word DMA2_Channel4_IRQHandler
+  .word DMA2_Channel5_IRQHandler
+  .word DMA2_Channel6_IRQHandler
+  .word DMA2_Channel7_IRQHandler
+  .word DMAMUX1_OVR_IRQHandler
+
+/*******************************************************************************
+*
+* Provide weak aliases for each Exception handler to the Default_Handler.
+* As they are weak aliases, any function with the same name will override
+* this definition.
+*
+*******************************************************************************/
+  .weak	NMI_Handler
+  .thumb_set NMI_Handler,Default_Handler
+  
+  .weak  HardFault_Handler
+  .thumb_set HardFault_Handler,Default_Handler
+
+  .weak  MemManage_Handler
+  .thumb_set MemManage_Handler,Default_Handler
+
+  .weak  BusFault_Handler
+  .thumb_set BusFault_Handler,Default_Handler
+
+  .weak  UsageFault_Handler
+  .thumb_set UsageFault_Handler,Default_Handler
+
+  .weak  SVC_Handler
+  .thumb_set SVC_Handler,Default_Handler
+
+  .weak  DebugMon_Handler
+  .thumb_set DebugMon_Handler,Default_Handler
+
+  .weak  PendSV_Handler
+  .thumb_set PendSV_Handler,Default_Handler
+
+  .weak  SysTick_Handler
+  .thumb_set SysTick_Handler,Default_Handler
+
+  .weak  WWDG_IRQHandler
+  .thumb_set WWDG_IRQHandler,Default_Handler
+
+  .weak  PVD_PVM_IRQHandler
+  .thumb_set PVD_PVM_IRQHandler,Default_Handler
+
+  .weak  TAMP_STAMP_LSECSS_IRQHandler
+  .thumb_set TAMP_STAMP_LSECSS_IRQHandler,Default_Handler
+
+  .weak  RTC_WKUP_IRQHandler
+  .thumb_set RTC_WKUP_IRQHandler,Default_Handler
+
+  .weak  FLASH_IRQHandler
+  .thumb_set FLASH_IRQHandler,Default_Handler
+
+  .weak  RCC_IRQHandler
+  .thumb_set RCC_IRQHandler,Default_Handler
+
+  .weak  EXTI0_IRQHandler
+  .thumb_set EXTI0_IRQHandler,Default_Handler
+
+  .weak  EXTI1_IRQHandler
+  .thumb_set EXTI1_IRQHandler,Default_Handler
+
+  .weak  EXTI2_IRQHandler
+  .thumb_set EXTI2_IRQHandler,Default_Handler
+
+  .weak  EXTI3_IRQHandler
+  .thumb_set EXTI3_IRQHandler,Default_Handler
+
+  .weak  EXTI4_IRQHandler
+  .thumb_set EXTI4_IRQHandler,Default_Handler
+
+  .weak  DMA1_Channel1_IRQHandler
+  .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
+
+  .weak  DMA1_Channel2_IRQHandler
+  .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
+
+  .weak  DMA1_Channel3_IRQHandler
+  .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
+
+  .weak  DMA1_Channel4_IRQHandler
+  .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
+
+  .weak  DMA1_Channel5_IRQHandler
+  .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
+
+  .weak  DMA1_Channel6_IRQHandler
+  .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
+
+  .weak  DMA1_Channel7_IRQHandler
+  .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
+
+  .weak  ADC1_IRQHandler
+  .thumb_set ADC1_IRQHandler,Default_Handler
+
+  .weak  USB_HP_IRQHandler
+  .thumb_set USB_HP_IRQHandler,Default_Handler
+
+  .weak  USB_LP_IRQHandler
+  .thumb_set USB_LP_IRQHandler,Default_Handler
+
+  .weak  C2SEV_PWR_C2H_IRQHandler
+  .thumb_set C2SEV_PWR_C2H_IRQHandler,Default_Handler
+
+  .weak  COMP_IRQHandler
+  .thumb_set COMP_IRQHandler,Default_Handler
+
+  .weak  EXTI9_5_IRQHandler
+  .thumb_set EXTI9_5_IRQHandler,Default_Handler
+
+  .weak  TIM1_BRK_IRQHandler
+  .thumb_set TIM1_BRK_IRQHandler,Default_Handler
+
+  .weak  TIM1_UP_TIM16_IRQHandler
+  .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
+
+  .weak  TIM1_TRG_COM_TIM17_IRQHandler
+  .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
+
+  .weak  TIM1_CC_IRQHandler
+  .thumb_set TIM1_CC_IRQHandler,Default_Handler
+
+  .weak  TIM2_IRQHandler
+  .thumb_set TIM2_IRQHandler,Default_Handler
+
+  .weak  PKA_IRQHandler
+  .thumb_set PKA_IRQHandler,Default_Handler
+
+  .weak  I2C1_EV_IRQHandler
+  .thumb_set I2C1_EV_IRQHandler,Default_Handler
+
+  .weak  I2C1_ER_IRQHandler
+  .thumb_set I2C1_ER_IRQHandler,Default_Handler
+
+  .weak  I2C3_EV_IRQHandler
+  .thumb_set I2C3_EV_IRQHandler,Default_Handler
+
+  .weak  I2C3_ER_IRQHandler
+  .thumb_set I2C3_ER_IRQHandler,Default_Handler
+
+  .weak  SPI1_IRQHandler
+  .thumb_set SPI1_IRQHandler,Default_Handler
+
+  .weak  SPI2_IRQHandler
+  .thumb_set SPI2_IRQHandler,Default_Handler
+
+  .weak  USART1_IRQHandler
+  .thumb_set USART1_IRQHandler,Default_Handler
+
+  .weak  LPUART1_IRQHandler
+  .thumb_set LPUART1_IRQHandler,Default_Handler
+
+  .weak  SAI1_IRQHandler
+  .thumb_set SAI1_IRQHandler,Default_Handler
+
+  .weak  TSC_IRQHandler
+  .thumb_set TSC_IRQHandler,Default_Handler
+
+  .weak  EXTI15_10_IRQHandler
+  .thumb_set EXTI15_10_IRQHandler,Default_Handler
+
+  .weak  RTC_Alarm_IRQHandler
+  .thumb_set RTC_Alarm_IRQHandler,Default_Handler
+
+  .weak  CRS_IRQHandler
+  .thumb_set CRS_IRQHandler,Default_Handler
+
+  .weak  PWR_SOTF_BLEACT_802ACT_RFPHASE_IRQHandler
+  .thumb_set PWR_SOTF_BLEACT_802ACT_RFPHASE_IRQHandler,Default_Handler
+
+  .weak  IPCC_C1_RX_IRQHandler
+  .thumb_set IPCC_C1_RX_IRQHandler,Default_Handler
+
+  .weak  IPCC_C1_TX_IRQHandler
+  .thumb_set IPCC_C1_TX_IRQHandler,Default_Handler
+
+  .weak  HSEM_IRQHandler
+  .thumb_set HSEM_IRQHandler,Default_Handler
+
+  .weak  LPTIM1_IRQHandler
+  .thumb_set LPTIM1_IRQHandler,Default_Handler
+
+  .weak  LPTIM2_IRQHandler
+  .thumb_set LPTIM2_IRQHandler,Default_Handler
+
+  .weak  LCD_IRQHandler
+  .thumb_set LCD_IRQHandler,Default_Handler
+
+  .weak  QUADSPI_IRQHandler
+  .thumb_set QUADSPI_IRQHandler,Default_Handler
+
+  .weak  AES1_IRQHandler
+  .thumb_set AES1_IRQHandler,Default_Handler
+
+  .weak  AES2_IRQHandler
+  .thumb_set AES2_IRQHandler,Default_Handler
+
+  .weak  RNG_IRQHandler
+  .thumb_set RNG_IRQHandler,Default_Handler
+
+  .weak  FPU_IRQHandler
+  .thumb_set FPU_IRQHandler,Default_Handler
+
+  .weak  DMA2_Channel1_IRQHandler
+  .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
+
+  .weak  DMA2_Channel2_IRQHandler
+  .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
+
+  .weak  DMA2_Channel3_IRQHandler
+  .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
+
+  .weak  DMA2_Channel4_IRQHandler
+  .thumb_set DMA2_Channel4_IRQHandler,Default_Handler
+
+  .weak  DMA2_Channel5_IRQHandler
+  .thumb_set DMA2_Channel5_IRQHandler,Default_Handler
+
+  .weak  DMA2_Channel6_IRQHandler
+  .thumb_set DMA2_Channel6_IRQHandler,Default_Handler
+
+  .weak  DMA2_Channel7_IRQHandler
+  .thumb_set DMA2_Channel7_IRQHandler,Default_Handler
+
+  .weak  DMAMUX1_OVR_IRQHandler
+  .thumb_set DMAMUX1_OVR_IRQHandler,Default_Handler
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/firmware/targets/f3/stm32wb55xx_flash_cm4.ld b/firmware/targets/f3/stm32wb55xx_flash_cm4.ld
index ce970b16..226505bf 100644
--- a/firmware/targets/f3/stm32wb55xx_flash_cm4.ld
+++ b/firmware/targets/f3/stm32wb55xx_flash_cm4.ld
@@ -49,8 +49,8 @@ ENTRY(Reset_Handler)
 /* Highest address of the user mode stack */
 _estack = 0x20030000;    /* end of RAM */
 /* Generate a link error if heap and stack don't fit into RAM */
-_Min_Heap_Size = 0x200;      /* required amount of heap  */
-_Min_Stack_Size = 0x400; /* required amount of stack */
+_Min_Heap_Size = 0x400;      /* required amount of heap  */
+_Min_Stack_Size = 0x1000; /* required amount of stack */
 
 /* Specify the memory areas */
 MEMORY
diff --git a/firmware/targets/f3/stm32wb55xx_flash_cm4_boot.ld b/firmware/targets/f3/stm32wb55xx_flash_cm4_boot.ld
index c8946a8e..07beda76 100644
--- a/firmware/targets/f3/stm32wb55xx_flash_cm4_boot.ld
+++ b/firmware/targets/f3/stm32wb55xx_flash_cm4_boot.ld
@@ -49,8 +49,8 @@ ENTRY(Reset_Handler)
 /* Highest address of the user mode stack */
 _estack = 0x20030000;    /* end of RAM */
 /* Generate a link error if heap and stack don't fit into RAM */
-_Min_Heap_Size = 0x200;      /* required amount of heap  */
-_Min_Stack_Size = 0x400; /* required amount of stack */
+_Min_Heap_Size = 0x400;      /* required amount of heap  */
+_Min_Stack_Size = 0x1000; /* required amount of stack */
 
 /* Specify the memory areas */
 MEMORY
diff --git a/firmware/targets/f3/target.mk b/firmware/targets/f3/target.mk
index 957e8df2..ab2c840e 100644
--- a/firmware/targets/f3/target.mk
+++ b/firmware/targets/f3/target.mk
@@ -35,27 +35,32 @@ endif
 
 CUBE_DIR		= ../lib/STM32CubeWB
 C_SOURCES		+= \
-	$(CUBE_DIR)/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_gpio.c \
-	$(CUBE_DIR)/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_pcd.c \
-	$(CUBE_DIR)/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_pcd_ex.c \
-	$(CUBE_DIR)/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_ll_usb.c \
-	$(CUBE_DIR)/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_rcc.c \
-	$(CUBE_DIR)/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_rcc_ex.c \
-	$(CUBE_DIR)/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_flash.c \
-	$(CUBE_DIR)/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_flash_ex.c \
-	$(CUBE_DIR)/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_hsem.c \
-	$(CUBE_DIR)/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_dma.c \
-	$(CUBE_DIR)/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_dma_ex.c \
-	$(CUBE_DIR)/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_pwr.c \
-	$(CUBE_DIR)/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_pwr_ex.c \
-	$(CUBE_DIR)/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_cortex.c \
 	$(CUBE_DIR)/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal.c \
-	$(CUBE_DIR)/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_exti.c \
 	$(CUBE_DIR)/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_adc.c \
 	$(CUBE_DIR)/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_adc_ex.c \
-	$(CUBE_DIR)/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_ll_adc.c \
+	$(CUBE_DIR)/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_comp.c \
+	$(CUBE_DIR)/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_cortex.c \
+	$(CUBE_DIR)/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_cryp.c \
+	$(CUBE_DIR)/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_crc.c \
+	$(CUBE_DIR)/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_crc_ex.c \
+	$(CUBE_DIR)/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_dma.c \
+	$(CUBE_DIR)/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_dma_ex.c \
+	$(CUBE_DIR)/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_exti.c \
+	$(CUBE_DIR)/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_flash.c \
+	$(CUBE_DIR)/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_flash_ex.c \
+	$(CUBE_DIR)/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_gpio.c \
+	$(CUBE_DIR)/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_hsem.c \
 	$(CUBE_DIR)/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_i2c.c \
 	$(CUBE_DIR)/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_i2c_ex.c \
+	$(CUBE_DIR)/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_ipcc.c \
+	$(CUBE_DIR)/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_pcd.c \
+	$(CUBE_DIR)/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_pcd_ex.c \
+	$(CUBE_DIR)/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_pka.c \
+	$(CUBE_DIR)/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_pwr.c \
+	$(CUBE_DIR)/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_pwr_ex.c \
+	$(CUBE_DIR)/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_rcc.c \
+	$(CUBE_DIR)/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_rcc_ex.c \
+	$(CUBE_DIR)/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_rng.c \
 	$(CUBE_DIR)/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_rtc.c \
 	$(CUBE_DIR)/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_rtc_ex.c \
 	$(CUBE_DIR)/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_spi.c \
@@ -64,7 +69,8 @@ C_SOURCES		+= \
 	$(CUBE_DIR)/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_tim_ex.c \
 	$(CUBE_DIR)/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_uart.c \
 	$(CUBE_DIR)/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_uart_ex.c \
-	$(CUBE_DIR)/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_comp.c \
+	$(CUBE_DIR)/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_ll_adc.c \
+	$(CUBE_DIR)/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_ll_usb.c \
 	$(CUBE_DIR)/Middlewares/Third_Party/FreeRTOS/Source/croutine.c \
 	$(CUBE_DIR)/Middlewares/Third_Party/FreeRTOS/Source/event_groups.c \
 	$(CUBE_DIR)/Middlewares/Third_Party/FreeRTOS/Source/list.c \
@@ -109,6 +115,38 @@ CFLAGS += \
 	-I$(CUBE_DIR)/Drivers/CMSIS/Include \
 	-I$(MXPROJECT_DIR)/Inc \
 	-I$(MXPROJECT_DIR)/Src/fatfs \
-	-I$(API_HAL_DIR)/api-hal
+	-I$(API_HAL_DIR)/api-hal \
+
+# Ble glue 
+CFLAGS += -I$(TARGET_DIR)/ble-glue \
+	-I$(CUBE_DIR)/Utilities/lpm/tiny_lpm \
+	-I$(CUBE_DIR)/Middlewares/ST/STM32_WPAN \
+	-I$(CUBE_DIR)/Middlewares/ST/STM32_WPAN/ble \
+	-I$(CUBE_DIR)/Middlewares/ST/STM32_WPAN/ble/core \
+	-I$(CUBE_DIR)/Middlewares/ST/STM32_WPAN/ble/core/template \
+	-I$(CUBE_DIR)/Middlewares/ST/STM32_WPAN/utilities \
+	-I$(CUBE_DIR)/Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread \
+	-I$(CUBE_DIR)/Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/tl \
+	-I$(CUBE_DIR)/Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/shci
+
+C_SOURCES		+= \
+	$(wildcard $(TARGET_DIR)/ble-glue/*.c) \
+	$(CUBE_DIR)/Middlewares/ST/STM32_WPAN/utilities/otp.c \
+	$(CUBE_DIR)/Middlewares/ST/STM32_WPAN/utilities/stm_list.c \
+	$(CUBE_DIR)/Middlewares/ST/STM32_WPAN/utilities/dbg_trace.c \
+	$(CUBE_DIR)/Middlewares/ST/STM32_WPAN/ble/svc/Src/svc_ctl.c \
+	$(CUBE_DIR)/Middlewares/ST/STM32_WPAN/ble/svc/Src/dis.c \
+	$(CUBE_DIR)/Middlewares/ST/STM32_WPAN/ble/svc/Src/hrs.c \
+	$(CUBE_DIR)/Middlewares/ST/STM32_WPAN/ble/core/template/osal.c \
+	$(CUBE_DIR)/Middlewares/ST/STM32_WPAN/ble/core/auto/ble_hci_le.c \
+	$(CUBE_DIR)/Middlewares/ST/STM32_WPAN/ble/core/auto/ble_gap_aci.c \
+	$(CUBE_DIR)/Middlewares/ST/STM32_WPAN/ble/core/auto/ble_gatt_aci.c \
+	$(CUBE_DIR)/Middlewares/ST/STM32_WPAN/ble/core/auto/ble_hal_aci.c \
+	$(CUBE_DIR)/Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/tl/tl_mbox.c \
+	$(CUBE_DIR)/Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/tl/hci_tl.c \
+	$(CUBE_DIR)/Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/tl/hci_tl_if.c \
+	$(CUBE_DIR)/Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/tl/shci_tl.c \
+	$(CUBE_DIR)/Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/tl/shci_tl_if.c \
+	$(CUBE_DIR)/Middlewares/ST/STM32_WPAN/interface/patterns/ble_thread/shci/shci.c
 
 SVD_FILE = ../debug/STM32WB55_CM4.svd