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HAL to LL migration: GPIO, HSEM, AES (#1069)

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* gpio, hsem, crypto: switch from HAL to LL/registers
* Moved GPIO initialization to furi_hal
* More HAL removed
* All HAL modules disabled
* HAL is finally removed
* hal_gpio -> furi_hal_gpio, main.h removed
* Bootloader build fix
* RTOS config moved to freertos-glue
* delay -> furi_hal_delay

Co-authored-by: あく <alleteam@gmail.com>
This commit is contained in:
Nikolay Minaylov
2022-03-30 18:23:40 +03:00
committed by GitHub
parent 648d8aaa54
commit 2f3ea9494e
93 changed files with 921 additions and 1270 deletions
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46
firmware/targets/f7/furi_hal/furi_hal_flash.c
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@@ -12,6 +12,17 @@
#define FURI_HAL_FLASH_WRITE_BLOCK 8
#define FURI_HAL_FLASH_PAGE_SIZE 4096
#define FURI_HAL_FLASH_CYCLES_COUNT 10000
#define FURI_HAL_FLASH_TIMEOUT 1000
#define FURI_HAL_FLASH_KEY1 0x45670123U
#define FURI_HAL_FLASH_KEY2 0xCDEF89ABU
#define FURI_HAL_FLASH_SR_ERRORS \
(FLASH_SR_OPERR | FLASH_SR_PROGERR | FLASH_SR_WRPERR | FLASH_SR_PGAERR | FLASH_SR_SIZERR | \
FLASH_SR_PGSERR | FLASH_SR_MISERR | FLASH_SR_FASTERR | FLASH_SR_RDERR | FLASH_SR_OPTVERR)
#define IS_ADDR_ALIGNED_64BITS(__VALUE__) (((__VALUE__)&0x7U) == (0x00UL))
#define IS_FLASH_PROGRAM_ADDRESS(__VALUE__) \
(((__VALUE__) >= FLASH_BASE) && ((__VALUE__) <= (FLASH_BASE + FLASH_SIZE - 8UL)) && \
(((__VALUE__) % 8UL) == 0UL))
/* Free flash space borders, exported by linker */
extern const void __free_flash_start__;
@@ -43,7 +54,7 @@ const void* furi_hal_flash_get_free_start_address() {
const void* furi_hal_flash_get_free_end_address() {
uint32_t sfr_reg_val = READ_REG(FLASH->SFR);
uint32_t sfsa = (READ_BIT(sfr_reg_val, FLASH_SFR_SFSA) >> FLASH_SFR_SFSA_Pos);
return (const void*)((sfsa * FLASH_PAGE_SIZE) + FLASH_BASE);
return (const void*)((sfsa * FURI_HAL_FLASH_PAGE_SIZE) + FLASH_BASE);
}
size_t furi_hal_flash_get_free_page_start_address() {
@@ -66,8 +77,8 @@ static void furi_hal_flash_unlock() {
furi_check(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != 0U);
/* Authorize the FLASH Registers access */
WRITE_REG(FLASH->KEYR, FLASH_KEY1);
WRITE_REG(FLASH->KEYR, FLASH_KEY2);
WRITE_REG(FLASH->KEYR, FURI_HAL_FLASH_KEY1);
WRITE_REG(FLASH->KEYR, FURI_HAL_FLASH_KEY2);
/* verify Flash is unlock */
furi_check(READ_BIT(FLASH->CR, FLASH_CR_LOCK) == 0U);
@@ -152,7 +163,7 @@ static void furi_hal_flash_end_with_core2(bool erase_flag) {
taskEXIT_CRITICAL();
// Doesn't make much sense, does it?
while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) {
while(READ_BIT(FLASH->SR, FLASH_SR_BSY)) {
osThreadYield();
}
@@ -202,7 +213,7 @@ static void furi_hal_flush_cache(void) {
}
}
HAL_StatusTypeDef furi_hal_flash_wait_last_operation(uint32_t timeout) {
bool furi_hal_flash_wait_last_operation(uint32_t timeout) {
uint32_t error = 0;
uint32_t countdown = 0;
@@ -210,12 +221,12 @@ HAL_StatusTypeDef furi_hal_flash_wait_last_operation(uint32_t timeout) {
// Even if the FLASH operation fails, the BUSY flag will be reset and an error
// flag will be set
countdown = timeout;
while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) {
while(READ_BIT(FLASH->SR, FLASH_SR_BSY)) {
if(LL_SYSTICK_IsActiveCounterFlag()) {
countdown--;
}
if(countdown == 0) {
return HAL_TIMEOUT;
return false;
}
}
@@ -223,31 +234,30 @@ HAL_StatusTypeDef furi_hal_flash_wait_last_operation(uint32_t timeout) {
error = FLASH->SR;
/* Check FLASH End of Operation flag */
if((error & FLASH_FLAG_EOP) != 0U) {
if((error & FLASH_SR_EOP) != 0U) {
/* Clear FLASH End of Operation pending bit */
__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP);
CLEAR_BIT(FLASH->SR, FLASH_SR_EOP);
}
/* Now update error variable to only error value */
error &= FLASH_FLAG_SR_ERRORS;
error &= FURI_HAL_FLASH_SR_ERRORS;
furi_check(error == 0);
/* clear error flags */
__HAL_FLASH_CLEAR_FLAG(error);
CLEAR_BIT(FLASH->SR, error);
/* Wait for control register to be written */
countdown = timeout;
while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_CFGBSY)) {
while(READ_BIT(FLASH->SR, FLASH_SR_CFGBSY)) {
if(LL_SYSTICK_IsActiveCounterFlag()) {
countdown--;
}
if(countdown == 0) {
return HAL_TIMEOUT;
return false;
}
}
return HAL_OK;
return true;
}
bool furi_hal_flash_erase(uint8_t page) {
@@ -257,14 +267,14 @@ bool furi_hal_flash_erase(uint8_t page) {
furi_check(FLASH->SR == 0);
/* Verify that next operation can be proceed */
furi_check(furi_hal_flash_wait_last_operation(FLASH_TIMEOUT_VALUE) == HAL_OK);
furi_check(furi_hal_flash_wait_last_operation(FURI_HAL_FLASH_TIMEOUT));
/* Select page and start operation */
MODIFY_REG(
FLASH->CR, FLASH_CR_PNB, ((page << FLASH_CR_PNB_Pos) | FLASH_CR_PER | FLASH_CR_STRT));
/* Wait for last operation to be completed */
furi_check(furi_hal_flash_wait_last_operation(FLASH_TIMEOUT_VALUE) == HAL_OK);
furi_check(furi_hal_flash_wait_last_operation(FURI_HAL_FLASH_TIMEOUT));
/* If operation is completed or interrupted, disable the Page Erase Bit */
CLEAR_BIT(FLASH->CR, (FLASH_CR_PER | FLASH_CR_PNB));
@@ -301,7 +311,7 @@ bool furi_hal_flash_write_dword(size_t address, uint64_t data) {
*(uint32_t*)(address + 4U) = (uint32_t)(data >> 32U);
/* Wait for last operation to be completed */
furi_check(furi_hal_flash_wait_last_operation(FLASH_TIMEOUT_VALUE) == HAL_OK);
furi_check(furi_hal_flash_wait_last_operation(FURI_HAL_FLASH_TIMEOUT));
/* If the program operation is completed, disable the PG or FSTPG Bit */
CLEAR_BIT(FLASH->CR, FLASH_CR_PG);