Naming and coding style convention, new linter tool. (#945)
* Makefile, Scripts: new linter * About: remove ID from IC * Firmware: remove double define for DIVC/DIVR * Scripts: check folder names too. Docker: replace syntax check with make lint. * Reformat Sources and Migrate to new file naming convention * Docker: symlink clang-format-12 to clang-format * Add coding style guide
This commit is contained in:
@@ -27,73 +27,63 @@
|
||||
COMP_HandleTypeDef hcomp1;
|
||||
|
||||
/* COMP1 init function */
|
||||
void MX_COMP1_Init(void)
|
||||
{
|
||||
|
||||
hcomp1.Instance = COMP1;
|
||||
hcomp1.Init.InputMinus = COMP_INPUT_MINUS_1_4VREFINT;
|
||||
hcomp1.Init.InputPlus = COMP_INPUT_PLUS_IO1;
|
||||
hcomp1.Init.OutputPol = COMP_OUTPUTPOL_NONINVERTED;
|
||||
hcomp1.Init.Hysteresis = COMP_HYSTERESIS_HIGH;
|
||||
hcomp1.Init.BlankingSrce = COMP_BLANKINGSRC_NONE;
|
||||
hcomp1.Init.Mode = COMP_POWERMODE_MEDIUMSPEED;
|
||||
hcomp1.Init.WindowMode = COMP_WINDOWMODE_DISABLE;
|
||||
hcomp1.Init.TriggerMode = COMP_TRIGGERMODE_IT_RISING_FALLING;
|
||||
if (HAL_COMP_Init(&hcomp1) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
void MX_COMP1_Init(void) {
|
||||
hcomp1.Instance = COMP1;
|
||||
hcomp1.Init.InputMinus = COMP_INPUT_MINUS_1_4VREFINT;
|
||||
hcomp1.Init.InputPlus = COMP_INPUT_PLUS_IO1;
|
||||
hcomp1.Init.OutputPol = COMP_OUTPUTPOL_NONINVERTED;
|
||||
hcomp1.Init.Hysteresis = COMP_HYSTERESIS_HIGH;
|
||||
hcomp1.Init.BlankingSrce = COMP_BLANKINGSRC_NONE;
|
||||
hcomp1.Init.Mode = COMP_POWERMODE_MEDIUMSPEED;
|
||||
hcomp1.Init.WindowMode = COMP_WINDOWMODE_DISABLE;
|
||||
hcomp1.Init.TriggerMode = COMP_TRIGGERMODE_IT_RISING_FALLING;
|
||||
if(HAL_COMP_Init(&hcomp1) != HAL_OK) {
|
||||
Error_Handler();
|
||||
}
|
||||
}
|
||||
|
||||
void HAL_COMP_MspInit(COMP_HandleTypeDef* compHandle)
|
||||
{
|
||||
void HAL_COMP_MspInit(COMP_HandleTypeDef* compHandle) {
|
||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||
if(compHandle->Instance == COMP1) {
|
||||
/* USER CODE BEGIN COMP1_MspInit 0 */
|
||||
|
||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||
if(compHandle->Instance==COMP1)
|
||||
{
|
||||
/* USER CODE BEGIN COMP1_MspInit 0 */
|
||||
/* USER CODE END COMP1_MspInit 0 */
|
||||
|
||||
/* USER CODE END COMP1_MspInit 0 */
|
||||
|
||||
__HAL_RCC_GPIOC_CLK_ENABLE();
|
||||
/**COMP1 GPIO Configuration
|
||||
__HAL_RCC_GPIOC_CLK_ENABLE();
|
||||
/**COMP1 GPIO Configuration
|
||||
PC5 ------> COMP1_INP
|
||||
*/
|
||||
GPIO_InitStruct.Pin = RFID_RF_IN_Pin;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
HAL_GPIO_Init(RFID_RF_IN_GPIO_Port, &GPIO_InitStruct);
|
||||
GPIO_InitStruct.Pin = RFID_RF_IN_Pin;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
HAL_GPIO_Init(RFID_RF_IN_GPIO_Port, &GPIO_InitStruct);
|
||||
|
||||
/* COMP1 interrupt Init */
|
||||
HAL_NVIC_SetPriority(COMP_IRQn, 5, 0);
|
||||
HAL_NVIC_EnableIRQ(COMP_IRQn);
|
||||
/* USER CODE BEGIN COMP1_MspInit 1 */
|
||||
/* COMP1 interrupt Init */
|
||||
HAL_NVIC_SetPriority(COMP_IRQn, 5, 0);
|
||||
HAL_NVIC_EnableIRQ(COMP_IRQn);
|
||||
/* USER CODE BEGIN COMP1_MspInit 1 */
|
||||
|
||||
/* USER CODE END COMP1_MspInit 1 */
|
||||
}
|
||||
/* USER CODE END COMP1_MspInit 1 */
|
||||
}
|
||||
}
|
||||
|
||||
void HAL_COMP_MspDeInit(COMP_HandleTypeDef* compHandle)
|
||||
{
|
||||
void HAL_COMP_MspDeInit(COMP_HandleTypeDef* compHandle) {
|
||||
if(compHandle->Instance == COMP1) {
|
||||
/* USER CODE BEGIN COMP1_MspDeInit 0 */
|
||||
|
||||
if(compHandle->Instance==COMP1)
|
||||
{
|
||||
/* USER CODE BEGIN COMP1_MspDeInit 0 */
|
||||
/* USER CODE END COMP1_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END COMP1_MspDeInit 0 */
|
||||
|
||||
/**COMP1 GPIO Configuration
|
||||
/**COMP1 GPIO Configuration
|
||||
PC5 ------> COMP1_INP
|
||||
*/
|
||||
HAL_GPIO_DeInit(RFID_RF_IN_GPIO_Port, RFID_RF_IN_Pin);
|
||||
HAL_GPIO_DeInit(RFID_RF_IN_GPIO_Port, RFID_RF_IN_Pin);
|
||||
|
||||
/* COMP1 interrupt Deinit */
|
||||
HAL_NVIC_DisableIRQ(COMP_IRQn);
|
||||
/* USER CODE BEGIN COMP1_MspDeInit 1 */
|
||||
/* COMP1 interrupt Deinit */
|
||||
HAL_NVIC_DisableIRQ(COMP_IRQn);
|
||||
/* USER CODE BEGIN COMP1_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END COMP1_MspDeInit 1 */
|
||||
}
|
||||
/* USER CODE END COMP1_MspDeInit 1 */
|
||||
}
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN 1 */
|
||||
|
@@ -1,7 +1,7 @@
|
||||
#include "main.h"
|
||||
|
||||
#include <furi.h>
|
||||
#include <furi-hal.h>
|
||||
#include <furi_hal.h>
|
||||
#include <flipper.h>
|
||||
|
||||
#define TAG "Main"
|
||||
@@ -26,14 +26,15 @@ int main(void) {
|
||||
// Start kernel
|
||||
osKernelStart();
|
||||
|
||||
while (1) {}
|
||||
while(1) {
|
||||
}
|
||||
}
|
||||
|
||||
void Error_Handler(void) {
|
||||
furi_crash("ErrorHandler");
|
||||
}
|
||||
|
||||
#ifdef USE_FULL_ASSERT
|
||||
#ifdef USE_FULL_ASSERT
|
||||
/**
|
||||
* @brief Reports the name of the source file and the source line number
|
||||
* where the assert_param error has occurred.
|
||||
@@ -41,7 +42,7 @@ void Error_Handler(void) {
|
||||
* @param line: assert_param error line source number
|
||||
* @retval None
|
||||
*/
|
||||
void assert_failed(uint8_t *file, uint32_t line) {
|
||||
void assert_failed(uint8_t* file, uint32_t line) {
|
||||
furi_crash("HAL assert failed");
|
||||
}
|
||||
#endif /* USE_FULL_ASSERT */
|
||||
|
@@ -61,29 +61,28 @@
|
||||
/**
|
||||
* Initializes the Global MSP.
|
||||
*/
|
||||
void HAL_MspInit(void)
|
||||
{
|
||||
/* USER CODE BEGIN MspInit 0 */
|
||||
void HAL_MspInit(void) {
|
||||
/* USER CODE BEGIN MspInit 0 */
|
||||
|
||||
/* USER CODE END MspInit 0 */
|
||||
/* USER CODE END MspInit 0 */
|
||||
|
||||
__HAL_RCC_HSEM_CLK_ENABLE();
|
||||
__HAL_RCC_HSEM_CLK_ENABLE();
|
||||
|
||||
/* System interrupt init*/
|
||||
/* PendSV_IRQn interrupt configuration */
|
||||
HAL_NVIC_SetPriority(PendSV_IRQn, 15, 0);
|
||||
/* System interrupt init*/
|
||||
/* PendSV_IRQn interrupt configuration */
|
||||
HAL_NVIC_SetPriority(PendSV_IRQn, 15, 0);
|
||||
|
||||
/* Peripheral interrupt init */
|
||||
/* RCC_IRQn interrupt configuration */
|
||||
HAL_NVIC_SetPriority(RCC_IRQn, 5, 0);
|
||||
HAL_NVIC_EnableIRQ(RCC_IRQn);
|
||||
/* HSEM_IRQn interrupt configuration */
|
||||
HAL_NVIC_SetPriority(HSEM_IRQn, 5, 0);
|
||||
HAL_NVIC_EnableIRQ(HSEM_IRQn);
|
||||
/* Peripheral interrupt init */
|
||||
/* RCC_IRQn interrupt configuration */
|
||||
HAL_NVIC_SetPriority(RCC_IRQn, 5, 0);
|
||||
HAL_NVIC_EnableIRQ(RCC_IRQn);
|
||||
/* HSEM_IRQn interrupt configuration */
|
||||
HAL_NVIC_SetPriority(HSEM_IRQn, 5, 0);
|
||||
HAL_NVIC_EnableIRQ(HSEM_IRQn);
|
||||
|
||||
/* USER CODE BEGIN MspInit 1 */
|
||||
/* USER CODE BEGIN MspInit 1 */
|
||||
|
||||
/* USER CODE END MspInit 1 */
|
||||
/* USER CODE END MspInit 1 */
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN 1 */
|
||||
|
@@ -39,10 +39,10 @@ void HSEM_IRQHandler(void) {
|
||||
HAL_HSEM_IRQHandler();
|
||||
}
|
||||
|
||||
void IPCC_C1_TX_IRQHandler(void){
|
||||
void IPCC_C1_TX_IRQHandler(void) {
|
||||
HW_IPCC_Tx_Handler();
|
||||
}
|
||||
|
||||
void IPCC_C1_RX_IRQHandler(void){
|
||||
void IPCC_C1_RX_IRQHandler(void) {
|
||||
HW_IPCC_Rx_Handler();
|
||||
}
|
||||
|
@@ -85,24 +85,24 @@
|
||||
|
||||
#include "stm32wbxx.h"
|
||||
|
||||
#if !defined (HSE_VALUE)
|
||||
#define HSE_VALUE (32000000UL) /*!< Value of the External oscillator in Hz */
|
||||
#if !defined(HSE_VALUE)
|
||||
#define HSE_VALUE (32000000UL) /*!< Value of the External oscillator in Hz */
|
||||
#endif /* HSE_VALUE */
|
||||
|
||||
#if !defined (MSI_VALUE)
|
||||
#define MSI_VALUE (4000000UL) /*!< Value of the Internal oscillator in Hz*/
|
||||
#if !defined(MSI_VALUE)
|
||||
#define MSI_VALUE (4000000UL) /*!< Value of the Internal oscillator in Hz*/
|
||||
#endif /* MSI_VALUE */
|
||||
|
||||
#if !defined (HSI_VALUE)
|
||||
#define HSI_VALUE (16000000UL) /*!< Value of the Internal oscillator in Hz*/
|
||||
#if !defined(HSI_VALUE)
|
||||
#define HSI_VALUE (16000000UL) /*!< Value of the Internal oscillator in Hz*/
|
||||
#endif /* HSI_VALUE */
|
||||
|
||||
#if !defined (LSI_VALUE)
|
||||
#define LSI_VALUE (32000UL) /*!< Value of LSI in Hz*/
|
||||
#endif /* LSI_VALUE */
|
||||
#if !defined(LSI_VALUE)
|
||||
#define LSI_VALUE (32000UL) /*!< Value of LSI in Hz*/
|
||||
#endif /* LSI_VALUE */
|
||||
|
||||
#if !defined (LSE_VALUE)
|
||||
#define LSE_VALUE (32768UL) /*!< Value of LSE in Hz*/
|
||||
#if !defined(LSE_VALUE)
|
||||
#define LSE_VALUE (32768UL) /*!< Value of LSE in Hz*/
|
||||
#endif /* LSE_VALUE */
|
||||
|
||||
/**
|
||||
@@ -124,10 +124,12 @@
|
||||
/*!< Uncomment the following line if you need to relocate your vector Table in
|
||||
Internal SRAM. */
|
||||
/* #define VECT_TAB_SRAM */
|
||||
#define VECT_TAB_OFFSET OS_OFFSET /*!< Vector Table base offset field.
|
||||
#define VECT_TAB_OFFSET \
|
||||
OS_OFFSET /*!< Vector Table base offset field.
|
||||
This value must be a multiple of 0x200. */
|
||||
|
||||
#define VECT_TAB_BASE_ADDRESS SRAM1_BASE /*!< Vector Table base offset field.
|
||||
#define VECT_TAB_BASE_ADDRESS \
|
||||
SRAM1_BASE /*!< Vector Table base offset field.
|
||||
This value must be a multiple of 0x200. */
|
||||
/**
|
||||
* @}
|
||||
@@ -144,7 +146,7 @@
|
||||
/** @addtogroup STM32WBxx_System_Private_Variables
|
||||
* @{
|
||||
*/
|
||||
/* The SystemCoreClock variable is updated in three ways:
|
||||
/* The SystemCoreClock variable is updated in three ways:
|
||||
1) by calling CMSIS function SystemCoreClockUpdate()
|
||||
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
|
||||
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
|
||||
@@ -152,20 +154,37 @@
|
||||
is no need to call the 2 first functions listed above, since SystemCoreClock
|
||||
variable is updated automatically.
|
||||
*/
|
||||
uint32_t SystemCoreClock = 4000000UL ; /*CPU1: M4 on MSI clock after startup (4MHz)*/
|
||||
uint32_t SystemCoreClock = 4000000UL; /*CPU1: M4 on MSI clock after startup (4MHz)*/
|
||||
|
||||
const uint32_t AHBPrescTable[16UL] = {1UL, 3UL, 5UL, 1UL, 1UL, 6UL, 10UL, 32UL, 2UL, 4UL, 8UL, 16UL, 64UL, 128UL, 256UL, 512UL};
|
||||
const uint32_t AHBPrescTable[16UL] =
|
||||
{1UL, 3UL, 5UL, 1UL, 1UL, 6UL, 10UL, 32UL, 2UL, 4UL, 8UL, 16UL, 64UL, 128UL, 256UL, 512UL};
|
||||
|
||||
const uint32_t APBPrescTable[8UL] = {0UL, 0UL, 0UL, 0UL, 1UL, 2UL, 3UL, 4UL};
|
||||
const uint32_t APBPrescTable[8UL] = {0UL, 0UL, 0UL, 0UL, 1UL, 2UL, 3UL, 4UL};
|
||||
|
||||
const uint32_t MSIRangeTable[16UL] = {100000UL, 200000UL, 400000UL, 800000UL, 1000000UL, 2000000UL, \
|
||||
4000000UL, 8000000UL, 16000000UL, 24000000UL, 32000000UL, 48000000UL, 0UL, 0UL, 0UL, 0UL}; /* 0UL values are incorrect cases */
|
||||
const uint32_t MSIRangeTable[16UL] = {
|
||||
100000UL,
|
||||
200000UL,
|
||||
400000UL,
|
||||
800000UL,
|
||||
1000000UL,
|
||||
2000000UL,
|
||||
4000000UL,
|
||||
8000000UL,
|
||||
16000000UL,
|
||||
24000000UL,
|
||||
32000000UL,
|
||||
48000000UL,
|
||||
0UL,
|
||||
0UL,
|
||||
0UL,
|
||||
0UL}; /* 0UL values are incorrect cases */
|
||||
|
||||
#if defined(STM32WB55xx) || defined(STM32WB5Mxx) || defined(STM32WB35xx)
|
||||
const uint32_t SmpsPrescalerTable[4UL][6UL]={{1UL,3UL,2UL,2UL,1UL,2UL}, \
|
||||
{2UL,6UL,4UL,3UL,2UL,4UL}, \
|
||||
{4UL,12UL,8UL,6UL,4UL,8UL}, \
|
||||
{4UL,12UL,8UL,6UL,4UL,8UL}};
|
||||
const uint32_t SmpsPrescalerTable[4UL][6UL] = {
|
||||
{1UL, 3UL, 2UL, 2UL, 1UL, 2UL},
|
||||
{2UL, 6UL, 4UL, 3UL, 2UL, 4UL},
|
||||
{4UL, 12UL, 8UL, 6UL, 4UL, 8UL},
|
||||
{4UL, 12UL, 8UL, 6UL, 4UL, 8UL}};
|
||||
#endif
|
||||
|
||||
/**
|
||||
@@ -189,50 +208,51 @@
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SystemInit(void)
|
||||
{
|
||||
/* Configure the Vector Table location add offset address ------------------*/
|
||||
#if defined(VECT_TAB_SRAM) && defined(VECT_TAB_BASE_ADDRESS)
|
||||
/* program in SRAMx */
|
||||
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAMx for CPU1 */
|
||||
#else /* program in FLASH */
|
||||
SCB->VTOR = VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
|
||||
void SystemInit(void) {
|
||||
/* Configure the Vector Table location add offset address ------------------*/
|
||||
#if defined(VECT_TAB_SRAM) && defined(VECT_TAB_BASE_ADDRESS)
|
||||
/* program in SRAMx */
|
||||
SCB->VTOR = VECT_TAB_BASE_ADDRESS |
|
||||
VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAMx for CPU1 */
|
||||
#else /* program in FLASH */
|
||||
SCB->VTOR = VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
|
||||
#endif
|
||||
|
||||
/* FPU settings ------------------------------------------------------------*/
|
||||
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
|
||||
SCB->CPACR |= ((3UL << (10UL*2UL))|(3UL << (11UL*2UL))); /* set CP10 and CP11 Full Access */
|
||||
#endif
|
||||
|
||||
/* Reset the RCC clock configuration to the default reset state ------------*/
|
||||
/* Set MSION bit */
|
||||
RCC->CR |= RCC_CR_MSION;
|
||||
/* FPU settings ------------------------------------------------------------*/
|
||||
#if(__FPU_PRESENT == 1) && (__FPU_USED == 1)
|
||||
SCB->CPACR |=
|
||||
((3UL << (10UL * 2UL)) | (3UL << (11UL * 2UL))); /* set CP10 and CP11 Full Access */
|
||||
#endif
|
||||
|
||||
/* Reset CFGR register */
|
||||
RCC->CFGR = 0x00070000U;
|
||||
/* Reset the RCC clock configuration to the default reset state ------------*/
|
||||
/* Set MSION bit */
|
||||
RCC->CR |= RCC_CR_MSION;
|
||||
|
||||
/* Reset PLLSAI1ON, PLLON, HSECSSON, HSEON, HSION, and MSIPLLON bits */
|
||||
RCC->CR &= (uint32_t)0xFAF6FEFBU;
|
||||
/* Reset CFGR register */
|
||||
RCC->CFGR = 0x00070000U;
|
||||
|
||||
/*!< Reset LSI1 and LSI2 bits */
|
||||
RCC->CSR &= (uint32_t)0xFFFFFFFAU;
|
||||
|
||||
/*!< Reset HSI48ON bit */
|
||||
RCC->CRRCR &= (uint32_t)0xFFFFFFFEU;
|
||||
|
||||
/* Reset PLLCFGR register */
|
||||
RCC->PLLCFGR = 0x22041000U;
|
||||
/* Reset PLLSAI1ON, PLLON, HSECSSON, HSEON, HSION, and MSIPLLON bits */
|
||||
RCC->CR &= (uint32_t)0xFAF6FEFBU;
|
||||
|
||||
/*!< Reset LSI1 and LSI2 bits */
|
||||
RCC->CSR &= (uint32_t)0xFFFFFFFAU;
|
||||
|
||||
/*!< Reset HSI48ON bit */
|
||||
RCC->CRRCR &= (uint32_t)0xFFFFFFFEU;
|
||||
|
||||
/* Reset PLLCFGR register */
|
||||
RCC->PLLCFGR = 0x22041000U;
|
||||
|
||||
#if defined(STM32WB55xx) || defined(STM32WB5Mxx)
|
||||
/* Reset PLLSAI1CFGR register */
|
||||
RCC->PLLSAI1CFGR = 0x22041000U;
|
||||
/* Reset PLLSAI1CFGR register */
|
||||
RCC->PLLSAI1CFGR = 0x22041000U;
|
||||
#endif
|
||||
|
||||
/* Reset HSEBYP bit */
|
||||
RCC->CR &= 0xFFFBFFFFU;
|
||||
|
||||
/* Disable all interrupts */
|
||||
RCC->CIER = 0x00000000;
|
||||
/* Reset HSEBYP bit */
|
||||
RCC->CR &= 0xFFFBFFFFU;
|
||||
|
||||
/* Disable all interrupts */
|
||||
RCC->CIER = 0x00000000;
|
||||
}
|
||||
|
||||
/**
|
||||
@@ -277,71 +297,65 @@ void SystemInit(void)
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SystemCoreClockUpdate(void)
|
||||
{
|
||||
uint32_t tmp, msirange, pllvco, pllr, pllsource , pllm;
|
||||
void SystemCoreClockUpdate(void) {
|
||||
uint32_t tmp, msirange, pllvco, pllr, pllsource, pllm;
|
||||
|
||||
/* Get MSI Range frequency--------------------------------------------------*/
|
||||
/* Get MSI Range frequency--------------------------------------------------*/
|
||||
|
||||
/*MSI frequency range in Hz*/
|
||||
msirange = MSIRangeTable[(RCC->CR & RCC_CR_MSIRANGE) >> RCC_CR_MSIRANGE_Pos];
|
||||
/*MSI frequency range in Hz*/
|
||||
msirange = MSIRangeTable[(RCC->CR & RCC_CR_MSIRANGE) >> RCC_CR_MSIRANGE_Pos];
|
||||
|
||||
/* Get SYSCLK source -------------------------------------------------------*/
|
||||
switch (RCC->CFGR & RCC_CFGR_SWS)
|
||||
{
|
||||
case 0x00: /* MSI used as system clock source */
|
||||
SystemCoreClock = msirange;
|
||||
break;
|
||||
/* Get SYSCLK source -------------------------------------------------------*/
|
||||
switch(RCC->CFGR & RCC_CFGR_SWS) {
|
||||
case 0x00: /* MSI used as system clock source */
|
||||
SystemCoreClock = msirange;
|
||||
break;
|
||||
|
||||
case 0x04: /* HSI used as system clock source */
|
||||
/* HSI used as system clock source */
|
||||
case 0x04: /* HSI used as system clock source */
|
||||
/* HSI used as system clock source */
|
||||
SystemCoreClock = HSI_VALUE;
|
||||
break;
|
||||
break;
|
||||
|
||||
case 0x08: /* HSE used as system clock source */
|
||||
SystemCoreClock = HSE_VALUE;
|
||||
break;
|
||||
case 0x08: /* HSE used as system clock source */
|
||||
SystemCoreClock = HSE_VALUE;
|
||||
break;
|
||||
|
||||
case 0x0C: /* PLL used as system clock source */
|
||||
/* PLL_VCO = (HSE_VALUE or HSI_VALUE or MSI_VALUE/ PLLM) * PLLN
|
||||
/* PLL_VCO = (HSE_VALUE or HSI_VALUE or MSI_VALUE/ PLLM) * PLLN
|
||||
SYSCLK = PLL_VCO / PLLR
|
||||
*/
|
||||
pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
|
||||
pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Pos) + 1UL ;
|
||||
pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
|
||||
pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Pos) + 1UL;
|
||||
|
||||
if(pllsource == 0x02UL) /* HSI used as PLL clock source */
|
||||
{
|
||||
pllvco = (HSI_VALUE / pllm);
|
||||
}
|
||||
else if(pllsource == 0x03UL) /* HSE used as PLL clock source */
|
||||
{
|
||||
pllvco = (HSE_VALUE / pllm);
|
||||
}
|
||||
else /* MSI used as PLL clock source */
|
||||
{
|
||||
pllvco = (msirange / pllm);
|
||||
}
|
||||
|
||||
pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos);
|
||||
pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> RCC_PLLCFGR_PLLR_Pos) + 1UL);
|
||||
|
||||
SystemCoreClock = pllvco/pllr;
|
||||
break;
|
||||
if(pllsource == 0x02UL) /* HSI used as PLL clock source */
|
||||
{
|
||||
pllvco = (HSI_VALUE / pllm);
|
||||
} else if(pllsource == 0x03UL) /* HSE used as PLL clock source */
|
||||
{
|
||||
pllvco = (HSE_VALUE / pllm);
|
||||
} else /* MSI used as PLL clock source */
|
||||
{
|
||||
pllvco = (msirange / pllm);
|
||||
}
|
||||
|
||||
pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos);
|
||||
pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> RCC_PLLCFGR_PLLR_Pos) + 1UL);
|
||||
|
||||
SystemCoreClock = pllvco / pllr;
|
||||
break;
|
||||
|
||||
default:
|
||||
SystemCoreClock = msirange;
|
||||
break;
|
||||
}
|
||||
|
||||
/* Compute HCLK clock frequency --------------------------------------------*/
|
||||
/* Get HCLK1 prescaler */
|
||||
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos)];
|
||||
/* HCLK clock frequency */
|
||||
SystemCoreClock = SystemCoreClock / tmp;
|
||||
SystemCoreClock = msirange;
|
||||
break;
|
||||
}
|
||||
|
||||
/* Compute HCLK clock frequency --------------------------------------------*/
|
||||
/* Get HCLK1 prescaler */
|
||||
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos)];
|
||||
/* HCLK clock frequency */
|
||||
SystemCoreClock = SystemCoreClock / tmp;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
@@ -29,329 +29,285 @@ TIM_HandleTypeDef htim2;
|
||||
TIM_HandleTypeDef htim16;
|
||||
|
||||
/* TIM1 init function */
|
||||
void MX_TIM1_Init(void)
|
||||
{
|
||||
TIM_ClockConfigTypeDef sClockSourceConfig = {0};
|
||||
TIM_MasterConfigTypeDef sMasterConfig = {0};
|
||||
TIM_OC_InitTypeDef sConfigOC = {0};
|
||||
TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0};
|
||||
|
||||
htim1.Instance = TIM1;
|
||||
htim1.Init.Prescaler = 0;
|
||||
htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
|
||||
htim1.Init.Period = 65535;
|
||||
htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
|
||||
htim1.Init.RepetitionCounter = 0;
|
||||
htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
|
||||
if (HAL_TIM_Base_Init(&htim1) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
|
||||
if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
if (HAL_TIM_OC_Init(&htim1) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
if (HAL_TIM_PWM_Init(&htim1) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
|
||||
sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET;
|
||||
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
|
||||
if (HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
sConfigOC.OCMode = TIM_OCMODE_TIMING;
|
||||
sConfigOC.Pulse = 0;
|
||||
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
|
||||
sConfigOC.OCNPolarity = TIM_OCNPOLARITY_HIGH;
|
||||
sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
|
||||
sConfigOC.OCIdleState = TIM_OCIDLESTATE_RESET;
|
||||
sConfigOC.OCNIdleState = TIM_OCNIDLESTATE_RESET;
|
||||
if (HAL_TIM_OC_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
sConfigOC.OCMode = TIM_OCMODE_PWM1;
|
||||
if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_DISABLE;
|
||||
sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE;
|
||||
sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF;
|
||||
sBreakDeadTimeConfig.DeadTime = 0;
|
||||
sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE;
|
||||
sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH;
|
||||
sBreakDeadTimeConfig.BreakFilter = 0;
|
||||
sBreakDeadTimeConfig.BreakAFMode = TIM_BREAK_AFMODE_INPUT;
|
||||
sBreakDeadTimeConfig.Break2State = TIM_BREAK2_DISABLE;
|
||||
sBreakDeadTimeConfig.Break2Polarity = TIM_BREAK2POLARITY_HIGH;
|
||||
sBreakDeadTimeConfig.Break2Filter = 0;
|
||||
sBreakDeadTimeConfig.Break2AFMode = TIM_BREAK_AFMODE_INPUT;
|
||||
sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE;
|
||||
if (HAL_TIMEx_ConfigBreakDeadTime(&htim1, &sBreakDeadTimeConfig) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
HAL_TIM_MspPostInit(&htim1);
|
||||
void MX_TIM1_Init(void) {
|
||||
TIM_ClockConfigTypeDef sClockSourceConfig = {0};
|
||||
TIM_MasterConfigTypeDef sMasterConfig = {0};
|
||||
TIM_OC_InitTypeDef sConfigOC = {0};
|
||||
TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0};
|
||||
|
||||
htim1.Instance = TIM1;
|
||||
htim1.Init.Prescaler = 0;
|
||||
htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
|
||||
htim1.Init.Period = 65535;
|
||||
htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
|
||||
htim1.Init.RepetitionCounter = 0;
|
||||
htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
|
||||
if(HAL_TIM_Base_Init(&htim1) != HAL_OK) {
|
||||
Error_Handler();
|
||||
}
|
||||
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
|
||||
if(HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK) {
|
||||
Error_Handler();
|
||||
}
|
||||
if(HAL_TIM_OC_Init(&htim1) != HAL_OK) {
|
||||
Error_Handler();
|
||||
}
|
||||
if(HAL_TIM_PWM_Init(&htim1) != HAL_OK) {
|
||||
Error_Handler();
|
||||
}
|
||||
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
|
||||
sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET;
|
||||
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
|
||||
if(HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig) != HAL_OK) {
|
||||
Error_Handler();
|
||||
}
|
||||
sConfigOC.OCMode = TIM_OCMODE_TIMING;
|
||||
sConfigOC.Pulse = 0;
|
||||
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
|
||||
sConfigOC.OCNPolarity = TIM_OCNPOLARITY_HIGH;
|
||||
sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
|
||||
sConfigOC.OCIdleState = TIM_OCIDLESTATE_RESET;
|
||||
sConfigOC.OCNIdleState = TIM_OCNIDLESTATE_RESET;
|
||||
if(HAL_TIM_OC_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) {
|
||||
Error_Handler();
|
||||
}
|
||||
sConfigOC.OCMode = TIM_OCMODE_PWM1;
|
||||
if(HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) {
|
||||
Error_Handler();
|
||||
}
|
||||
sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_DISABLE;
|
||||
sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE;
|
||||
sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF;
|
||||
sBreakDeadTimeConfig.DeadTime = 0;
|
||||
sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE;
|
||||
sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH;
|
||||
sBreakDeadTimeConfig.BreakFilter = 0;
|
||||
sBreakDeadTimeConfig.BreakAFMode = TIM_BREAK_AFMODE_INPUT;
|
||||
sBreakDeadTimeConfig.Break2State = TIM_BREAK2_DISABLE;
|
||||
sBreakDeadTimeConfig.Break2Polarity = TIM_BREAK2POLARITY_HIGH;
|
||||
sBreakDeadTimeConfig.Break2Filter = 0;
|
||||
sBreakDeadTimeConfig.Break2AFMode = TIM_BREAK_AFMODE_INPUT;
|
||||
sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE;
|
||||
if(HAL_TIMEx_ConfigBreakDeadTime(&htim1, &sBreakDeadTimeConfig) != HAL_OK) {
|
||||
Error_Handler();
|
||||
}
|
||||
HAL_TIM_MspPostInit(&htim1);
|
||||
}
|
||||
/* TIM2 init function */
|
||||
void MX_TIM2_Init(void)
|
||||
{
|
||||
TIM_ClockConfigTypeDef sClockSourceConfig = {0};
|
||||
TIM_MasterConfigTypeDef sMasterConfig = {0};
|
||||
TIM_IC_InitTypeDef sConfigIC = {0};
|
||||
|
||||
htim2.Instance = TIM2;
|
||||
htim2.Init.Prescaler = 64-1;
|
||||
htim2.Init.CounterMode = TIM_COUNTERMODE_UP;
|
||||
htim2.Init.Period = 4294967295;
|
||||
htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
|
||||
htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE;
|
||||
if (HAL_TIM_Base_Init(&htim2) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
|
||||
if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
if (HAL_TIM_IC_Init(&htim2) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
|
||||
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
|
||||
if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
sConfigIC.ICPolarity = TIM_INPUTCHANNELPOLARITY_FALLING;
|
||||
sConfigIC.ICSelection = TIM_ICSELECTION_DIRECTTI;
|
||||
sConfigIC.ICPrescaler = TIM_ICPSC_DIV1;
|
||||
sConfigIC.ICFilter = 0;
|
||||
if (HAL_TIM_IC_ConfigChannel(&htim2, &sConfigIC, TIM_CHANNEL_1) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
sConfigIC.ICPolarity = TIM_INPUTCHANNELPOLARITY_RISING;
|
||||
sConfigIC.ICSelection = TIM_ICSELECTION_INDIRECTTI;
|
||||
if (HAL_TIM_IC_ConfigChannel(&htim2, &sConfigIC, TIM_CHANNEL_2) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
void MX_TIM2_Init(void) {
|
||||
TIM_ClockConfigTypeDef sClockSourceConfig = {0};
|
||||
TIM_MasterConfigTypeDef sMasterConfig = {0};
|
||||
TIM_IC_InitTypeDef sConfigIC = {0};
|
||||
|
||||
htim2.Instance = TIM2;
|
||||
htim2.Init.Prescaler = 64 - 1;
|
||||
htim2.Init.CounterMode = TIM_COUNTERMODE_UP;
|
||||
htim2.Init.Period = 4294967295;
|
||||
htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
|
||||
htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE;
|
||||
if(HAL_TIM_Base_Init(&htim2) != HAL_OK) {
|
||||
Error_Handler();
|
||||
}
|
||||
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
|
||||
if(HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK) {
|
||||
Error_Handler();
|
||||
}
|
||||
if(HAL_TIM_IC_Init(&htim2) != HAL_OK) {
|
||||
Error_Handler();
|
||||
}
|
||||
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
|
||||
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
|
||||
if(HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK) {
|
||||
Error_Handler();
|
||||
}
|
||||
sConfigIC.ICPolarity = TIM_INPUTCHANNELPOLARITY_FALLING;
|
||||
sConfigIC.ICSelection = TIM_ICSELECTION_DIRECTTI;
|
||||
sConfigIC.ICPrescaler = TIM_ICPSC_DIV1;
|
||||
sConfigIC.ICFilter = 0;
|
||||
if(HAL_TIM_IC_ConfigChannel(&htim2, &sConfigIC, TIM_CHANNEL_1) != HAL_OK) {
|
||||
Error_Handler();
|
||||
}
|
||||
sConfigIC.ICPolarity = TIM_INPUTCHANNELPOLARITY_RISING;
|
||||
sConfigIC.ICSelection = TIM_ICSELECTION_INDIRECTTI;
|
||||
if(HAL_TIM_IC_ConfigChannel(&htim2, &sConfigIC, TIM_CHANNEL_2) != HAL_OK) {
|
||||
Error_Handler();
|
||||
}
|
||||
}
|
||||
/* TIM16 init function */
|
||||
void MX_TIM16_Init(void)
|
||||
{
|
||||
TIM_OC_InitTypeDef sConfigOC = {0};
|
||||
TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0};
|
||||
|
||||
htim16.Instance = TIM16;
|
||||
htim16.Init.Prescaler = 500 - 1;
|
||||
htim16.Init.CounterMode = TIM_COUNTERMODE_UP;
|
||||
htim16.Init.Period = 291;
|
||||
htim16.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
|
||||
htim16.Init.RepetitionCounter = 0;
|
||||
htim16.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
|
||||
if (HAL_TIM_Base_Init(&htim16) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
if (HAL_TIM_PWM_Init(&htim16) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
sConfigOC.OCMode = TIM_OCMODE_PWM1;
|
||||
sConfigOC.Pulse = 145;
|
||||
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
|
||||
sConfigOC.OCNPolarity = TIM_OCNPOLARITY_HIGH;
|
||||
sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
|
||||
sConfigOC.OCIdleState = TIM_OCIDLESTATE_RESET;
|
||||
sConfigOC.OCNIdleState = TIM_OCNIDLESTATE_RESET;
|
||||
if (HAL_TIM_PWM_ConfigChannel(&htim16, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_DISABLE;
|
||||
sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE;
|
||||
sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF;
|
||||
sBreakDeadTimeConfig.DeadTime = 0;
|
||||
sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE;
|
||||
sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH;
|
||||
sBreakDeadTimeConfig.BreakFilter = 0;
|
||||
sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE;
|
||||
if (HAL_TIMEx_ConfigBreakDeadTime(&htim16, &sBreakDeadTimeConfig) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
HAL_TIM_MspPostInit(&htim16);
|
||||
void MX_TIM16_Init(void) {
|
||||
TIM_OC_InitTypeDef sConfigOC = {0};
|
||||
TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0};
|
||||
|
||||
htim16.Instance = TIM16;
|
||||
htim16.Init.Prescaler = 500 - 1;
|
||||
htim16.Init.CounterMode = TIM_COUNTERMODE_UP;
|
||||
htim16.Init.Period = 291;
|
||||
htim16.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
|
||||
htim16.Init.RepetitionCounter = 0;
|
||||
htim16.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
|
||||
if(HAL_TIM_Base_Init(&htim16) != HAL_OK) {
|
||||
Error_Handler();
|
||||
}
|
||||
if(HAL_TIM_PWM_Init(&htim16) != HAL_OK) {
|
||||
Error_Handler();
|
||||
}
|
||||
sConfigOC.OCMode = TIM_OCMODE_PWM1;
|
||||
sConfigOC.Pulse = 145;
|
||||
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
|
||||
sConfigOC.OCNPolarity = TIM_OCNPOLARITY_HIGH;
|
||||
sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
|
||||
sConfigOC.OCIdleState = TIM_OCIDLESTATE_RESET;
|
||||
sConfigOC.OCNIdleState = TIM_OCNIDLESTATE_RESET;
|
||||
if(HAL_TIM_PWM_ConfigChannel(&htim16, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) {
|
||||
Error_Handler();
|
||||
}
|
||||
sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_DISABLE;
|
||||
sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE;
|
||||
sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF;
|
||||
sBreakDeadTimeConfig.DeadTime = 0;
|
||||
sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE;
|
||||
sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH;
|
||||
sBreakDeadTimeConfig.BreakFilter = 0;
|
||||
sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE;
|
||||
if(HAL_TIMEx_ConfigBreakDeadTime(&htim16, &sBreakDeadTimeConfig) != HAL_OK) {
|
||||
Error_Handler();
|
||||
}
|
||||
HAL_TIM_MspPostInit(&htim16);
|
||||
}
|
||||
|
||||
void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* tim_baseHandle)
|
||||
{
|
||||
void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* tim_baseHandle) {
|
||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||
if(tim_baseHandle->Instance == TIM1) {
|
||||
/* USER CODE BEGIN TIM1_MspInit 0 */
|
||||
|
||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||
if(tim_baseHandle->Instance==TIM1)
|
||||
{
|
||||
/* USER CODE BEGIN TIM1_MspInit 0 */
|
||||
/* USER CODE END TIM1_MspInit 0 */
|
||||
/* TIM1 clock enable */
|
||||
__HAL_RCC_TIM1_CLK_ENABLE();
|
||||
|
||||
/* USER CODE END TIM1_MspInit 0 */
|
||||
/* TIM1 clock enable */
|
||||
__HAL_RCC_TIM1_CLK_ENABLE();
|
||||
/* TIM1 interrupt Init */
|
||||
HAL_NVIC_SetPriority(TIM1_TRG_COM_TIM17_IRQn, 0, 0);
|
||||
HAL_NVIC_EnableIRQ(TIM1_TRG_COM_TIM17_IRQn);
|
||||
/* USER CODE BEGIN TIM1_MspInit 1 */
|
||||
|
||||
/* TIM1 interrupt Init */
|
||||
HAL_NVIC_SetPriority(TIM1_TRG_COM_TIM17_IRQn, 0, 0);
|
||||
HAL_NVIC_EnableIRQ(TIM1_TRG_COM_TIM17_IRQn);
|
||||
/* USER CODE BEGIN TIM1_MspInit 1 */
|
||||
/* USER CODE END TIM1_MspInit 1 */
|
||||
} else if(tim_baseHandle->Instance == TIM2) {
|
||||
/* USER CODE BEGIN TIM2_MspInit 0 */
|
||||
|
||||
/* USER CODE END TIM1_MspInit 1 */
|
||||
}
|
||||
else if(tim_baseHandle->Instance==TIM2)
|
||||
{
|
||||
/* USER CODE BEGIN TIM2_MspInit 0 */
|
||||
/* USER CODE END TIM2_MspInit 0 */
|
||||
/* TIM2 clock enable */
|
||||
__HAL_RCC_TIM2_CLK_ENABLE();
|
||||
|
||||
/* USER CODE END TIM2_MspInit 0 */
|
||||
/* TIM2 clock enable */
|
||||
__HAL_RCC_TIM2_CLK_ENABLE();
|
||||
|
||||
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||
/**TIM2 GPIO Configuration
|
||||
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||
/**TIM2 GPIO Configuration
|
||||
PA0 ------> TIM2_CH1
|
||||
*/
|
||||
GPIO_InitStruct.Pin = IR_RX_Pin;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF1_TIM2;
|
||||
HAL_GPIO_Init(IR_RX_GPIO_Port, &GPIO_InitStruct);
|
||||
GPIO_InitStruct.Pin = IR_RX_Pin;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF1_TIM2;
|
||||
HAL_GPIO_Init(IR_RX_GPIO_Port, &GPIO_InitStruct);
|
||||
|
||||
/* TIM2 interrupt Init */
|
||||
HAL_NVIC_SetPriority(TIM2_IRQn, 5, 0);
|
||||
HAL_NVIC_EnableIRQ(TIM2_IRQn);
|
||||
/* USER CODE BEGIN TIM2_MspInit 1 */
|
||||
/* TIM2 interrupt Init */
|
||||
HAL_NVIC_SetPriority(TIM2_IRQn, 5, 0);
|
||||
HAL_NVIC_EnableIRQ(TIM2_IRQn);
|
||||
/* USER CODE BEGIN TIM2_MspInit 1 */
|
||||
|
||||
/* USER CODE END TIM2_MspInit 1 */
|
||||
}
|
||||
else if(tim_baseHandle->Instance==TIM16)
|
||||
{
|
||||
/* USER CODE BEGIN TIM16_MspInit 0 */
|
||||
/* USER CODE END TIM2_MspInit 1 */
|
||||
} else if(tim_baseHandle->Instance == TIM16) {
|
||||
/* USER CODE BEGIN TIM16_MspInit 0 */
|
||||
|
||||
/* USER CODE END TIM16_MspInit 0 */
|
||||
/* TIM16 clock enable */
|
||||
__HAL_RCC_TIM16_CLK_ENABLE();
|
||||
/* USER CODE BEGIN TIM16_MspInit 1 */
|
||||
/* USER CODE END TIM16_MspInit 0 */
|
||||
/* TIM16 clock enable */
|
||||
__HAL_RCC_TIM16_CLK_ENABLE();
|
||||
/* USER CODE BEGIN TIM16_MspInit 1 */
|
||||
|
||||
/* USER CODE END TIM16_MspInit 1 */
|
||||
}
|
||||
/* USER CODE END TIM16_MspInit 1 */
|
||||
}
|
||||
}
|
||||
void HAL_TIM_MspPostInit(TIM_HandleTypeDef* timHandle)
|
||||
{
|
||||
void HAL_TIM_MspPostInit(TIM_HandleTypeDef* timHandle) {
|
||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||
if(timHandle->Instance == TIM1) {
|
||||
/* USER CODE BEGIN TIM1_MspPostInit 0 */
|
||||
|
||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||
if(timHandle->Instance==TIM1)
|
||||
{
|
||||
/* USER CODE BEGIN TIM1_MspPostInit 0 */
|
||||
|
||||
/* USER CODE END TIM1_MspPostInit 0 */
|
||||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||
/**TIM1 GPIO Configuration
|
||||
/* USER CODE END TIM1_MspPostInit 0 */
|
||||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||
/**TIM1 GPIO Configuration
|
||||
PB9 ------> TIM1_CH3N
|
||||
PB13 ------> TIM1_CH1N
|
||||
*/
|
||||
GPIO_InitStruct.Pin = IR_TX_Pin|RFID_OUT_Pin;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF1_TIM1;
|
||||
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||
GPIO_InitStruct.Pin = IR_TX_Pin | RFID_OUT_Pin;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF1_TIM1;
|
||||
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||
|
||||
/* USER CODE BEGIN TIM1_MspPostInit 1 */
|
||||
/* USER CODE BEGIN TIM1_MspPostInit 1 */
|
||||
|
||||
/* USER CODE END TIM1_MspPostInit 1 */
|
||||
}
|
||||
else if(timHandle->Instance==TIM16)
|
||||
{
|
||||
/* USER CODE BEGIN TIM16_MspPostInit 0 */
|
||||
/* USER CODE END TIM1_MspPostInit 1 */
|
||||
} else if(timHandle->Instance == TIM16) {
|
||||
/* USER CODE BEGIN TIM16_MspPostInit 0 */
|
||||
|
||||
/* USER CODE END TIM16_MspPostInit 0 */
|
||||
/* USER CODE END TIM16_MspPostInit 0 */
|
||||
|
||||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||
/**TIM16 GPIO Configuration
|
||||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||
/**TIM16 GPIO Configuration
|
||||
PB8 ------> TIM16_CH1
|
||||
*/
|
||||
GPIO_InitStruct.Pin = SPEAKER_Pin;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF14_TIM16;
|
||||
HAL_GPIO_Init(SPEAKER_GPIO_Port, &GPIO_InitStruct);
|
||||
GPIO_InitStruct.Pin = SPEAKER_Pin;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF14_TIM16;
|
||||
HAL_GPIO_Init(SPEAKER_GPIO_Port, &GPIO_InitStruct);
|
||||
|
||||
/* USER CODE BEGIN TIM16_MspPostInit 1 */
|
||||
|
||||
/* USER CODE END TIM16_MspPostInit 1 */
|
||||
}
|
||||
/* USER CODE BEGIN TIM16_MspPostInit 1 */
|
||||
|
||||
/* USER CODE END TIM16_MspPostInit 1 */
|
||||
}
|
||||
}
|
||||
|
||||
void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* tim_baseHandle)
|
||||
{
|
||||
void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* tim_baseHandle) {
|
||||
if(tim_baseHandle->Instance == TIM1) {
|
||||
/* USER CODE BEGIN TIM1_MspDeInit 0 */
|
||||
|
||||
if(tim_baseHandle->Instance==TIM1)
|
||||
{
|
||||
/* USER CODE BEGIN TIM1_MspDeInit 0 */
|
||||
/* USER CODE END TIM1_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_TIM1_CLK_DISABLE();
|
||||
|
||||
/* USER CODE END TIM1_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_TIM1_CLK_DISABLE();
|
||||
/* TIM1 interrupt Deinit */
|
||||
HAL_NVIC_DisableIRQ(TIM1_TRG_COM_TIM17_IRQn);
|
||||
/* USER CODE BEGIN TIM1_MspDeInit 1 */
|
||||
|
||||
/* TIM1 interrupt Deinit */
|
||||
HAL_NVIC_DisableIRQ(TIM1_TRG_COM_TIM17_IRQn);
|
||||
/* USER CODE BEGIN TIM1_MspDeInit 1 */
|
||||
/* USER CODE END TIM1_MspDeInit 1 */
|
||||
} else if(tim_baseHandle->Instance == TIM2) {
|
||||
/* USER CODE BEGIN TIM2_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END TIM1_MspDeInit 1 */
|
||||
}
|
||||
else if(tim_baseHandle->Instance==TIM2)
|
||||
{
|
||||
/* USER CODE BEGIN TIM2_MspDeInit 0 */
|
||||
/* USER CODE END TIM2_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_TIM2_CLK_DISABLE();
|
||||
|
||||
/* USER CODE END TIM2_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_TIM2_CLK_DISABLE();
|
||||
|
||||
/**TIM2 GPIO Configuration
|
||||
/**TIM2 GPIO Configuration
|
||||
PA0 ------> TIM2_CH1
|
||||
*/
|
||||
HAL_GPIO_DeInit(IR_RX_GPIO_Port, IR_RX_Pin);
|
||||
HAL_GPIO_DeInit(IR_RX_GPIO_Port, IR_RX_Pin);
|
||||
|
||||
/* TIM2 interrupt Deinit */
|
||||
HAL_NVIC_DisableIRQ(TIM2_IRQn);
|
||||
/* USER CODE BEGIN TIM2_MspDeInit 1 */
|
||||
/* TIM2 interrupt Deinit */
|
||||
HAL_NVIC_DisableIRQ(TIM2_IRQn);
|
||||
/* USER CODE BEGIN TIM2_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END TIM2_MspDeInit 1 */
|
||||
}
|
||||
else if(tim_baseHandle->Instance==TIM16)
|
||||
{
|
||||
/* USER CODE BEGIN TIM16_MspDeInit 0 */
|
||||
/* USER CODE END TIM2_MspDeInit 1 */
|
||||
} else if(tim_baseHandle->Instance == TIM16) {
|
||||
/* USER CODE BEGIN TIM16_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END TIM16_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_TIM16_CLK_DISABLE();
|
||||
/* USER CODE BEGIN TIM16_MspDeInit 1 */
|
||||
/* USER CODE END TIM16_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_TIM16_CLK_DISABLE();
|
||||
/* USER CODE BEGIN TIM16_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END TIM16_MspDeInit 1 */
|
||||
}
|
||||
/* USER CODE END TIM16_MspDeInit 1 */
|
||||
}
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN 1 */
|
||||
|
Reference in New Issue
Block a user