[FL-2149] SubGhz: Additional frequencies for testing (#920)
* SubGhz: add new frequency for testing * [FL-2149] SubGhz: power reduction for Australia Co-authored-by: あく <alleteam@gmail.com>
This commit is contained in:
parent
cdfc420ddf
commit
51aa169c3b
34
applications/subghz/helpers/subghz_testing.c
Normal file
34
applications/subghz/helpers/subghz_testing.c
Normal file
@ -0,0 +1,34 @@
|
|||||||
|
#include "subghz_testing.h"
|
||||||
|
|
||||||
|
const uint32_t subghz_frequencies_testing[] = {
|
||||||
|
/* 300 - 348 */
|
||||||
|
300000000,
|
||||||
|
304500000,
|
||||||
|
313250000,
|
||||||
|
315000000,
|
||||||
|
321950000,
|
||||||
|
348000000,
|
||||||
|
/* 387 - 464 */
|
||||||
|
387000000,
|
||||||
|
433075000, /* LPD433 first */
|
||||||
|
433825000,
|
||||||
|
433920000, /* LPD433 mid */
|
||||||
|
434420000,
|
||||||
|
434775000, /* LPD433 last channels */
|
||||||
|
438900000,
|
||||||
|
464000000,
|
||||||
|
/* 779 - 928 */
|
||||||
|
779000000,
|
||||||
|
868150000,
|
||||||
|
868350000,
|
||||||
|
868550000,
|
||||||
|
915000000,
|
||||||
|
925000000,
|
||||||
|
926500000,
|
||||||
|
927950000,
|
||||||
|
928000000,
|
||||||
|
};
|
||||||
|
|
||||||
|
const uint32_t subghz_frequencies_count_testing =
|
||||||
|
sizeof(subghz_frequencies_testing) / sizeof(uint32_t);
|
||||||
|
const uint32_t subghz_frequencies_433_92_testing = 9;
|
6
applications/subghz/helpers/subghz_testing.h
Normal file
6
applications/subghz/helpers/subghz_testing.h
Normal file
@ -0,0 +1,6 @@
|
|||||||
|
#pragma once
|
||||||
|
#include "../subghz_i.h"
|
||||||
|
|
||||||
|
extern const uint32_t subghz_frequencies_testing[];
|
||||||
|
extern const uint32_t subghz_frequencies_count_testing;
|
||||||
|
extern const uint32_t subghz_frequencies_433_92_testing;
|
@ -1,5 +1,6 @@
|
|||||||
#include "subghz_test_carrier.h"
|
#include "subghz_test_carrier.h"
|
||||||
#include "../subghz_i.h"
|
#include "../subghz_i.h"
|
||||||
|
#include "../helpers/subghz_testing.h"
|
||||||
|
|
||||||
#include <math.h>
|
#include <math.h>
|
||||||
#include <furi.h>
|
#include <furi.h>
|
||||||
@ -94,7 +95,7 @@ bool subghz_test_carrier_input(InputEvent* event, void* context) {
|
|||||||
if(event->key == InputKeyLeft) {
|
if(event->key == InputKeyLeft) {
|
||||||
if(model->frequency > 0) model->frequency--;
|
if(model->frequency > 0) model->frequency--;
|
||||||
} else if(event->key == InputKeyRight) {
|
} else if(event->key == InputKeyRight) {
|
||||||
if(model->frequency < subghz_frequencies_count - 1) model->frequency++;
|
if(model->frequency < subghz_frequencies_count_testing - 1) model->frequency++;
|
||||||
} else if(event->key == InputKeyDown) {
|
} else if(event->key == InputKeyDown) {
|
||||||
if(model->path > 0) model->path--;
|
if(model->path > 0) model->path--;
|
||||||
} else if(event->key == InputKeyUp) {
|
} else if(event->key == InputKeyUp) {
|
||||||
@ -108,7 +109,7 @@ bool subghz_test_carrier_input(InputEvent* event, void* context) {
|
|||||||
}
|
}
|
||||||
|
|
||||||
model->real_frequency =
|
model->real_frequency =
|
||||||
furi_hal_subghz_set_frequency(subghz_frequencies[model->frequency]);
|
furi_hal_subghz_set_frequency(subghz_frequencies_testing[model->frequency]);
|
||||||
furi_hal_subghz_set_path(model->path);
|
furi_hal_subghz_set_path(model->path);
|
||||||
|
|
||||||
if(model->status == SubghzTestCarrierModelStatusRx) {
|
if(model->status == SubghzTestCarrierModelStatusRx) {
|
||||||
@ -141,9 +142,9 @@ void subghz_test_carrier_enter(void* context) {
|
|||||||
|
|
||||||
with_view_model(
|
with_view_model(
|
||||||
subghz_test_carrier->view, (SubghzTestCarrierModel * model) {
|
subghz_test_carrier->view, (SubghzTestCarrierModel * model) {
|
||||||
model->frequency = subghz_frequencies_433_92; // 433
|
model->frequency = subghz_frequencies_433_92_testing; // 433
|
||||||
model->real_frequency =
|
model->real_frequency =
|
||||||
furi_hal_subghz_set_frequency(subghz_frequencies[model->frequency]);
|
furi_hal_subghz_set_frequency(subghz_frequencies_testing[model->frequency]);
|
||||||
model->path = FuriHalSubGhzPathIsolate; // isolate
|
model->path = FuriHalSubGhzPathIsolate; // isolate
|
||||||
model->rssi = 0.0f;
|
model->rssi = 0.0f;
|
||||||
model->status = SubghzTestCarrierModelStatusRx;
|
model->status = SubghzTestCarrierModelStatusRx;
|
||||||
|
@ -1,5 +1,6 @@
|
|||||||
#include "subghz_test_packet.h"
|
#include "subghz_test_packet.h"
|
||||||
#include "../subghz_i.h"
|
#include "../subghz_i.h"
|
||||||
|
#include "../helpers/subghz_testing.h"
|
||||||
|
|
||||||
#include <math.h>
|
#include <math.h>
|
||||||
#include <furi.h>
|
#include <furi.h>
|
||||||
@ -144,7 +145,7 @@ static bool subghz_test_packet_input(InputEvent* event, void* context) {
|
|||||||
if(event->key == InputKeyLeft) {
|
if(event->key == InputKeyLeft) {
|
||||||
if(model->frequency > 0) model->frequency--;
|
if(model->frequency > 0) model->frequency--;
|
||||||
} else if(event->key == InputKeyRight) {
|
} else if(event->key == InputKeyRight) {
|
||||||
if(model->frequency < subghz_frequencies_count - 1) model->frequency++;
|
if(model->frequency < subghz_frequencies_count_testing - 1) model->frequency++;
|
||||||
} else if(event->key == InputKeyDown) {
|
} else if(event->key == InputKeyDown) {
|
||||||
if(model->path > 0) model->path--;
|
if(model->path > 0) model->path--;
|
||||||
} else if(event->key == InputKeyUp) {
|
} else if(event->key == InputKeyUp) {
|
||||||
@ -158,7 +159,7 @@ static bool subghz_test_packet_input(InputEvent* event, void* context) {
|
|||||||
}
|
}
|
||||||
|
|
||||||
model->real_frequency =
|
model->real_frequency =
|
||||||
furi_hal_subghz_set_frequency(subghz_frequencies[model->frequency]);
|
furi_hal_subghz_set_frequency(subghz_frequencies_testing[model->frequency]);
|
||||||
furi_hal_subghz_set_path(model->path);
|
furi_hal_subghz_set_path(model->path);
|
||||||
|
|
||||||
if(model->status == SubghzTestPacketModelStatusRx) {
|
if(model->status == SubghzTestPacketModelStatusRx) {
|
||||||
@ -168,7 +169,7 @@ static bool subghz_test_packet_input(InputEvent* event, void* context) {
|
|||||||
instance->encoder,
|
instance->encoder,
|
||||||
0x00AABBCC,
|
0x00AABBCC,
|
||||||
SUBGHZ_TEST_PACKET_COUNT,
|
SUBGHZ_TEST_PACKET_COUNT,
|
||||||
subghz_frequencies[model->frequency]);
|
subghz_frequencies_testing[model->frequency]);
|
||||||
if(!furi_hal_subghz_start_async_tx(
|
if(!furi_hal_subghz_start_async_tx(
|
||||||
subghz_encoder_princeton_yield, instance->encoder)) {
|
subghz_encoder_princeton_yield, instance->encoder)) {
|
||||||
model->status = SubghzTestPacketModelStatusOnlyRx;
|
model->status = SubghzTestPacketModelStatusOnlyRx;
|
||||||
@ -191,9 +192,9 @@ void subghz_test_packet_enter(void* context) {
|
|||||||
|
|
||||||
with_view_model(
|
with_view_model(
|
||||||
instance->view, (SubghzTestPacketModel * model) {
|
instance->view, (SubghzTestPacketModel * model) {
|
||||||
model->frequency = subghz_frequencies_433_92;
|
model->frequency = subghz_frequencies_433_92_testing;
|
||||||
model->real_frequency =
|
model->real_frequency =
|
||||||
furi_hal_subghz_set_frequency(subghz_frequencies[model->frequency]);
|
furi_hal_subghz_set_frequency(subghz_frequencies_testing[model->frequency]);
|
||||||
model->path = FuriHalSubGhzPathIsolate; // isolate
|
model->path = FuriHalSubGhzPathIsolate; // isolate
|
||||||
model->rssi = 0.0f;
|
model->rssi = 0.0f;
|
||||||
model->status = SubghzTestPacketModelStatusRx;
|
model->status = SubghzTestPacketModelStatusRx;
|
||||||
|
@ -1,5 +1,6 @@
|
|||||||
#include "subghz_test_static.h"
|
#include "subghz_test_static.h"
|
||||||
#include "../subghz_i.h"
|
#include "../subghz_i.h"
|
||||||
|
#include "../helpers/subghz_testing.h"
|
||||||
|
|
||||||
#include <math.h>
|
#include <math.h>
|
||||||
#include <furi.h>
|
#include <furi.h>
|
||||||
@ -81,7 +82,7 @@ bool subghz_test_static_input(InputEvent* event, void* context) {
|
|||||||
if(event->key == InputKeyLeft) {
|
if(event->key == InputKeyLeft) {
|
||||||
if(model->frequency > 0) model->frequency--;
|
if(model->frequency > 0) model->frequency--;
|
||||||
} else if(event->key == InputKeyRight) {
|
} else if(event->key == InputKeyRight) {
|
||||||
if(model->frequency < subghz_frequencies_count - 1) model->frequency++;
|
if(model->frequency < subghz_frequencies_count_testing - 1) model->frequency++;
|
||||||
} else if(event->key == InputKeyDown) {
|
} else if(event->key == InputKeyDown) {
|
||||||
if(model->button > 0) model->button--;
|
if(model->button > 0) model->button--;
|
||||||
} else if(event->key == InputKeyUp) {
|
} else if(event->key == InputKeyUp) {
|
||||||
@ -89,13 +90,14 @@ bool subghz_test_static_input(InputEvent* event, void* context) {
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
model->real_frequency = subghz_frequencies[model->frequency];
|
model->real_frequency = subghz_frequencies_testing[model->frequency];
|
||||||
|
|
||||||
if(event->key == InputKeyOk) {
|
if(event->key == InputKeyOk) {
|
||||||
NotificationApp* notification = furi_record_open("notification");
|
NotificationApp* notification = furi_record_open("notification");
|
||||||
if(event->type == InputTypePress) {
|
if(event->type == InputTypePress) {
|
||||||
furi_hal_subghz_idle();
|
furi_hal_subghz_idle();
|
||||||
furi_hal_subghz_set_frequency_and_path(subghz_frequencies[model->frequency]);
|
furi_hal_subghz_set_frequency_and_path(
|
||||||
|
subghz_frequencies_testing[model->frequency]);
|
||||||
if(!furi_hal_subghz_tx()) {
|
if(!furi_hal_subghz_tx()) {
|
||||||
instance->callback(SubghzTestStaticEventOnlyRx, instance->context);
|
instance->callback(SubghzTestStaticEventOnlyRx, instance->context);
|
||||||
} else {
|
} else {
|
||||||
@ -107,7 +109,7 @@ bool subghz_test_static_input(InputEvent* event, void* context) {
|
|||||||
instance->encoder,
|
instance->encoder,
|
||||||
subghz_test_static_keys[model->button],
|
subghz_test_static_keys[model->button],
|
||||||
10000,
|
10000,
|
||||||
subghz_frequencies[model->frequency]);
|
subghz_frequencies_testing[model->frequency]);
|
||||||
|
|
||||||
furi_hal_subghz_start_async_tx(
|
furi_hal_subghz_start_async_tx(
|
||||||
subghz_encoder_princeton_yield, instance->encoder);
|
subghz_encoder_princeton_yield, instance->encoder);
|
||||||
@ -145,8 +147,8 @@ void subghz_test_static_enter(void* context) {
|
|||||||
|
|
||||||
with_view_model(
|
with_view_model(
|
||||||
instance->view, (SubghzTestStaticModel * model) {
|
instance->view, (SubghzTestStaticModel * model) {
|
||||||
model->frequency = subghz_frequencies_433_92;
|
model->frequency = subghz_frequencies_433_92_testing;
|
||||||
model->real_frequency = subghz_frequencies[model->frequency];
|
model->real_frequency = subghz_frequencies_testing[model->frequency];
|
||||||
model->button = 0;
|
model->button = 0;
|
||||||
|
|
||||||
return true;
|
return true;
|
||||||
|
@ -1,5 +1,6 @@
|
|||||||
#include "furi-hal-subghz.h"
|
#include "furi-hal-subghz.h"
|
||||||
#include "furi-hal-version.h"
|
#include "furi-hal-version.h"
|
||||||
|
#include "furi-hal-rtc.h"
|
||||||
|
|
||||||
#include <furi-hal-gpio.h>
|
#include <furi-hal-gpio.h>
|
||||||
#include <furi-hal-spi.h>
|
#include <furi-hal-spi.h>
|
||||||
@ -14,6 +15,7 @@
|
|||||||
|
|
||||||
static volatile SubGhzState furi_hal_subghz_state = SubGhzStateInit;
|
static volatile SubGhzState furi_hal_subghz_state = SubGhzStateInit;
|
||||||
static volatile SubGhzRegulation furi_hal_subghz_regulation = SubGhzRegulationTxRx;
|
static volatile SubGhzRegulation furi_hal_subghz_regulation = SubGhzRegulationTxRx;
|
||||||
|
static volatile FuriHalSubGhzPreset furi_hal_subghz_preset = FuriHalSubGhzPresetIDLE;
|
||||||
|
|
||||||
static const uint8_t furi_hal_subghz_preset_ook_270khz_async_regs[][2] = {
|
static const uint8_t furi_hal_subghz_preset_ook_270khz_async_regs[][2] = {
|
||||||
// https://e2e.ti.com/support/wireless-connectivity/sub-1-ghz-group/sub-1-ghz/f/sub-1-ghz-forum/382066/cc1101---don-t-know-the-correct-registers-configuration
|
// https://e2e.ti.com/support/wireless-connectivity/sub-1-ghz-group/sub-1-ghz/f/sub-1-ghz-forum/382066/cc1101---don-t-know-the-correct-registers-configuration
|
||||||
@ -296,9 +298,9 @@ static const uint8_t furi_hal_subghz_preset_gfsk_9_99kb_async_regs[][2] = {
|
|||||||
{CC1101_IOCFG0, 0x06}, //GDO0 Output Pin Configuration
|
{CC1101_IOCFG0, 0x06}, //GDO0 Output Pin Configuration
|
||||||
{CC1101_FIFOTHR, 0x47}, //RX FIFO and TX FIFO Thresholds
|
{CC1101_FIFOTHR, 0x47}, //RX FIFO and TX FIFO Thresholds
|
||||||
|
|
||||||
//1 : CRC calculation in TX and CRC check in RX enabled,
|
//1 : CRC calculation in TX and CRC check in RX enabled,
|
||||||
//1 : Variable packet length mode. Packet length configured by the first byte after sync word
|
//1 : Variable packet length mode. Packet length configured by the first byte after sync word
|
||||||
{CC1101_PKTCTRL0,0x05},
|
{CC1101_PKTCTRL0, 0x05},
|
||||||
|
|
||||||
{CC1101_FSCTRL1, 0x06}, //Frequency Synthesizer Control
|
{CC1101_FSCTRL1, 0x06}, //Frequency Synthesizer Control
|
||||||
|
|
||||||
@ -314,8 +316,8 @@ static const uint8_t furi_hal_subghz_preset_gfsk_9_99kb_async_regs[][2] = {
|
|||||||
{CC1101_DEVIATN, 0x34}, //Deviation = 19.042969
|
{CC1101_DEVIATN, 0x34}, //Deviation = 19.042969
|
||||||
{CC1101_MCSM0, 0x18}, //Main Radio Control State Machine Configuration
|
{CC1101_MCSM0, 0x18}, //Main Radio Control State Machine Configuration
|
||||||
{CC1101_FOCCFG, 0x16}, //Frequency Offset Compensation Configuration
|
{CC1101_FOCCFG, 0x16}, //Frequency Offset Compensation Configuration
|
||||||
|
|
||||||
{CC1101_AGCCTRL2, 0x43 }, //AGC Control
|
{CC1101_AGCCTRL2, 0x43}, //AGC Control
|
||||||
{CC1101_AGCCTRL1, 0x40},
|
{CC1101_AGCCTRL1, 0x40},
|
||||||
{CC1101_AGCCTRL0, 0x91},
|
{CC1101_AGCCTRL0, 0x91},
|
||||||
|
|
||||||
@ -333,7 +335,16 @@ static const uint8_t furi_hal_subghz_preset_gfsk_9_99kb_async_regs[][2] = {
|
|||||||
|
|
||||||
static const uint8_t furi_hal_subghz_preset_ook_async_patable[8] = {
|
static const uint8_t furi_hal_subghz_preset_ook_async_patable[8] = {
|
||||||
0x00,
|
0x00,
|
||||||
0xC0, // 10dBm 0xC0, 7dBm 0xC8, 5dBm 0x84, 0dBm 0x60, -10dBm 0x34, -15dBm 0x1D, -20dBm 0x0E, -30dBm 0x12
|
0xC0, // 12dBm 0xC0, 10dBm 0xC5, 7dBm 0xCD, 5dBm 0x86, 0dBm 0x50, -6dBm 0x37, -10dBm 0x26, -15dBm 0x1D, -20dBm 0x17, -30dBm 0x03
|
||||||
|
0x00,
|
||||||
|
0x00,
|
||||||
|
0x00,
|
||||||
|
0x00,
|
||||||
|
0x00,
|
||||||
|
0x00};
|
||||||
|
static const uint8_t furi_hal_subghz_preset_ook_async_patable_au[8] = {
|
||||||
|
0x00,
|
||||||
|
0x86, // 12dBm 0xC0, 10dBm 0xC5, 7dBm 0xCD, 5dBm 0x86, 0dBm 0x50, -6dBm 0x37, -10dBm 0x26, -15dBm 0x1D, -20dBm 0x17, -30dBm 0x03
|
||||||
0x00,
|
0x00,
|
||||||
0x00,
|
0x00,
|
||||||
0x00,
|
0x00,
|
||||||
@ -371,6 +382,7 @@ static const uint8_t furi_hal_subghz_preset_gfsk_async_patable[8] = {
|
|||||||
void furi_hal_subghz_init() {
|
void furi_hal_subghz_init() {
|
||||||
furi_assert(furi_hal_subghz_state == SubGhzStateInit);
|
furi_assert(furi_hal_subghz_state == SubGhzStateInit);
|
||||||
furi_hal_subghz_state = SubGhzStateIdle;
|
furi_hal_subghz_state = SubGhzStateIdle;
|
||||||
|
furi_hal_subghz_preset = FuriHalSubGhzPresetIDLE;
|
||||||
|
|
||||||
furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
|
furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
|
||||||
|
|
||||||
@ -392,7 +404,8 @@ void furi_hal_subghz_init() {
|
|||||||
;
|
;
|
||||||
|
|
||||||
// GD0 high
|
// GD0 high
|
||||||
cc1101_write_reg(&furi_hal_spi_bus_handle_subghz, CC1101_IOCFG0, CC1101IocfgHW | CC1101_IOCFG_INV);
|
cc1101_write_reg(
|
||||||
|
&furi_hal_spi_bus_handle_subghz, CC1101_IOCFG0, CC1101IocfgHW | CC1101_IOCFG_INV);
|
||||||
while(hal_gpio_read(&gpio_cc1101_g0) != true)
|
while(hal_gpio_read(&gpio_cc1101_g0) != true)
|
||||||
;
|
;
|
||||||
|
|
||||||
@ -423,6 +436,8 @@ void furi_hal_subghz_sleep() {
|
|||||||
cc1101_shutdown(&furi_hal_spi_bus_handle_subghz);
|
cc1101_shutdown(&furi_hal_spi_bus_handle_subghz);
|
||||||
|
|
||||||
furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
|
furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
|
||||||
|
|
||||||
|
furi_hal_subghz_preset = FuriHalSubGhzPresetIDLE;
|
||||||
}
|
}
|
||||||
|
|
||||||
void furi_hal_subghz_dump_state() {
|
void furi_hal_subghz_dump_state() {
|
||||||
@ -453,9 +468,10 @@ void furi_hal_subghz_load_preset(FuriHalSubGhzPreset preset) {
|
|||||||
} else if(preset == FuriHalSubGhzPresetGFSK9_99KbAsync) {
|
} else if(preset == FuriHalSubGhzPresetGFSK9_99KbAsync) {
|
||||||
furi_hal_subghz_load_registers(furi_hal_subghz_preset_gfsk_9_99kb_async_regs);
|
furi_hal_subghz_load_registers(furi_hal_subghz_preset_gfsk_9_99kb_async_regs);
|
||||||
furi_hal_subghz_load_patable(furi_hal_subghz_preset_gfsk_async_patable);
|
furi_hal_subghz_load_patable(furi_hal_subghz_preset_gfsk_async_patable);
|
||||||
} else{
|
} else {
|
||||||
furi_crash(NULL);
|
furi_crash(NULL);
|
||||||
}
|
}
|
||||||
|
furi_hal_subghz_preset = preset;
|
||||||
}
|
}
|
||||||
|
|
||||||
void furi_hal_subghz_load_registers(const uint8_t data[][2]) {
|
void furi_hal_subghz_load_registers(const uint8_t data[][2]) {
|
||||||
@ -498,7 +514,8 @@ void furi_hal_subghz_flush_tx() {
|
|||||||
bool furi_hal_subghz_rx_pipe_not_empty() {
|
bool furi_hal_subghz_rx_pipe_not_empty() {
|
||||||
CC1101RxBytes status[1];
|
CC1101RxBytes status[1];
|
||||||
furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
|
furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
|
||||||
cc1101_read_reg(&furi_hal_spi_bus_handle_subghz, (CC1101_STATUS_RXBYTES) | CC1101_BURST, (uint8_t*)status);
|
cc1101_read_reg(
|
||||||
|
&furi_hal_spi_bus_handle_subghz, (CC1101_STATUS_RXBYTES) | CC1101_BURST, (uint8_t*)status);
|
||||||
furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
|
furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
|
||||||
// TODO: you can add a buffer overflow flag if needed
|
// TODO: you can add a buffer overflow flag if needed
|
||||||
if(status->NUM_RXBYTES > 0) {
|
if(status->NUM_RXBYTES > 0) {
|
||||||
@ -627,6 +644,13 @@ bool furi_hal_subghz_is_tx_allowed(uint32_t value) {
|
|||||||
!(value >= 433050000 && value <= 434790000) &&
|
!(value >= 433050000 && value <= 434790000) &&
|
||||||
!(value >= 915000000 && value <= 928000000)) {
|
!(value >= 915000000 && value <= 928000000)) {
|
||||||
} else {
|
} else {
|
||||||
|
if(furi_hal_rtc_is_flag_set(FuriHalRtcFlagDebug)) {
|
||||||
|
if((value >= 304100000 && value <= 315250000) &&
|
||||||
|
((furi_hal_subghz_preset == FuriHalSubGhzPresetOok270Async) ||
|
||||||
|
(furi_hal_subghz_preset == FuriHalSubGhzPresetOok650Async))) {
|
||||||
|
furi_hal_subghz_load_patable(furi_hal_subghz_preset_ook_async_patable_au);
|
||||||
|
}
|
||||||
|
}
|
||||||
is_allowed = true;
|
is_allowed = true;
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
@ -647,14 +671,13 @@ bool furi_hal_subghz_is_tx_allowed(uint32_t value) {
|
|||||||
}
|
}
|
||||||
|
|
||||||
uint32_t furi_hal_subghz_set_frequency(uint32_t value) {
|
uint32_t furi_hal_subghz_set_frequency(uint32_t value) {
|
||||||
furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
|
|
||||||
|
|
||||||
if(furi_hal_subghz_is_tx_allowed(value)) {
|
if(furi_hal_subghz_is_tx_allowed(value)) {
|
||||||
furi_hal_subghz_regulation = SubGhzRegulationTxRx;
|
furi_hal_subghz_regulation = SubGhzRegulationTxRx;
|
||||||
} else {
|
} else {
|
||||||
furi_hal_subghz_regulation = SubGhzRegulationOnlyRx;
|
furi_hal_subghz_regulation = SubGhzRegulationOnlyRx;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
|
||||||
uint32_t real_frequency = cc1101_set_frequency(&furi_hal_spi_bus_handle_subghz, value);
|
uint32_t real_frequency = cc1101_set_frequency(&furi_hal_spi_bus_handle_subghz, value);
|
||||||
cc1101_calibrate(&furi_hal_spi_bus_handle_subghz);
|
cc1101_calibrate(&furi_hal_spi_bus_handle_subghz);
|
||||||
|
|
||||||
@ -672,13 +695,15 @@ void furi_hal_subghz_set_path(FuriHalSubGhzPath path) {
|
|||||||
furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
|
furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
|
||||||
if(path == FuriHalSubGhzPath433) {
|
if(path == FuriHalSubGhzPath433) {
|
||||||
hal_gpio_write(&gpio_rf_sw_0, 0);
|
hal_gpio_write(&gpio_rf_sw_0, 0);
|
||||||
cc1101_write_reg(&furi_hal_spi_bus_handle_subghz, CC1101_IOCFG2, CC1101IocfgHW | CC1101_IOCFG_INV);
|
cc1101_write_reg(
|
||||||
|
&furi_hal_spi_bus_handle_subghz, CC1101_IOCFG2, CC1101IocfgHW | CC1101_IOCFG_INV);
|
||||||
} else if(path == FuriHalSubGhzPath315) {
|
} else if(path == FuriHalSubGhzPath315) {
|
||||||
hal_gpio_write(&gpio_rf_sw_0, 1);
|
hal_gpio_write(&gpio_rf_sw_0, 1);
|
||||||
cc1101_write_reg(&furi_hal_spi_bus_handle_subghz, CC1101_IOCFG2, CC1101IocfgHW);
|
cc1101_write_reg(&furi_hal_spi_bus_handle_subghz, CC1101_IOCFG2, CC1101IocfgHW);
|
||||||
} else if(path == FuriHalSubGhzPath868) {
|
} else if(path == FuriHalSubGhzPath868) {
|
||||||
hal_gpio_write(&gpio_rf_sw_0, 1);
|
hal_gpio_write(&gpio_rf_sw_0, 1);
|
||||||
cc1101_write_reg(&furi_hal_spi_bus_handle_subghz, CC1101_IOCFG2, CC1101IocfgHW | CC1101_IOCFG_INV);
|
cc1101_write_reg(
|
||||||
|
&furi_hal_spi_bus_handle_subghz, CC1101_IOCFG2, CC1101IocfgHW | CC1101_IOCFG_INV);
|
||||||
} else if(path == FuriHalSubGhzPathIsolate) {
|
} else if(path == FuriHalSubGhzPathIsolate) {
|
||||||
hal_gpio_write(&gpio_rf_sw_0, 0);
|
hal_gpio_write(&gpio_rf_sw_0, 0);
|
||||||
cc1101_write_reg(&furi_hal_spi_bus_handle_subghz, CC1101_IOCFG2, CC1101IocfgHW);
|
cc1101_write_reg(&furi_hal_spi_bus_handle_subghz, CC1101_IOCFG2, CC1101IocfgHW);
|
||||||
@ -838,7 +863,7 @@ static void furi_hal_subghz_async_tx_refill(uint32_t* buffer, size_t samples) {
|
|||||||
*buffer = API_HAL_SUBGHZ_ASYNC_TX_GUARD_TIME;
|
*buffer = API_HAL_SUBGHZ_ASYNC_TX_GUARD_TIME;
|
||||||
buffer++;
|
buffer++;
|
||||||
samples--;
|
samples--;
|
||||||
if (!level) {
|
if(!level) {
|
||||||
furi_hal_subghz_async_tx.duty_high += API_HAL_SUBGHZ_ASYNC_TX_GUARD_TIME;
|
furi_hal_subghz_async_tx.duty_high += API_HAL_SUBGHZ_ASYNC_TX_GUARD_TIME;
|
||||||
} else {
|
} else {
|
||||||
furi_hal_subghz_async_tx.duty_low += API_HAL_SUBGHZ_ASYNC_TX_GUARD_TIME;
|
furi_hal_subghz_async_tx.duty_low += API_HAL_SUBGHZ_ASYNC_TX_GUARD_TIME;
|
||||||
@ -851,7 +876,7 @@ static void furi_hal_subghz_async_tx_refill(uint32_t* buffer, size_t samples) {
|
|||||||
buffer++;
|
buffer++;
|
||||||
samples--;
|
samples--;
|
||||||
|
|
||||||
if (level) {
|
if(level) {
|
||||||
furi_hal_subghz_async_tx.duty_high += duration;
|
furi_hal_subghz_async_tx.duty_high += duration;
|
||||||
} else {
|
} else {
|
||||||
furi_hal_subghz_async_tx.duty_low += duration;
|
furi_hal_subghz_async_tx.duty_low += duration;
|
||||||
@ -1014,8 +1039,15 @@ void furi_hal_subghz_stop_async_tx() {
|
|||||||
|
|
||||||
free(furi_hal_subghz_async_tx.buffer);
|
free(furi_hal_subghz_async_tx.buffer);
|
||||||
|
|
||||||
float duty_cycle = 100.0f * (float)furi_hal_subghz_async_tx.duty_high / ((float)furi_hal_subghz_async_tx.duty_low + (float)furi_hal_subghz_async_tx.duty_high);
|
float duty_cycle =
|
||||||
FURI_LOG_D(TAG, "Async TX Radio stats: on %0.0fus, off %0.0fus, DutyCycle: %0.0f%%", (float)furi_hal_subghz_async_tx.duty_high, (float)furi_hal_subghz_async_tx.duty_low, duty_cycle);
|
100.0f * (float)furi_hal_subghz_async_tx.duty_high /
|
||||||
|
((float)furi_hal_subghz_async_tx.duty_low + (float)furi_hal_subghz_async_tx.duty_high);
|
||||||
|
FURI_LOG_D(
|
||||||
|
TAG,
|
||||||
|
"Async TX Radio stats: on %0.0fus, off %0.0fus, DutyCycle: %0.0f%%",
|
||||||
|
(float)furi_hal_subghz_async_tx.duty_high,
|
||||||
|
(float)furi_hal_subghz_async_tx.duty_low,
|
||||||
|
duty_cycle);
|
||||||
|
|
||||||
furi_hal_subghz_state = SubGhzStateIdle;
|
furi_hal_subghz_state = SubGhzStateIdle;
|
||||||
}
|
}
|
||||||
|
@ -1,5 +1,6 @@
|
|||||||
#include "furi-hal-subghz.h"
|
#include "furi-hal-subghz.h"
|
||||||
#include "furi-hal-version.h"
|
#include "furi-hal-version.h"
|
||||||
|
#include "furi-hal-rtc.h"
|
||||||
|
|
||||||
#include <furi-hal-gpio.h>
|
#include <furi-hal-gpio.h>
|
||||||
#include <furi-hal-spi.h>
|
#include <furi-hal-spi.h>
|
||||||
@ -14,6 +15,7 @@
|
|||||||
|
|
||||||
static volatile SubGhzState furi_hal_subghz_state = SubGhzStateInit;
|
static volatile SubGhzState furi_hal_subghz_state = SubGhzStateInit;
|
||||||
static volatile SubGhzRegulation furi_hal_subghz_regulation = SubGhzRegulationTxRx;
|
static volatile SubGhzRegulation furi_hal_subghz_regulation = SubGhzRegulationTxRx;
|
||||||
|
static volatile FuriHalSubGhzPreset furi_hal_subghz_preset = FuriHalSubGhzPresetIDLE;
|
||||||
|
|
||||||
static const uint8_t furi_hal_subghz_preset_ook_270khz_async_regs[][2] = {
|
static const uint8_t furi_hal_subghz_preset_ook_270khz_async_regs[][2] = {
|
||||||
// https://e2e.ti.com/support/wireless-connectivity/sub-1-ghz-group/sub-1-ghz/f/sub-1-ghz-forum/382066/cc1101---don-t-know-the-correct-registers-configuration
|
// https://e2e.ti.com/support/wireless-connectivity/sub-1-ghz-group/sub-1-ghz/f/sub-1-ghz-forum/382066/cc1101---don-t-know-the-correct-registers-configuration
|
||||||
@ -296,9 +298,9 @@ static const uint8_t furi_hal_subghz_preset_gfsk_9_99kb_async_regs[][2] = {
|
|||||||
{CC1101_IOCFG0, 0x06}, //GDO0 Output Pin Configuration
|
{CC1101_IOCFG0, 0x06}, //GDO0 Output Pin Configuration
|
||||||
{CC1101_FIFOTHR, 0x47}, //RX FIFO and TX FIFO Thresholds
|
{CC1101_FIFOTHR, 0x47}, //RX FIFO and TX FIFO Thresholds
|
||||||
|
|
||||||
//1 : CRC calculation in TX and CRC check in RX enabled,
|
//1 : CRC calculation in TX and CRC check in RX enabled,
|
||||||
//1 : Variable packet length mode. Packet length configured by the first byte after sync word
|
//1 : Variable packet length mode. Packet length configured by the first byte after sync word
|
||||||
{CC1101_PKTCTRL0,0x05},
|
{CC1101_PKTCTRL0, 0x05},
|
||||||
|
|
||||||
{CC1101_FSCTRL1, 0x06}, //Frequency Synthesizer Control
|
{CC1101_FSCTRL1, 0x06}, //Frequency Synthesizer Control
|
||||||
|
|
||||||
@ -314,8 +316,8 @@ static const uint8_t furi_hal_subghz_preset_gfsk_9_99kb_async_regs[][2] = {
|
|||||||
{CC1101_DEVIATN, 0x34}, //Deviation = 19.042969
|
{CC1101_DEVIATN, 0x34}, //Deviation = 19.042969
|
||||||
{CC1101_MCSM0, 0x18}, //Main Radio Control State Machine Configuration
|
{CC1101_MCSM0, 0x18}, //Main Radio Control State Machine Configuration
|
||||||
{CC1101_FOCCFG, 0x16}, //Frequency Offset Compensation Configuration
|
{CC1101_FOCCFG, 0x16}, //Frequency Offset Compensation Configuration
|
||||||
|
|
||||||
{CC1101_AGCCTRL2, 0x43 }, //AGC Control
|
{CC1101_AGCCTRL2, 0x43}, //AGC Control
|
||||||
{CC1101_AGCCTRL1, 0x40},
|
{CC1101_AGCCTRL1, 0x40},
|
||||||
{CC1101_AGCCTRL0, 0x91},
|
{CC1101_AGCCTRL0, 0x91},
|
||||||
|
|
||||||
@ -333,7 +335,16 @@ static const uint8_t furi_hal_subghz_preset_gfsk_9_99kb_async_regs[][2] = {
|
|||||||
|
|
||||||
static const uint8_t furi_hal_subghz_preset_ook_async_patable[8] = {
|
static const uint8_t furi_hal_subghz_preset_ook_async_patable[8] = {
|
||||||
0x00,
|
0x00,
|
||||||
0xC0, // 10dBm 0xC0, 7dBm 0xC8, 5dBm 0x84, 0dBm 0x60, -10dBm 0x34, -15dBm 0x1D, -20dBm 0x0E, -30dBm 0x12
|
0xC0, // 12dBm 0xC0, 10dBm 0xC5, 7dBm 0xCD, 5dBm 0x86, 0dBm 0x50, -6dBm 0x37, -10dBm 0x26, -15dBm 0x1D, -20dBm 0x17, -30dBm 0x03
|
||||||
|
0x00,
|
||||||
|
0x00,
|
||||||
|
0x00,
|
||||||
|
0x00,
|
||||||
|
0x00,
|
||||||
|
0x00};
|
||||||
|
static const uint8_t furi_hal_subghz_preset_ook_async_patable_au[8] = {
|
||||||
|
0x00,
|
||||||
|
0x86, // 12dBm 0xC0, 10dBm 0xC5, 7dBm 0xCD, 5dBm 0x86, 0dBm 0x50, -6dBm 0x37, -10dBm 0x26, -15dBm 0x1D, -20dBm 0x17, -30dBm 0x03
|
||||||
0x00,
|
0x00,
|
||||||
0x00,
|
0x00,
|
||||||
0x00,
|
0x00,
|
||||||
@ -371,6 +382,7 @@ static const uint8_t furi_hal_subghz_preset_gfsk_async_patable[8] = {
|
|||||||
void furi_hal_subghz_init() {
|
void furi_hal_subghz_init() {
|
||||||
furi_assert(furi_hal_subghz_state == SubGhzStateInit);
|
furi_assert(furi_hal_subghz_state == SubGhzStateInit);
|
||||||
furi_hal_subghz_state = SubGhzStateIdle;
|
furi_hal_subghz_state = SubGhzStateIdle;
|
||||||
|
furi_hal_subghz_preset = FuriHalSubGhzPresetIDLE;
|
||||||
|
|
||||||
furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
|
furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
|
||||||
|
|
||||||
@ -392,7 +404,8 @@ void furi_hal_subghz_init() {
|
|||||||
;
|
;
|
||||||
|
|
||||||
// GD0 high
|
// GD0 high
|
||||||
cc1101_write_reg(&furi_hal_spi_bus_handle_subghz, CC1101_IOCFG0, CC1101IocfgHW | CC1101_IOCFG_INV);
|
cc1101_write_reg(
|
||||||
|
&furi_hal_spi_bus_handle_subghz, CC1101_IOCFG0, CC1101IocfgHW | CC1101_IOCFG_INV);
|
||||||
while(hal_gpio_read(&gpio_cc1101_g0) != true)
|
while(hal_gpio_read(&gpio_cc1101_g0) != true)
|
||||||
;
|
;
|
||||||
|
|
||||||
@ -423,6 +436,8 @@ void furi_hal_subghz_sleep() {
|
|||||||
cc1101_shutdown(&furi_hal_spi_bus_handle_subghz);
|
cc1101_shutdown(&furi_hal_spi_bus_handle_subghz);
|
||||||
|
|
||||||
furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
|
furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
|
||||||
|
|
||||||
|
furi_hal_subghz_preset = FuriHalSubGhzPresetIDLE;
|
||||||
}
|
}
|
||||||
|
|
||||||
void furi_hal_subghz_dump_state() {
|
void furi_hal_subghz_dump_state() {
|
||||||
@ -453,9 +468,10 @@ void furi_hal_subghz_load_preset(FuriHalSubGhzPreset preset) {
|
|||||||
} else if(preset == FuriHalSubGhzPresetGFSK9_99KbAsync) {
|
} else if(preset == FuriHalSubGhzPresetGFSK9_99KbAsync) {
|
||||||
furi_hal_subghz_load_registers(furi_hal_subghz_preset_gfsk_9_99kb_async_regs);
|
furi_hal_subghz_load_registers(furi_hal_subghz_preset_gfsk_9_99kb_async_regs);
|
||||||
furi_hal_subghz_load_patable(furi_hal_subghz_preset_gfsk_async_patable);
|
furi_hal_subghz_load_patable(furi_hal_subghz_preset_gfsk_async_patable);
|
||||||
} else{
|
} else {
|
||||||
furi_crash(NULL);
|
furi_crash(NULL);
|
||||||
}
|
}
|
||||||
|
furi_hal_subghz_preset = preset;
|
||||||
}
|
}
|
||||||
|
|
||||||
void furi_hal_subghz_load_registers(const uint8_t data[][2]) {
|
void furi_hal_subghz_load_registers(const uint8_t data[][2]) {
|
||||||
@ -498,7 +514,8 @@ void furi_hal_subghz_flush_tx() {
|
|||||||
bool furi_hal_subghz_rx_pipe_not_empty() {
|
bool furi_hal_subghz_rx_pipe_not_empty() {
|
||||||
CC1101RxBytes status[1];
|
CC1101RxBytes status[1];
|
||||||
furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
|
furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
|
||||||
cc1101_read_reg(&furi_hal_spi_bus_handle_subghz, (CC1101_STATUS_RXBYTES) | CC1101_BURST, (uint8_t*)status);
|
cc1101_read_reg(
|
||||||
|
&furi_hal_spi_bus_handle_subghz, (CC1101_STATUS_RXBYTES) | CC1101_BURST, (uint8_t*)status);
|
||||||
furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
|
furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
|
||||||
// TODO: you can add a buffer overflow flag if needed
|
// TODO: you can add a buffer overflow flag if needed
|
||||||
if(status->NUM_RXBYTES > 0) {
|
if(status->NUM_RXBYTES > 0) {
|
||||||
@ -627,6 +644,13 @@ bool furi_hal_subghz_is_tx_allowed(uint32_t value) {
|
|||||||
!(value >= 433050000 && value <= 434790000) &&
|
!(value >= 433050000 && value <= 434790000) &&
|
||||||
!(value >= 915000000 && value <= 928000000)) {
|
!(value >= 915000000 && value <= 928000000)) {
|
||||||
} else {
|
} else {
|
||||||
|
if(furi_hal_rtc_is_flag_set(FuriHalRtcFlagDebug)) {
|
||||||
|
if((value >= 304100000 && value <= 315250000) &&
|
||||||
|
((furi_hal_subghz_preset == FuriHalSubGhzPresetOok270Async) ||
|
||||||
|
(furi_hal_subghz_preset == FuriHalSubGhzPresetOok650Async))) {
|
||||||
|
furi_hal_subghz_load_patable(furi_hal_subghz_preset_ook_async_patable_au);
|
||||||
|
}
|
||||||
|
}
|
||||||
is_allowed = true;
|
is_allowed = true;
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
@ -647,14 +671,13 @@ bool furi_hal_subghz_is_tx_allowed(uint32_t value) {
|
|||||||
}
|
}
|
||||||
|
|
||||||
uint32_t furi_hal_subghz_set_frequency(uint32_t value) {
|
uint32_t furi_hal_subghz_set_frequency(uint32_t value) {
|
||||||
furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
|
|
||||||
|
|
||||||
if(furi_hal_subghz_is_tx_allowed(value)) {
|
if(furi_hal_subghz_is_tx_allowed(value)) {
|
||||||
furi_hal_subghz_regulation = SubGhzRegulationTxRx;
|
furi_hal_subghz_regulation = SubGhzRegulationTxRx;
|
||||||
} else {
|
} else {
|
||||||
furi_hal_subghz_regulation = SubGhzRegulationOnlyRx;
|
furi_hal_subghz_regulation = SubGhzRegulationOnlyRx;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
|
||||||
uint32_t real_frequency = cc1101_set_frequency(&furi_hal_spi_bus_handle_subghz, value);
|
uint32_t real_frequency = cc1101_set_frequency(&furi_hal_spi_bus_handle_subghz, value);
|
||||||
cc1101_calibrate(&furi_hal_spi_bus_handle_subghz);
|
cc1101_calibrate(&furi_hal_spi_bus_handle_subghz);
|
||||||
|
|
||||||
@ -672,13 +695,15 @@ void furi_hal_subghz_set_path(FuriHalSubGhzPath path) {
|
|||||||
furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
|
furi_hal_spi_acquire(&furi_hal_spi_bus_handle_subghz);
|
||||||
if(path == FuriHalSubGhzPath433) {
|
if(path == FuriHalSubGhzPath433) {
|
||||||
hal_gpio_write(&gpio_rf_sw_0, 0);
|
hal_gpio_write(&gpio_rf_sw_0, 0);
|
||||||
cc1101_write_reg(&furi_hal_spi_bus_handle_subghz, CC1101_IOCFG2, CC1101IocfgHW | CC1101_IOCFG_INV);
|
cc1101_write_reg(
|
||||||
|
&furi_hal_spi_bus_handle_subghz, CC1101_IOCFG2, CC1101IocfgHW | CC1101_IOCFG_INV);
|
||||||
} else if(path == FuriHalSubGhzPath315) {
|
} else if(path == FuriHalSubGhzPath315) {
|
||||||
hal_gpio_write(&gpio_rf_sw_0, 1);
|
hal_gpio_write(&gpio_rf_sw_0, 1);
|
||||||
cc1101_write_reg(&furi_hal_spi_bus_handle_subghz, CC1101_IOCFG2, CC1101IocfgHW);
|
cc1101_write_reg(&furi_hal_spi_bus_handle_subghz, CC1101_IOCFG2, CC1101IocfgHW);
|
||||||
} else if(path == FuriHalSubGhzPath868) {
|
} else if(path == FuriHalSubGhzPath868) {
|
||||||
hal_gpio_write(&gpio_rf_sw_0, 1);
|
hal_gpio_write(&gpio_rf_sw_0, 1);
|
||||||
cc1101_write_reg(&furi_hal_spi_bus_handle_subghz, CC1101_IOCFG2, CC1101IocfgHW | CC1101_IOCFG_INV);
|
cc1101_write_reg(
|
||||||
|
&furi_hal_spi_bus_handle_subghz, CC1101_IOCFG2, CC1101IocfgHW | CC1101_IOCFG_INV);
|
||||||
} else if(path == FuriHalSubGhzPathIsolate) {
|
} else if(path == FuriHalSubGhzPathIsolate) {
|
||||||
hal_gpio_write(&gpio_rf_sw_0, 0);
|
hal_gpio_write(&gpio_rf_sw_0, 0);
|
||||||
cc1101_write_reg(&furi_hal_spi_bus_handle_subghz, CC1101_IOCFG2, CC1101IocfgHW);
|
cc1101_write_reg(&furi_hal_spi_bus_handle_subghz, CC1101_IOCFG2, CC1101IocfgHW);
|
||||||
@ -838,7 +863,7 @@ static void furi_hal_subghz_async_tx_refill(uint32_t* buffer, size_t samples) {
|
|||||||
*buffer = API_HAL_SUBGHZ_ASYNC_TX_GUARD_TIME;
|
*buffer = API_HAL_SUBGHZ_ASYNC_TX_GUARD_TIME;
|
||||||
buffer++;
|
buffer++;
|
||||||
samples--;
|
samples--;
|
||||||
if (!level) {
|
if(!level) {
|
||||||
furi_hal_subghz_async_tx.duty_high += API_HAL_SUBGHZ_ASYNC_TX_GUARD_TIME;
|
furi_hal_subghz_async_tx.duty_high += API_HAL_SUBGHZ_ASYNC_TX_GUARD_TIME;
|
||||||
} else {
|
} else {
|
||||||
furi_hal_subghz_async_tx.duty_low += API_HAL_SUBGHZ_ASYNC_TX_GUARD_TIME;
|
furi_hal_subghz_async_tx.duty_low += API_HAL_SUBGHZ_ASYNC_TX_GUARD_TIME;
|
||||||
@ -851,7 +876,7 @@ static void furi_hal_subghz_async_tx_refill(uint32_t* buffer, size_t samples) {
|
|||||||
buffer++;
|
buffer++;
|
||||||
samples--;
|
samples--;
|
||||||
|
|
||||||
if (level) {
|
if(level) {
|
||||||
furi_hal_subghz_async_tx.duty_high += duration;
|
furi_hal_subghz_async_tx.duty_high += duration;
|
||||||
} else {
|
} else {
|
||||||
furi_hal_subghz_async_tx.duty_low += duration;
|
furi_hal_subghz_async_tx.duty_low += duration;
|
||||||
@ -1014,8 +1039,15 @@ void furi_hal_subghz_stop_async_tx() {
|
|||||||
|
|
||||||
free(furi_hal_subghz_async_tx.buffer);
|
free(furi_hal_subghz_async_tx.buffer);
|
||||||
|
|
||||||
float duty_cycle = 100.0f * (float)furi_hal_subghz_async_tx.duty_high / ((float)furi_hal_subghz_async_tx.duty_low + (float)furi_hal_subghz_async_tx.duty_high);
|
float duty_cycle =
|
||||||
FURI_LOG_D(TAG, "Async TX Radio stats: on %0.0fus, off %0.0fus, DutyCycle: %0.0f%%", (float)furi_hal_subghz_async_tx.duty_high, (float)furi_hal_subghz_async_tx.duty_low, duty_cycle);
|
100.0f * (float)furi_hal_subghz_async_tx.duty_high /
|
||||||
|
((float)furi_hal_subghz_async_tx.duty_low + (float)furi_hal_subghz_async_tx.duty_high);
|
||||||
|
FURI_LOG_D(
|
||||||
|
TAG,
|
||||||
|
"Async TX Radio stats: on %0.0fus, off %0.0fus, DutyCycle: %0.0f%%",
|
||||||
|
(float)furi_hal_subghz_async_tx.duty_high,
|
||||||
|
(float)furi_hal_subghz_async_tx.duty_low,
|
||||||
|
duty_cycle);
|
||||||
|
|
||||||
furi_hal_subghz_state = SubGhzStateIdle;
|
furi_hal_subghz_state = SubGhzStateIdle;
|
||||||
}
|
}
|
||||||
|
@ -16,6 +16,7 @@ extern "C" {
|
|||||||
|
|
||||||
/** Radio Presets */
|
/** Radio Presets */
|
||||||
typedef enum {
|
typedef enum {
|
||||||
|
FuriHalSubGhzPresetIDLE, /**< default configuration */
|
||||||
FuriHalSubGhzPresetOok270Async, /**< OOK, bandwidth 270kHz, asynchronous */
|
FuriHalSubGhzPresetOok270Async, /**< OOK, bandwidth 270kHz, asynchronous */
|
||||||
FuriHalSubGhzPresetOok650Async, /**< OOK, bandwidth 650kHz, asynchronous */
|
FuriHalSubGhzPresetOok650Async, /**< OOK, bandwidth 650kHz, asynchronous */
|
||||||
FuriHalSubGhzPreset2FSKDev238Async, /**< FM, deviation 2.380371 kHz, asynchronous */
|
FuriHalSubGhzPreset2FSKDev238Async, /**< FM, deviation 2.380371 kHz, asynchronous */
|
||||||
|
Loading…
Reference in New Issue
Block a user