[FL-950] CC1101 Stage1, SPI Refactoring, Drivers layer (#386)
* API HAL SPI: refactoring, split into layers, prepare ST HAL separation. API HAL SubGhz: initialize on start. Drivers: add basic cc1101 driver. Update API usage. Debug: increase max debugger port speed. Remove subghz apps. * CC1101: chip status handling. ApiHalSpi: increase SubGhz bus speed to 8mhz. F4: backport subghz initialization. * Api Hal SubGhz: rx path and frequency. CC1101: frequency control. * SubGhz Application: basic tests * SubGhz app: tone and packet test. API HAL SUBGHZ: update configs, add missing bits and pieces.
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@@ -16,7 +16,7 @@ extern "C" {
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#define POWER_I2C_SDA_GPIO_Port GPIOA
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#define POWER_I2C I2C1
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/* Timing register value is computed with the STM32CubeMX Tool,
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/** Timing register value is computed with the STM32CubeMX Tool,
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* Fast Mode @100kHz with I2CCLK = 64 MHz,
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* rise time = 0ns, fall time = 0ns
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*/
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@@ -57,6 +57,24 @@ extern const GpioPin vibro_gpio;
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extern const GpioPin ibutton_gpio;
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extern const GpioPin cc1101_g0_gpio;
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extern const GpioPin gpio_subghz_cs;
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extern const GpioPin gpio_display_cs;
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extern const GpioPin gpio_subghz_cs;
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extern const GpioPin gpio_display_cs;
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extern const GpioPin gpio_display_rst;
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extern const GpioPin gpio_display_di;
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extern const GpioPin gpio_sdcard_cs;
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extern const GpioPin gpio_nfc_cs;
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extern const GpioPin gpio_spi_d_miso;
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extern const GpioPin gpio_spi_d_mosi;
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extern const GpioPin gpio_spi_d_sck;
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extern const GpioPin gpio_spi_r_miso;
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extern const GpioPin gpio_spi_r_mosi;
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extern const GpioPin gpio_spi_r_sck;
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#ifdef __cplusplus
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}
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#endif
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