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[FL-1490] FuriHal: crypto api. Crypto cli tool. (#702)

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* FuriHal: crypto layer
* Furi: add crash routine.
* FuriHal: crypto api. Crypto: cli command to manipulate secure enclave and encrypt/decrypt plain text.
* DeviceInfo: secure enclave verification.
* Rename original to enclave_valid
* Update expected enclave signature to match production keys
* F7: remove unused files
This commit is contained in:
あく
2021-09-15 12:59:49 +03:00
committed by GitHub
parent 95d9140d24
commit 66f9d946ae
52 changed files with 1056 additions and 1609 deletions
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10
firmware/targets/f7/furi-hal/furi-hal-clock.c
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@@ -1,6 +1,6 @@
#include <furi-hal-clock.h>
#include <furi.h>
#include <main.h>
#include <stm32wbxx_ll_pwr.h>
#include <stm32wbxx_ll_rcc.h>
#include <stm32wbxx_ll_utils.h>
@@ -107,6 +107,12 @@ void furi_hal_clock_init() {
LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOE);
LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOH);
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI1);
LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_AES1);
// AHB3
LL_AHB3_GRP1_EnableClock(LL_AHB3_GRP1_PERIPH_PKA);
LL_AHB3_GRP1_EnableClock(LL_AHB3_GRP1_PERIPH_RNG);
LL_AHB3_GRP1_EnableClock(LL_AHB3_GRP1_PERIPH_AES2);
// APB1
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_RTCAPB);
@@ -114,6 +120,8 @@ void furi_hal_clock_init() {
// APB2
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_USART1);
FURI_LOG_I("FuriHalClock", "Init OK");
}
void furi_hal_clock_switch_to_hsi() {

69
firmware/targets/f7/furi-hal/furi-hal-crypto.c Normal file
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@@ -0,0 +1,69 @@
#include <furi-hal-crypto.h>
#include <furi.h>
#include <shci.h>
CRYP_HandleTypeDef crypt;
void furi_hal_crypto_init() {
FURI_LOG_I("FuriHalCrypto", "Init OK");
}
bool furi_hal_crypto_store_add_key(FuriHalCryptoKey* key, uint8_t* slot) {
furi_assert(key);
furi_assert(slot);
SHCI_C2_FUS_StoreUsrKey_Cmd_Param_t pParam;
if (key->type == FuriHalCryptoKeyTypeMaster) {
pParam.KeyType = KEYTYPE_MASTER;
} else if (key->type == FuriHalCryptoKeyTypeSimple) {
pParam.KeyType = KEYTYPE_SIMPLE;
} else if (key->type == FuriHalCryptoKeyTypeEncrypted) {
pParam.KeyType = KEYTYPE_ENCRYPTED;
} else {
furi_crash("Incorrect key type");
}
if (key->size == FuriHalCryptoKeySize128) {
pParam.KeySize = KEYSIZE_16;
} else if (key->size == FuriHalCryptoKeySize256) {
pParam.KeySize = KEYSIZE_32;
} else {
furi_crash("Incorrect key size");
}
return SHCI_C2_FUS_StoreUsrKey(&pParam, slot) == SHCI_Success;
}
bool furi_hal_crypto_store_load_key(uint8_t slot, const uint8_t* iv) {
furi_assert(slot > 0 && slot <= 100);
crypt.Instance = AES1;
crypt.Init.DataType = CRYP_DATATYPE_32B;
crypt.Init.KeySize = CRYP_KEYSIZE_256B;
crypt.Init.Algorithm = CRYP_AES_CBC;
crypt.Init.pInitVect = (uint32_t*)iv;
crypt.Init.pKey = NULL;
furi_check(HAL_CRYP_Init(&crypt) == HAL_OK);
if (SHCI_C2_FUS_LoadUsrKey(slot) == SHCI_Success) {
return true;
} else {
furi_check(HAL_CRYP_DeInit(&crypt) == HAL_OK);
return false;
}
}
bool furi_hal_crypto_store_unload_key(uint8_t slot) {
furi_check(HAL_CRYP_DeInit(&crypt) == HAL_OK);
return SHCI_C2_FUS_UnloadUsrKey(slot) == SHCI_Success;
}
bool furi_hal_crypto_encrypt(const uint8_t *input, uint8_t *output, size_t size) {
return HAL_CRYP_Encrypt(&crypt, (uint32_t*)input, size/4, (uint32_t*)output, 1000) == HAL_OK;
}
bool furi_hal_crypto_decrypt(const uint8_t *input, uint8_t *output, size_t size) {
return HAL_CRYP_Decrypt(&crypt, (uint32_t*)input, size/4, (uint32_t*)output, 1000) == HAL_OK;
}

4
firmware/targets/f7/furi-hal/furi-hal-interrupt.c
View File

@@ -41,7 +41,7 @@ void furi_hal_interrupt_set_timer_isr(TIM_TypeDef* timer, FuriHalInterruptISR is
}
furi_hal_tim_tim1_isr = isr;
} else {
furi_check(0);
furi_crash(NULL);
}
}
@@ -54,7 +54,7 @@ void furi_hal_interrupt_set_dma_channel_isr(DMA_TypeDef* dma, uint32_t channel,
} else if (dma == DMA2) {
furi_hal_dma_channel_isr[1][channel] = isr;
} else {
furi_check(0);
furi_crash(NULL);
}
}

8
firmware/targets/f7/furi-hal/furi-hal-irda.c
View File

@@ -244,7 +244,7 @@ static uint8_t furi_hal_irda_get_current_dma_tx_buffer(void) {
static void furi_hal_irda_tx_dma_polarity_isr() {
if (LL_DMA_IsActiveFlag_TE1(DMA1)) {
LL_DMA_ClearFlag_TE1(DMA1);
furi_check(0);
furi_crash(NULL);
}
if (LL_DMA_IsActiveFlag_TC1(DMA1) && LL_DMA_IsEnabledIT_TC(DMA1, LL_DMA_CHANNEL_1)) {
LL_DMA_ClearFlag_TC1(DMA1);
@@ -261,7 +261,7 @@ static void furi_hal_irda_tx_dma_polarity_isr() {
static void furi_hal_irda_tx_dma_isr() {
if (LL_DMA_IsActiveFlag_TE2(DMA1)) {
LL_DMA_ClearFlag_TE2(DMA1);
furi_check(0);
furi_crash(NULL);
}
if (LL_DMA_IsActiveFlag_HT2(DMA1) && LL_DMA_IsEnabledIT_HT(DMA1, LL_DMA_CHANNEL_2)) {
LL_DMA_ClearFlag_HT2(DMA1);
@@ -277,7 +277,7 @@ static void furi_hal_irda_tx_dma_isr() {
} else if (furi_hal_irda_state == IrdaStateAsyncTxStopReq) {
/* fallthrough */
} else {
furi_check(0);
furi_crash(NULL);
}
}
if (LL_DMA_IsActiveFlag_TC2(DMA1) && LL_DMA_IsEnabledIT_TC(DMA1, LL_DMA_CHANNEL_2)) {
@@ -557,7 +557,7 @@ static void furi_hal_irda_async_tx_free_resources(void) {
void furi_hal_irda_async_tx_start(uint32_t freq, float duty_cycle) {
if ((duty_cycle > 1) || (duty_cycle <= 0) || (freq > IRDA_MAX_FREQUENCY) || (freq < IRDA_MIN_FREQUENCY) || (irda_tim_tx.data_callback == NULL)) {
furi_check(0);
furi_crash(NULL);
}
furi_assert(furi_hal_irda_state == IrdaStateIdle);

4
firmware/targets/f7/furi-hal/furi-hal-rfid.c
View File

@@ -261,7 +261,7 @@ void furi_hal_rfid_set_emulate_pulse(uint32_t pulse) {
LFRFID_EMULATE_TIM.Instance->CCR4 = pulse;
break;
default:
furi_check(0);
furi_crash(NULL);
break;
}
}
@@ -285,7 +285,7 @@ void furi_hal_rfid_set_read_pulse(uint32_t pulse) {
LFRFID_TIM.Instance->CCR4 = pulse;
break;
default:
furi_check(0);
furi_crash(NULL);
break;
}
}

6
firmware/targets/f7/furi-hal/furi-hal-subghz.c
View File

@@ -273,7 +273,7 @@ void furi_hal_subghz_load_preset(FuriHalSubGhzPreset preset) {
furi_hal_subghz_load_registers(furi_hal_subghz_preset_2fsk_async_regs);
furi_hal_subghz_load_patable(furi_hal_subghz_preset_2fsk_async_patable);
}else {
furi_check(0);
furi_crash(NULL);
}
}
@@ -388,7 +388,7 @@ uint32_t furi_hal_subghz_set_frequency_and_path(uint32_t value) {
} else if(value >= 778999847 && value <= 928000000) {
furi_hal_subghz_set_path(FuriHalSubGhzPath868);
} else {
furi_check(0);
furi_crash(NULL);
}
return value;
}
@@ -424,7 +424,7 @@ void furi_hal_subghz_set_path(FuriHalSubGhzPath path) {
hal_gpio_write(&gpio_rf_sw_0, 0);
cc1101_write_reg(device, CC1101_IOCFG2, CC1101IocfgHW);
} else {
furi_check(0);
furi_crash(NULL);
}
furi_hal_spi_device_return(device);
}

2
firmware/targets/f7/furi-hal/furi-hal-version.c
View File

@@ -163,7 +163,7 @@ void furi_hal_version_init() {
case FuriHalVersionOtpVersion1:
furi_hal_version_load_otp_v1();
break;
default: furi_check(0);
default: furi_crash(NULL);
}
FURI_LOG_I("FuriHalVersion", "Init OK");
}

16
firmware/targets/f7/furi-hal/furi-hal.c
View File

@@ -1,10 +1,6 @@
#include <furi-hal.h>
#include <aes.h>
#include <comp.h>
#include <pka.h>
#include <rf.h>
#include <rng.h>
#include <rtc.h>
#include <tim.h>
#include <usb_device.h>
@@ -34,16 +30,8 @@ void furi_hal_init() {
FURI_LOG_I("HAL", "TIM16 OK");
MX_COMP1_Init();
FURI_LOG_I("HAL", "COMP1 OK");
MX_RF_Init();
FURI_LOG_I("HAL", "RF OK");
MX_PKA_Init();
FURI_LOG_I("HAL", "PKA OK");
MX_RNG_Init();
FURI_LOG_I("HAL", "RNG OK");
MX_AES1_Init();
FURI_LOG_I("HAL", "AES1 OK");
MX_AES2_Init();
FURI_LOG_I("HAL", "AES2 OK");
furi_hal_crypto_init();
// VCP + USB
furi_hal_vcp_init();