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SubGhz: fix transmission frequency (#922)

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This commit is contained in:
Skorpionm
2021-12-22 23:35:53 +04:00
committed by GitHub
parent 3a86da5526
commit 9b62b557b4
4 changed files with 2 additions and 122 deletions
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2
applications/subghz/scenes/subghz_scene_more_raw.c
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@@ -15,7 +15,7 @@ void subghz_scene_more_raw_on_enter(void* context) {
submenu_add_item( submenu_add_item(
subghz->submenu, subghz->submenu,
"Edit name", "Rename",
SubmenuIndexEdit, SubmenuIndexEdit,
subghz_scene_more_raw_submenu_callback, subghz_scene_more_raw_submenu_callback,
subghz); subghz);

2
applications/subghz/scenes/subghz_scene_saved_menu.c
View File

@@ -22,7 +22,7 @@ void subghz_scene_saved_menu_on_enter(void* context) {
submenu_add_item( submenu_add_item(
subghz->submenu, subghz->submenu,
"Edit name", "Rename",
SubmenuIndexEdit, SubmenuIndexEdit,
subghz_scene_saved_menu_submenu_callback, subghz_scene_saved_menu_submenu_callback,
subghz); subghz);

60
firmware/targets/f6/furi-hal/furi-hal-subghz.c
View File

@@ -60,17 +60,6 @@ static const uint8_t furi_hal_subghz_preset_ook_270khz_async_regs[][2] = {
{CC1101_FREND0, 0x11}, // Adjusts current TX LO buffer + high is PATABLE[1] {CC1101_FREND0, 0x11}, // Adjusts current TX LO buffer + high is PATABLE[1]
{CC1101_FREND1, 0xB6}, // {CC1101_FREND1, 0xB6}, //
/* Frequency Synthesizer Calibration, valid for 433.92 */
{CC1101_FSCAL3, 0xE9},
{CC1101_FSCAL2, 0x2A},
{CC1101_FSCAL1, 0x00},
{CC1101_FSCAL0, 0x1F},
/* Magic f4ckery */
{CC1101_TEST2, 0x81}, // FIFOTHR ADC_RETENTION=1 matched value
{CC1101_TEST1, 0x35}, // FIFOTHR ADC_RETENTION=1 matched value
{CC1101_TEST0, 0x09}, // VCO selection calibration stage is disabled
/* End */ /* End */
{0, 0}, {0, 0},
}; };
@@ -122,17 +111,6 @@ static const uint8_t furi_hal_subghz_preset_ook_650khz_async_regs[][2] = {
{CC1101_FREND0, 0x11}, // Adjusts current TX LO buffer + high is PATABLE[1] {CC1101_FREND0, 0x11}, // Adjusts current TX LO buffer + high is PATABLE[1]
{CC1101_FREND1, 0xB6}, // {CC1101_FREND1, 0xB6}, //
/* Frequency Synthesizer Calibration, valid for 433.92 */
{CC1101_FSCAL3, 0xE9},
{CC1101_FSCAL2, 0x2A},
{CC1101_FSCAL1, 0x00},
{CC1101_FSCAL0, 0x1F},
/* Magic f4ckery */
{CC1101_TEST2, 0x88},
{CC1101_TEST1, 0x31},
{CC1101_TEST0, 0x09}, // VCO selection calibration stage is disabled
/* End */ /* End */
{0, 0}, {0, 0},
}; };
@@ -177,17 +155,6 @@ static const uint8_t furi_hal_subghz_preset_2fsk_dev2_38khz_async_regs[][2] = {
{CC1101_FREND0, 0x10}, // Adjusts current TX LO buffer {CC1101_FREND0, 0x10}, // Adjusts current TX LO buffer
{CC1101_FREND1, 0x56}, {CC1101_FREND1, 0x56},
/* Frequency Synthesizer Calibration, valid for 433.92 */
{CC1101_FSCAL3, 0xE9},
{CC1101_FSCAL2, 0x2A},
{CC1101_FSCAL1, 0x00},
{CC1101_FSCAL0, 0x1F},
/* Magic f4ckery */
{CC1101_TEST2, 0x81}, // FIFOTHR ADC_RETENTION=1 matched value
{CC1101_TEST1, 0x35}, // FIFOTHR ADC_RETENTION=1 matched value
{CC1101_TEST0, 0x09}, // VCO selection calibration stage is disabled
/* End */ /* End */
{0, 0}, {0, 0},
}; };
@@ -232,17 +199,6 @@ static const uint8_t furi_hal_subghz_preset_2fsk_dev4_76khz_async_regs[][2] = {
{CC1101_FREND0, 0x10}, // Adjusts current TX LO buffer {CC1101_FREND0, 0x10}, // Adjusts current TX LO buffer
{CC1101_FREND1, 0x56}, {CC1101_FREND1, 0x56},
/* Frequency Synthesizer Calibration, valid for 433.92 */
{CC1101_FSCAL3, 0xE9},
{CC1101_FSCAL2, 0x2A},
{CC1101_FSCAL1, 0x00},
{CC1101_FSCAL0, 0x1F},
/* Magic f4ckery */
{CC1101_TEST2, 0x81}, // FIFOTHR ADC_RETENTION=1 matched value
{CC1101_TEST1, 0x35}, // FIFOTHR ADC_RETENTION=1 matched value
{CC1101_TEST0, 0x09}, // VCO selection calibration stage is disabled
/* End */ /* End */
{0, 0}, {0, 0},
}; };
@@ -279,17 +235,9 @@ static const uint8_t furi_hal_subghz_preset_msk_99_97kb_async_regs[][2] = {
{CC1101_FREND0, 0x10}, {CC1101_FREND0, 0x10},
{CC1101_FREND1, 0x56}, {CC1101_FREND1, 0x56},
{CC1101_FSCAL3, 0xE9},
{CC1101_FSCAL2, 0x2A},
{CC1101_FSCAL1, 0x00},
{CC1101_FSCAL0, 0x1F},
{CC1101_BSCFG, 0x1C}, {CC1101_BSCFG, 0x1C},
{CC1101_FSTEST, 0x59}, {CC1101_FSTEST, 0x59},
{CC1101_TEST2, 0x81},
{CC1101_TEST1, 0x35},
{CC1101_TEST0, 0x09},
/* End */ /* End */
{0, 0}, {0, 0},
}; };
@@ -322,13 +270,6 @@ static const uint8_t furi_hal_subghz_preset_gfsk_9_99kb_async_regs[][2] = {
{CC1101_AGCCTRL0, 0x91}, {CC1101_AGCCTRL0, 0x91},
{CC1101_WORCTRL, 0xFB}, //Wake On Radio Control {CC1101_WORCTRL, 0xFB}, //Wake On Radio Control
{CC1101_FSCAL3, 0xE9}, //Frequency Synthesizer Calibration
{CC1101_FSCAL2, 0x2A}, //Frequency Synthesizer Calibration
{CC1101_FSCAL1, 0x00}, //Frequency Synthesizer Calibration
{CC1101_FSCAL0, 0x1F}, //Frequency Synthesizer Calibration
{CC1101_TEST2, 0x81}, //Various Test Settings
{CC1101_TEST1, 0x35}, //Various Test Settings
{CC1101_TEST0, 0x09}, //Various Test Settings
/* End */ /* End */
{0, 0}, {0, 0},
}; };
@@ -687,7 +628,6 @@ uint32_t furi_hal_subghz_set_frequency(uint32_t value) {
} }
furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz); furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
return real_frequency; return real_frequency;
} }

60
firmware/targets/f7/furi-hal/furi-hal-subghz.c
View File

@@ -60,17 +60,6 @@ static const uint8_t furi_hal_subghz_preset_ook_270khz_async_regs[][2] = {
{CC1101_FREND0, 0x11}, // Adjusts current TX LO buffer + high is PATABLE[1] {CC1101_FREND0, 0x11}, // Adjusts current TX LO buffer + high is PATABLE[1]
{CC1101_FREND1, 0xB6}, // {CC1101_FREND1, 0xB6}, //
/* Frequency Synthesizer Calibration, valid for 433.92 */
{CC1101_FSCAL3, 0xE9},
{CC1101_FSCAL2, 0x2A},
{CC1101_FSCAL1, 0x00},
{CC1101_FSCAL0, 0x1F},
/* Magic f4ckery */
{CC1101_TEST2, 0x81}, // FIFOTHR ADC_RETENTION=1 matched value
{CC1101_TEST1, 0x35}, // FIFOTHR ADC_RETENTION=1 matched value
{CC1101_TEST0, 0x09}, // VCO selection calibration stage is disabled
/* End */ /* End */
{0, 0}, {0, 0},
}; };
@@ -122,17 +111,6 @@ static const uint8_t furi_hal_subghz_preset_ook_650khz_async_regs[][2] = {
{CC1101_FREND0, 0x11}, // Adjusts current TX LO buffer + high is PATABLE[1] {CC1101_FREND0, 0x11}, // Adjusts current TX LO buffer + high is PATABLE[1]
{CC1101_FREND1, 0xB6}, // {CC1101_FREND1, 0xB6}, //
/* Frequency Synthesizer Calibration, valid for 433.92 */
{CC1101_FSCAL3, 0xE9},
{CC1101_FSCAL2, 0x2A},
{CC1101_FSCAL1, 0x00},
{CC1101_FSCAL0, 0x1F},
/* Magic f4ckery */
{CC1101_TEST2, 0x88},
{CC1101_TEST1, 0x31},
{CC1101_TEST0, 0x09}, // VCO selection calibration stage is disabled
/* End */ /* End */
{0, 0}, {0, 0},
}; };
@@ -177,17 +155,6 @@ static const uint8_t furi_hal_subghz_preset_2fsk_dev2_38khz_async_regs[][2] = {
{CC1101_FREND0, 0x10}, // Adjusts current TX LO buffer {CC1101_FREND0, 0x10}, // Adjusts current TX LO buffer
{CC1101_FREND1, 0x56}, {CC1101_FREND1, 0x56},
/* Frequency Synthesizer Calibration, valid for 433.92 */
{CC1101_FSCAL3, 0xE9},
{CC1101_FSCAL2, 0x2A},
{CC1101_FSCAL1, 0x00},
{CC1101_FSCAL0, 0x1F},
/* Magic f4ckery */
{CC1101_TEST2, 0x81}, // FIFOTHR ADC_RETENTION=1 matched value
{CC1101_TEST1, 0x35}, // FIFOTHR ADC_RETENTION=1 matched value
{CC1101_TEST0, 0x09}, // VCO selection calibration stage is disabled
/* End */ /* End */
{0, 0}, {0, 0},
}; };
@@ -232,17 +199,6 @@ static const uint8_t furi_hal_subghz_preset_2fsk_dev4_76khz_async_regs[][2] = {
{CC1101_FREND0, 0x10}, // Adjusts current TX LO buffer {CC1101_FREND0, 0x10}, // Adjusts current TX LO buffer
{CC1101_FREND1, 0x56}, {CC1101_FREND1, 0x56},
/* Frequency Synthesizer Calibration, valid for 433.92 */
{CC1101_FSCAL3, 0xE9},
{CC1101_FSCAL2, 0x2A},
{CC1101_FSCAL1, 0x00},
{CC1101_FSCAL0, 0x1F},
/* Magic f4ckery */
{CC1101_TEST2, 0x81}, // FIFOTHR ADC_RETENTION=1 matched value
{CC1101_TEST1, 0x35}, // FIFOTHR ADC_RETENTION=1 matched value
{CC1101_TEST0, 0x09}, // VCO selection calibration stage is disabled
/* End */ /* End */
{0, 0}, {0, 0},
}; };
@@ -279,17 +235,9 @@ static const uint8_t furi_hal_subghz_preset_msk_99_97kb_async_regs[][2] = {
{CC1101_FREND0, 0x10}, {CC1101_FREND0, 0x10},
{CC1101_FREND1, 0x56}, {CC1101_FREND1, 0x56},
{CC1101_FSCAL3, 0xE9},
{CC1101_FSCAL2, 0x2A},
{CC1101_FSCAL1, 0x00},
{CC1101_FSCAL0, 0x1F},
{CC1101_BSCFG, 0x1C}, {CC1101_BSCFG, 0x1C},
{CC1101_FSTEST, 0x59}, {CC1101_FSTEST, 0x59},
{CC1101_TEST2, 0x81},
{CC1101_TEST1, 0x35},
{CC1101_TEST0, 0x09},
/* End */ /* End */
{0, 0}, {0, 0},
}; };
@@ -322,13 +270,6 @@ static const uint8_t furi_hal_subghz_preset_gfsk_9_99kb_async_regs[][2] = {
{CC1101_AGCCTRL0, 0x91}, {CC1101_AGCCTRL0, 0x91},
{CC1101_WORCTRL, 0xFB}, //Wake On Radio Control {CC1101_WORCTRL, 0xFB}, //Wake On Radio Control
{CC1101_FSCAL3, 0xE9}, //Frequency Synthesizer Calibration
{CC1101_FSCAL2, 0x2A}, //Frequency Synthesizer Calibration
{CC1101_FSCAL1, 0x00}, //Frequency Synthesizer Calibration
{CC1101_FSCAL0, 0x1F}, //Frequency Synthesizer Calibration
{CC1101_TEST2, 0x81}, //Various Test Settings
{CC1101_TEST1, 0x35}, //Various Test Settings
{CC1101_TEST0, 0x09}, //Various Test Settings
/* End */ /* End */
{0, 0}, {0, 0},
}; };
@@ -687,7 +628,6 @@ uint32_t furi_hal_subghz_set_frequency(uint32_t value) {
} }
furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz); furi_hal_spi_release(&furi_hal_spi_bus_handle_subghz);
return real_frequency; return real_frequency;
} }