diff --git a/bootloader/targets/f4/target.c b/bootloader/targets/f4/target.c
index e3590565..7060e2e5 100644
--- a/bootloader/targets/f4/target.c
+++ b/bootloader/targets/f4/target.c
@@ -31,6 +31,8 @@
 #define BOOT_USB_DP_PIN LL_GPIO_PIN_12
 #define BOOT_USB_PIN (BOOT_USB_DM_PIN | BOOT_USB_DP_PIN)
 
+#define RTC_CLOCK_IS_READY() (LL_RCC_LSE_IsReady() && LL_RCC_LSI1_IsReady())
+
 void target_led_control(char* c) {
     LL_GPIO_SetOutputPin(LED_RED_PORT, LED_RED_PIN);
     LL_GPIO_SetOutputPin(LED_GREEN_PORT, LED_GREEN_PIN);
@@ -98,17 +100,19 @@ void gpio_init() {
 void rtc_init() {
     // LSE and RTC
     LL_PWR_EnableBkUpAccess();
-    if(!LL_RCC_LSE_IsReady()) {
+    if(!RTC_CLOCK_IS_READY()) {
+        // Start LSI1 needed for CSS
+        LL_RCC_LSI1_Enable();
         // Try to start LSE normal way
         LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_MEDIUMLOW);
         LL_RCC_LSE_Enable();
         uint32_t c = 0;
-        while(!LL_RCC_LSE_IsReady() && c < 200) {
+        while(!RTC_CLOCK_IS_READY() && c < 200) {
             LL_mDelay(10);
             c++;
         }
         // Plan B: reset backup domain
-        if(!LL_RCC_LSE_IsReady()) {
+        if(!RTC_CLOCK_IS_READY()) {
             target_led_control("-R.R.R.");
             LL_RCC_ForceBackupDomainReset();
             LL_RCC_ReleaseBackupDomainReset();
@@ -116,6 +120,8 @@ void rtc_init() {
         }
         // Set RTC domain clock to LSE
         LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE);
+        // Enable LSE CSS
+        LL_RCC_LSE_EnableCSS();
     }
     // Enable clocking
     LL_RCC_EnableRTC();
diff --git a/bootloader/targets/f5/target.c b/bootloader/targets/f5/target.c
index f3461bf4..3007c91e 100644
--- a/bootloader/targets/f5/target.c
+++ b/bootloader/targets/f5/target.c
@@ -23,6 +23,8 @@
 #define BOOT_USB_DP_PIN LL_GPIO_PIN_12
 #define BOOT_USB_PIN (BOOT_USB_DM_PIN | BOOT_USB_DP_PIN)
 
+#define RTC_CLOCK_IS_READY() (LL_RCC_LSE_IsReady() && LL_RCC_LSI1_IsReady())
+
 void target_led_control(char* c) {
     api_hal_light_set(LightRed, 0x00);
     api_hal_light_set(LightGreen, 0x00);
@@ -80,17 +82,19 @@ void gpio_init() {
 void rtc_init() {
     // LSE and RTC
     LL_PWR_EnableBkUpAccess();
-    if(!LL_RCC_LSE_IsReady()) {
+    if(!RTC_CLOCK_IS_READY()) {
+        // Start LSI1 needed for CSS
+        LL_RCC_LSI1_Enable();
         // Try to start LSE normal way
         LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_MEDIUMLOW);
         LL_RCC_LSE_Enable();
         uint32_t c = 0;
-        while(!LL_RCC_LSE_IsReady() && c < 200) {
+        while(!RTC_CLOCK_IS_READY() && c < 200) {
             LL_mDelay(10);
             c++;
         }
         // Plan B: reset backup domain
-        if(!LL_RCC_LSE_IsReady()) {
+        if(!RTC_CLOCK_IS_READY()) {
             target_led_control("-R.R.R.");
             LL_RCC_ForceBackupDomainReset();
             LL_RCC_ReleaseBackupDomainReset();
@@ -98,6 +102,8 @@ void rtc_init() {
         }
         // Set RTC domain clock to LSE
         LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE);
+        // Enable LSE CSS
+        LL_RCC_LSE_EnableCSS();
     }
     // Enable clocking
     LL_RCC_EnableRTC();
diff --git a/firmware/targets/f4/Src/main.c b/firmware/targets/f4/Src/main.c
index 33016589..8c766611 100644
--- a/firmware/targets/f4/Src/main.c
+++ b/firmware/targets/f4/Src/main.c
@@ -72,11 +72,12 @@ void SystemClock_Config(void)
     __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_MEDIUMLOW);
     __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
 
-    RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_HSE
-                                                            |RCC_OSCILLATORTYPE_LSE;
-    RCC_OscInitStruct.HSEState = RCC_HSE_ON;
-    RCC_OscInitStruct.LSEState = RCC_LSE_ON;
+    RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE
+                                       | RCC_OSCILLATORTYPE_LSI1 | RCC_OSCILLATORTYPE_LSE;
     RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+    RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+    RCC_OscInitStruct.LSIState = RCC_LSI_ON;
+    RCC_OscInitStruct.LSEState = RCC_LSE_ON;
     RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
     RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
     RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
@@ -126,9 +127,11 @@ void SystemClock_Config(void)
         Error_Handler();
     }
 
-    // Enable CSS for both clocks
+    // CSS for HSE
     HAL_RCC_EnableCSS();
+    // CSS for LSE
     HAL_RCCEx_EnableLSECSS();
+    HAL_RCCEx_EnableLSECSS_IT();
 }
 
 void Error_Handler(void) {
diff --git a/firmware/targets/f4/Src/stm32wbxx_it.c b/firmware/targets/f4/Src/stm32wbxx_it.c
index 452573db..14d93ede 100644
--- a/firmware/targets/f4/Src/stm32wbxx_it.c
+++ b/firmware/targets/f4/Src/stm32wbxx_it.c
@@ -188,12 +188,12 @@ void SysTick_Handler(void)
   */
 void TAMP_STAMP_LSECSS_IRQHandler(void)
 {
-  /* USER CODE BEGIN TAMP_STAMP_LSECSS_IRQn 0 */
-  HAL_RCC_CSSCallback();
-  /* USER CODE END TAMP_STAMP_LSECSS_IRQn 0 */
-  /* USER CODE BEGIN TAMP_STAMP_LSECSS_IRQn 1 */
-
-  /* USER CODE END TAMP_STAMP_LSECSS_IRQn 1 */
+  if (!LL_RCC_LSE_IsReady()) {
+    // TODO: notify user about issue with LSE
+    LL_RCC_ForceBackupDomainReset();
+    LL_RCC_ReleaseBackupDomainReset();
+    NVIC_SystemReset();
+  }
 }
 
 /**
@@ -202,9 +202,6 @@ void TAMP_STAMP_LSECSS_IRQHandler(void)
 void RCC_IRQHandler(void)
 {
   /* USER CODE BEGIN RCC_IRQn 0 */
-  if (!LL_RCC_LSE_IsReady()) {
-    HAL_RCC_CSSCallback();
-  }
   /* USER CODE END RCC_IRQn 0 */
   /* USER CODE BEGIN RCC_IRQn 1 */
 
diff --git a/firmware/targets/f4/api-hal/api-hal-power.c b/firmware/targets/f4/api-hal/api-hal-power.c
index d58bc1d5..39f6903b 100644
--- a/firmware/targets/f4/api-hal/api-hal-power.c
+++ b/firmware/targets/f4/api-hal/api-hal-power.c
@@ -15,8 +15,7 @@
 volatile uint32_t api_hal_power_insomnia = 1;
 
 void HAL_RCC_CSSCallback(void) {
-    LL_RCC_ForceBackupDomainReset();
-    LL_RCC_ReleaseBackupDomainReset();
+    // TODO: notify user about issue with HSE
     NVIC_SystemReset();
 }
 
diff --git a/firmware/targets/f5/Src/main.c b/firmware/targets/f5/Src/main.c
index 8fb1b2c1..fcd98aac 100644
--- a/firmware/targets/f5/Src/main.c
+++ b/firmware/targets/f5/Src/main.c
@@ -73,11 +73,12 @@ void SystemClock_Config(void)
     __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
     LL_RCC_HSE_SetCapacitorTuning(0x18);
 
-    RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_HSE
-                                                            |RCC_OSCILLATORTYPE_LSE;
-    RCC_OscInitStruct.HSEState = RCC_HSE_ON;
-    RCC_OscInitStruct.LSEState = RCC_LSE_ON;
+    RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE
+                                       | RCC_OSCILLATORTYPE_LSI1 | RCC_OSCILLATORTYPE_LSE;
     RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+    RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+    RCC_OscInitStruct.LSIState = RCC_LSI_ON;
+    RCC_OscInitStruct.LSEState = RCC_LSE_ON;
     RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
     RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
     RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
@@ -127,9 +128,11 @@ void SystemClock_Config(void)
         Error_Handler();
     }
 
-    // Enable CSS for both clocks
+    // CSS for HSE
     HAL_RCC_EnableCSS();
+    // CSS for LSE
     HAL_RCCEx_EnableLSECSS();
+    HAL_RCCEx_EnableLSECSS_IT();
 }
 
 void Error_Handler(void) {
diff --git a/firmware/targets/f5/Src/stm32wbxx_it.c b/firmware/targets/f5/Src/stm32wbxx_it.c
index 452573db..14d93ede 100644
--- a/firmware/targets/f5/Src/stm32wbxx_it.c
+++ b/firmware/targets/f5/Src/stm32wbxx_it.c
@@ -188,12 +188,12 @@ void SysTick_Handler(void)
   */
 void TAMP_STAMP_LSECSS_IRQHandler(void)
 {
-  /* USER CODE BEGIN TAMP_STAMP_LSECSS_IRQn 0 */
-  HAL_RCC_CSSCallback();
-  /* USER CODE END TAMP_STAMP_LSECSS_IRQn 0 */
-  /* USER CODE BEGIN TAMP_STAMP_LSECSS_IRQn 1 */
-
-  /* USER CODE END TAMP_STAMP_LSECSS_IRQn 1 */
+  if (!LL_RCC_LSE_IsReady()) {
+    // TODO: notify user about issue with LSE
+    LL_RCC_ForceBackupDomainReset();
+    LL_RCC_ReleaseBackupDomainReset();
+    NVIC_SystemReset();
+  }
 }
 
 /**
@@ -202,9 +202,6 @@ void TAMP_STAMP_LSECSS_IRQHandler(void)
 void RCC_IRQHandler(void)
 {
   /* USER CODE BEGIN RCC_IRQn 0 */
-  if (!LL_RCC_LSE_IsReady()) {
-    HAL_RCC_CSSCallback();
-  }
   /* USER CODE END RCC_IRQn 0 */
   /* USER CODE BEGIN RCC_IRQn 1 */
 
diff --git a/firmware/targets/f5/api-hal/api-hal-power.c b/firmware/targets/f5/api-hal/api-hal-power.c
index d58bc1d5..39f6903b 100644
--- a/firmware/targets/f5/api-hal/api-hal-power.c
+++ b/firmware/targets/f5/api-hal/api-hal-power.c
@@ -15,8 +15,7 @@
 volatile uint32_t api_hal_power_insomnia = 1;
 
 void HAL_RCC_CSSCallback(void) {
-    LL_RCC_ForceBackupDomainReset();
-    LL_RCC_ReleaseBackupDomainReset();
+    // TODO: notify user about issue with HSE
     NVIC_SystemReset();
 }