SubGhz: sending / receiving messages via subghz (#851)
* SubGhz: add worker subghz_txrx * SubGhz: added support for transferring Russian characters and support for backspace in CLI subghz_txrx * SubGhz: refactoring subghz_txrx_worker, added a callback for accepting data in an empty one RX buffer * SubGhz: fix conflict * SubGhz: fix syntax errors * Cli: document string_move usage and its behavior * FuriHal: update subghz api and documentation. Subghz: move chat to subghz cli subcommand. * Subghz: update text in chat cli Co-authored-by: Aleksandr Kutuzov <alleteam@gmail.com>
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@@ -22,14 +22,14 @@ CC1101Status cc1101_write_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t
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while(hal_gpio_read(handle->miso));
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furi_hal_spi_bus_trx(handle, tx, (uint8_t*)rx, 2, CC1101_TIMEOUT);
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assert((rx[0].CHIP_RDYn|rx[1].CHIP_RDYn) == 0);
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assert((rx[0].CHIP_RDYn | rx[1].CHIP_RDYn) == 0);
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return rx[1];
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}
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CC1101Status cc1101_read_reg(FuriHalSpiBusHandle* handle, uint8_t reg, uint8_t* data) {
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assert(sizeof(CC1101Status) == 1);
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uint8_t tx[2] = { reg|CC1101_READ, 0};
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CC1101Status rx[2] = { 0 };
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uint8_t tx[2] = {reg | CC1101_READ, 0};
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CC1101Status rx[2] = {0};
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while(hal_gpio_read(handle->miso));
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furi_hal_spi_bus_trx(handle, tx, (uint8_t*)rx, 2, CC1101_TIMEOUT);
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@@ -58,8 +58,6 @@ uint8_t cc1101_get_rssi(FuriHalSpiBusHandle* handle) {
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}
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void cc1101_reset(FuriHalSpiBusHandle* handle) {
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delay_us(1000);
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delay_us(1000);
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cc1101_strobe(handle, CC1101_STROBE_SRES);
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}
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@@ -130,7 +128,7 @@ void cc1101_set_pa_table(FuriHalSpiBusHandle* handle, const uint8_t value[8]) {
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while(hal_gpio_read(handle->miso));
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furi_hal_spi_bus_trx(handle, tx, (uint8_t*)rx, sizeof(rx), CC1101_TIMEOUT);
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assert((rx[0].CHIP_RDYn|rx[8].CHIP_RDYn) == 0);
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assert((rx[0].CHIP_RDYn | rx[8].CHIP_RDYn) == 0);
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}
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uint8_t cc1101_write_fifo(FuriHalSpiBusHandle* handle, const uint8_t* data, uint8_t size) {
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@@ -159,9 +157,14 @@ uint8_t cc1101_read_fifo(FuriHalSpiBusHandle* handle, uint8_t* data, uint8_t* si
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// First byte - packet length
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furi_hal_spi_bus_trx(handle, buff_tx, buff_rx, 2, CC1101_TIMEOUT);
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*size = buff_rx[1];
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// Check that the packet is placed in the receive buffer
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if(buff_rx[1] > 64) {
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*size = 64;
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} else {
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*size = buff_rx[1];
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}
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furi_hal_spi_bus_trx(handle, &buff_tx[1], data, *size, CC1101_TIMEOUT);
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cc1101_flush_rx(handle);
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return *size;
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}
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@@ -89,22 +89,21 @@ extern "C" {
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#define CC1101_STATUS_PARTNUM 0x30 /** Chip ID Part Number */
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#define CC1101_STATUS_VERSION 0x31 /** Chip ID Version */
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#define CC1101_STATUS_FREQEST 0x32 /** Frequency Offset Estimate from Demodulator */
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#define CC1101_STATUS_LQI 0x33 /** Demodulator Estimate for Link Quality */
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#define CC1101_STATUS_LQI 0x33 /** Demodulator Estimate for Link Quality, 7bit-CRC, 6..0-LQI*/
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#define CC1101_STATUS_RSSI 0x34 /** Received Signal Strength Indication */
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#define CC1101_STATUS_MARCSTATE 0x35 /** Main Radio Control State Machine State */
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#define CC1101_STATUS_WORTIME1 0x36 /** High Byte of WOR Time */
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#define CC1101_STATUS_WORTIME0 0x37 /** Low Byte of WOR Time */
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#define CC1101_STATUS_PKTSTATUS 0x38 /** Current GDOx Status and Packet Status */
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#define CC1101_STATUS_VCO_VC_DAC 0x39 /** Current Setting from PLL Calibration Module */
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#define CC1101_STATUS_TXBYTES 0x3A /** Underflow and Number of Bytes */
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#define CC1101_STATUS_RXBYTES 0x3B /** Overflow and Number of Bytes */
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#define CC1101_STATUS_TXBYTES 0x3A /** Underflow and Number of Bytes, 7bit-Underflow, 6..0-Number of Bytes*/
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#define CC1101_STATUS_RXBYTES 0x3B /** Overflow and Number of Bytes, 7bit-Overflow*, 6..0-Number of Bytes*/
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#define CC1101_STATUS_RCCTRL1_STATUS 0x3C /** Last RC Oscillator Calibration Result */
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#define CC1101_STATUS_RCCTRL0_STATUS 0x3D /** Last RC Oscillator Calibration Result */
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/* Some special registers, use CC1101_BURST to read/write data */
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#define CC1101_PATABLE 0x3E /** PATABLE register number, an 8-byte table that defines the PA control settings */
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#define CC1101_FIFO 0x3F /** FIFO register nunmber, can be combined with CC1101_WRITE and/or CC1101_BURST */
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#define CC1101_IOCFG_INV (1<<6) /** IOCFG inversion */
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typedef enum {
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