F2 F3 deprecate (#267)
* move f3-1 to f4, remove f3 * remove f2 * remove firmware F3 for pipeline * remove patch for F4 makefile * fix fw makefile * migrate bootloader to f4
This commit is contained in:
coreglitch
GitHub
187
bootloader/targets/f4/stm32wb55xx_flash_cm4.ld
Normal file
187
bootloader/targets/f4/stm32wb55xx_flash_cm4.ld
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@@ -0,0 +1,187 @@
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/**
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*****************************************************************************
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**
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** File : stm32wb55xx_flash_cm4.ld
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**
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** Abstract : System Workbench Minimal System calls file
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**
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** For more information about which c-functions
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** need which of these lowlevel functions
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** please consult the Newlib libc-manual
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**
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** Environment : System Workbench for MCU
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**
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** Distribution: The file is distributed “as is,” without any warranty
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** of any kind.
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**
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*****************************************************************************
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**
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** <h2><center>© COPYRIGHT(c) 2019 Ac6</center></h2>
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**
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** Redistribution and use in source and binary forms, with or without modification,
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** are permitted provided that the following conditions are met:
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** 1. Redistributions of source code must retain the above copyright notice,
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** this list of conditions and the following disclaimer.
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** 2. Redistributions in binary form must reproduce the above copyright notice,
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** this list of conditions and the following disclaimer in the documentation
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** and/or other materials provided with the distribution.
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** 3. Neither the name of Ac6 nor the names of its contributors
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** may be used to endorse or promote products derived from this software
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** without specific prior written permission.
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**
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** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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**
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*****************************************************************************
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*/
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/* Entry Point */
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ENTRY(Reset_Handler)
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/* Highest address of the user mode stack */
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_estack = 0x20030000; /* end of RAM */
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/* Generate a link error if heap and stack don't fit into RAM */
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_Min_Heap_Size = 0x200; /* required amount of heap */
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_Min_Stack_Size = 0x400; /* required amount of stack */
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/* Specify the memory areas */
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MEMORY
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{
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FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K
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RAM1 (xrw) : ORIGIN = 0x20000004, LENGTH = 0x2FFFC
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RAM_SHARED (xrw) : ORIGIN = 0x20030000, LENGTH = 10K
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}
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/* Define output sections */
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SECTIONS
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{
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/* The startup code goes first into FLASH */
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.isr_vector :
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{
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. = ALIGN(4);
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KEEP(*(.isr_vector)) /* Startup code */
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. = ALIGN(4);
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} >FLASH
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/* The program code and other data goes into FLASH */
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.text :
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{
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. = ALIGN(4);
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*(.text) /* .text sections (code) */
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*(.text*) /* .text* sections (code) */
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*(.glue_7) /* glue arm to thumb code */
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*(.glue_7t) /* glue thumb to arm code */
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*(.eh_frame)
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KEEP (*(.init))
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KEEP (*(.fini))
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. = ALIGN(4);
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_etext = .; /* define a global symbols at end of code */
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} >FLASH
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/* Constant data goes into FLASH */
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.rodata :
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{
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. = ALIGN(4);
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*(.rodata) /* .rodata sections (constants, strings, etc.) */
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*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
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. = ALIGN(4);
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} >FLASH
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.ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
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.ARM : {
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__exidx_start = .;
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*(.ARM.exidx*)
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__exidx_end = .;
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} >FLASH
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.preinit_array :
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{
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PROVIDE_HIDDEN (__preinit_array_start = .);
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KEEP (*(.preinit_array*))
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PROVIDE_HIDDEN (__preinit_array_end = .);
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} >FLASH
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.init_array :
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{
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PROVIDE_HIDDEN (__init_array_start = .);
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KEEP (*(SORT(.init_array.*)))
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KEEP (*(.init_array*))
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PROVIDE_HIDDEN (__init_array_end = .);
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} >FLASH
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.fini_array :
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{
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PROVIDE_HIDDEN (__fini_array_start = .);
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KEEP (*(SORT(.fini_array.*)))
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KEEP (*(.fini_array*))
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PROVIDE_HIDDEN (__fini_array_end = .);
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} >FLASH
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/* used by the startup to initialize data */
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_sidata = LOADADDR(.data);
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/* Initialized data sections goes into RAM, load LMA copy after code */
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.data :
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{
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. = ALIGN(4);
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_sdata = .; /* create a global symbol at data start */
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*(.data) /* .data sections */
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*(.data*) /* .data* sections */
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. = ALIGN(4);
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_edata = .; /* define a global symbol at data end */
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} >RAM1 AT> FLASH
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/* Uninitialized data section */
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. = ALIGN(4);
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.bss :
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{
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/* This is used by the startup in order to initialize the .bss secion */
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_sbss = .; /* define a global symbol at bss start */
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__bss_start__ = _sbss;
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*(.bss)
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*(.bss*)
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*(COMMON)
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. = ALIGN(4);
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_ebss = .; /* define a global symbol at bss end */
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__bss_end__ = _ebss;
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} >RAM1
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/* User_heap_stack section, used to check that there is enough RAM left */
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._user_heap_stack :
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{
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. = ALIGN(8);
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PROVIDE ( end = . );
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PROVIDE ( _end = . );
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. = . + _Min_Heap_Size;
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. = . + _Min_Stack_Size;
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. = ALIGN(8);
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} >RAM1
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/* Remove information from the standard libraries */
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/DISCARD/ :
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{
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libc.a ( * )
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libm.a ( * )
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libgcc.a ( * )
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}
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.ARM.attributes 0 : { *(.ARM.attributes) }
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MAPPING_TABLE (NOLOAD) : { *(MAPPING_TABLE) } >RAM_SHARED
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MB_MEM1 (NOLOAD) : { *(MB_MEM1) } >RAM_SHARED
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MB_MEM2 (NOLOAD) : { _sMB_MEM2 = . ; *(MB_MEM2) ; _eMB_MEM2 = . ; } >RAM_SHARED
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}
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160
bootloader/targets/f4/target.c
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160
bootloader/targets/f4/target.c
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@@ -0,0 +1,160 @@
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#include <target.h>
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#include <stm32wbxx.h>
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#include <stm32wbxx_ll_system.h>
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#include <stm32wbxx_ll_bus.h>
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#include <stm32wbxx_ll_utils.h>
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#include <stm32wbxx_ll_rcc.h>
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#include <stm32wbxx_ll_rtc.h>
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#include <stm32wbxx_ll_pwr.h>
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#include <stm32wbxx_ll_gpio.h>
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// Boot request enum
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#define BOOT_REQUEST_NONE 0x00000000
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#define BOOT_REQUEST_DFU 0xDF00B000
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// Boot to DFU pin
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#define BOOT_DFU_PORT GPIOB
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#define BOOT_DFU_PIN LL_GPIO_PIN_11
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// LCD backlight
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#define BOOT_LCD_BL_PORT GPIOA
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#define BOOT_LCD_BL_PIN LL_GPIO_PIN_15
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// LEDs
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#define LED_RED_PORT GPIOA
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#define LED_RED_PIN LL_GPIO_PIN_1
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#define LED_GREEN_PORT GPIOA
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#define LED_GREEN_PIN LL_GPIO_PIN_2
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#define LED_BLUE_PORT GPIOA
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#define LED_BLUE_PIN LL_GPIO_PIN_3
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// USB pins
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#define BOOT_USB_PORT GPIOA
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#define BOOT_USB_DM_PIN LL_GPIO_PIN_11
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#define BOOT_USB_DP_PIN LL_GPIO_PIN_12
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#define BOOT_USB_PIN (BOOT_USB_DM_PIN | BOOT_USB_DP_PIN)
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void clock_init() {
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LL_FLASH_SetLatency(LL_FLASH_LATENCY_3);
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LL_RCC_MSI_Enable();
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while(LL_RCC_MSI_IsReady() != 1) {
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}
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/* Main PLL configuration and activation */
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LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 32, LL_RCC_PLLR_DIV_2);
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LL_RCC_PLL_Enable();
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LL_RCC_PLL_EnableDomain_SYS();
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while(LL_RCC_PLL_IsReady() != 1) {
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}
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/* Sysclk activation on the main PLL */
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/* Set CPU1 prescaler*/
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LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
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/* Set CPU2 prescaler*/
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LL_C2_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_2);
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LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
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while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) {
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}
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/* Set AHB SHARED prescaler*/
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LL_RCC_SetAHB4Prescaler(LL_RCC_SYSCLK_DIV_1);
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/* Set APB1 prescaler*/
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LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
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/* Set APB2 prescaler*/
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LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
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LL_Init1msTick(64000000);
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/* Update CMSIS variable (which can be updated also through SystemCoreClockUpdate function) */
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LL_SetSystemCoreClock(64000000);
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}
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void gpio_init() {
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LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOA);
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LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOB);
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// USB D+
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LL_GPIO_SetPinMode(BOOT_USB_PORT, BOOT_USB_DP_PIN, LL_GPIO_MODE_OUTPUT);
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LL_GPIO_SetPinSpeed(BOOT_USB_PORT, BOOT_USB_DP_PIN, LL_GPIO_SPEED_FREQ_VERY_HIGH);
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LL_GPIO_SetPinOutputType(BOOT_USB_PORT, BOOT_USB_DP_PIN, LL_GPIO_OUTPUT_OPENDRAIN);
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// USB D-
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LL_GPIO_SetPinMode(BOOT_USB_PORT, BOOT_USB_DM_PIN, LL_GPIO_MODE_OUTPUT);
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LL_GPIO_SetPinSpeed(BOOT_USB_PORT, BOOT_USB_DM_PIN, LL_GPIO_SPEED_FREQ_VERY_HIGH);
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LL_GPIO_SetPinOutputType(BOOT_USB_PORT, BOOT_USB_DM_PIN, LL_GPIO_OUTPUT_OPENDRAIN);
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// Button: back
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LL_GPIO_SetPinMode(BOOT_DFU_PORT, BOOT_DFU_PIN, LL_GPIO_MODE_INPUT);
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LL_GPIO_SetPinPull(BOOT_DFU_PORT, BOOT_DFU_PIN, LL_GPIO_PULL_UP);
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// Display backlight
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LL_GPIO_SetPinMode(BOOT_LCD_BL_PORT, BOOT_LCD_BL_PIN, LL_GPIO_MODE_OUTPUT);
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LL_GPIO_SetPinSpeed(BOOT_LCD_BL_PORT, BOOT_LCD_BL_PIN, LL_GPIO_SPEED_FREQ_LOW);
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LL_GPIO_SetPinOutputType(BOOT_LCD_BL_PORT, BOOT_LCD_BL_PIN, LL_GPIO_OUTPUT_PUSHPULL);
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// LEDs
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LL_GPIO_SetPinMode(LED_RED_PORT, LED_RED_PIN, LL_GPIO_MODE_OUTPUT);
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LL_GPIO_SetPinOutputType(LED_RED_PORT, LED_RED_PIN, LL_GPIO_OUTPUT_OPENDRAIN);
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LL_GPIO_SetOutputPin(LED_RED_PORT, LED_RED_PIN);
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LL_GPIO_SetPinMode(LED_GREEN_PORT, LED_GREEN_PIN, LL_GPIO_MODE_OUTPUT);
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LL_GPIO_SetPinOutputType(LED_GREEN_PORT, LED_GREEN_PIN, LL_GPIO_OUTPUT_OPENDRAIN);
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LL_GPIO_SetOutputPin(LED_GREEN_PORT, LED_GREEN_PIN);
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LL_GPIO_SetPinMode(LED_BLUE_PORT, LED_BLUE_PIN, LL_GPIO_MODE_OUTPUT);
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LL_GPIO_SetPinOutputType(LED_BLUE_PORT, LED_BLUE_PIN, LL_GPIO_OUTPUT_OPENDRAIN);
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LL_GPIO_SetOutputPin(LED_BLUE_PORT, LED_BLUE_PIN);
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}
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void rtc_init() {
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LL_RCC_EnableRTC();
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LL_APB2_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_RTCAPB);
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LL_PWR_EnableBkUpAccess();
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}
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void lcd_backlight_on() {
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LL_GPIO_SetOutputPin(BOOT_LCD_BL_PORT, BOOT_LCD_BL_PIN);
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}
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void usb_wire_reset() {
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LL_GPIO_ResetOutputPin(BOOT_USB_PORT, BOOT_USB_PIN);
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LL_mDelay(10);
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LL_GPIO_SetOutputPin(BOOT_USB_PORT, BOOT_USB_PIN);
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}
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void target_init() {
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clock_init();
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rtc_init();
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gpio_init();
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usb_wire_reset();
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}
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int target_is_dfu_requested() {
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if(LL_RTC_BAK_GetRegister(RTC, LL_RTC_BKP_DR0) == BOOT_REQUEST_DFU) {
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LL_RTC_BAK_SetRegister(RTC, LL_RTC_BKP_DR0, BOOT_REQUEST_NONE);
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return 1;
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}
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if(!LL_GPIO_IsInputPinSet(BOOT_DFU_PORT, BOOT_DFU_PIN)) {
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return 1;
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}
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return 0;
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}
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void target_switch(void* offset) {
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asm volatile("ldr r3, [%0] \n"
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"msr msp, r3 \n"
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"ldr r3, [%1] \n"
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"mov pc, r3 \n"
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:
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: "r"(offset), "r"(offset + 0x4)
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: "r3");
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}
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void target_switch2dfu() {
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LL_GPIO_ResetOutputPin(LED_BLUE_PORT, LED_BLUE_PIN);
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// Remap memory to system bootloader
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LL_SYSCFG_SetRemapMemory(LL_SYSCFG_REMAP_SYSTEMFLASH);
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target_switch(0x0);
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}
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void target_switch2os() {
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LL_GPIO_ResetOutputPin(LED_RED_PORT, LED_RED_PIN);
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SCB->VTOR = BOOT_ADDRESS + OS_OFFSET;
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target_switch((void*)(BOOT_ADDRESS + OS_OFFSET));
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}
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29
bootloader/targets/f4/target.mk
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29
bootloader/targets/f4/target.mk
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@@ -0,0 +1,29 @@
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TOOLCHAIN = arm
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BOOT_ADDRESS = 0x08000000
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FW_ADDRESS = 0x08008000
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OS_OFFSET = 0x00008000
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FLASH_ADDRESS = 0x08000000
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OPENOCD_OPTS = -f interface/stlink.cfg -c "transport select hla_swd" -f target/stm32wbx.cfg -c "init" -c "adapter speed 4000"
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BOOT_CFLAGS = -DBOOT_ADDRESS=$(BOOT_ADDRESS) -DFW_ADDRESS=$(FW_ADDRESS) -DOS_OFFSET=$(OS_OFFSET)
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MCU_FLAGS = -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard
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CFLAGS += $(MCU_FLAGS) $(BOOT_CFLAGS) -DSTM32WB55xx -Wall -fdata-sections -ffunction-sections
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LDFLAGS += $(MCU_FLAGS) -specs=nosys.specs -specs=nano.specs
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CUBE_DIR = ../lib/STM32CubeWB
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ASM_SOURCES += $(CUBE_DIR)/Drivers/CMSIS/Device/ST/STM32WBxx/Source/Templates/gcc/startup_stm32wb55xx_cm4.s
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C_SOURCES += $(CUBE_DIR)/Drivers/CMSIS/Device/ST/STM32WBxx/Source/Templates/system_stm32wbxx.c
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C_SOURCES += $(CUBE_DIR)/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_ll_utils.c
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CFLAGS += -I$(CUBE_DIR)/Drivers/CMSIS/Include
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CFLAGS += -I$(CUBE_DIR)/Drivers/CMSIS/Device/ST/STM32WBxx/Include
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CFLAGS += -I$(CUBE_DIR)/Drivers/STM32WBxx_HAL_Driver/Inc
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LDFLAGS += -T$(TARGET_DIR)/stm32wb55xx_flash_cm4.ld
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ASM_SOURCES += $(wildcard $(TARGET_DIR)/*.s)
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C_SOURCES += $(wildcard $(TARGET_DIR)/*.c)
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CPP_SOURCES += $(wildcard $(TARGET_DIR)/*.cpp)
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