Bootloader: do not configure clock on start, just minimum LL init. (#269)
* Bootloader: do not configure clock on start, just minimum LL init.
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@ -598,7 +598,7 @@ extern "C" void cc1101_workaround(void* p) {
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true, true, true, false, true, false, true};
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for(uint8_t n = 0; n < 10; n++) {
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for(uint8_t i = 0; i < sizeof(SEQ)/sizeof(SEQ[0]); i++) {
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for(uint8_t i = 0; i < sizeof(SEQ) / sizeof(SEQ[0]); i++) {
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if(SEQ[i]) {
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gpio_write(&cc1101_g0_gpio, false);
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delay_us(ONE_ON);
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@ -614,7 +614,7 @@ extern "C" void cc1101_workaround(void* p) {
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osDelay(4);
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}
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gpio_write(&cc1101_g0_gpio, false);
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}
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@ -31,42 +31,8 @@
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#define BOOT_USB_PIN (BOOT_USB_DM_PIN | BOOT_USB_DP_PIN)
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void clock_init() {
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LL_FLASH_SetLatency(LL_FLASH_LATENCY_3);
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LL_RCC_MSI_Enable();
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while(LL_RCC_MSI_IsReady() != 1) {
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}
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/* Main PLL configuration and activation */
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LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_MSI, LL_RCC_PLLM_DIV_1, 32, LL_RCC_PLLR_DIV_2);
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LL_RCC_PLL_Enable();
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LL_RCC_PLL_EnableDomain_SYS();
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while(LL_RCC_PLL_IsReady() != 1) {
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}
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/* Sysclk activation on the main PLL */
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/* Set CPU1 prescaler*/
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LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
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/* Set CPU2 prescaler*/
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LL_C2_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_2);
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LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
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while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) {
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}
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/* Set AHB SHARED prescaler*/
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LL_RCC_SetAHB4Prescaler(LL_RCC_SYSCLK_DIV_1);
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/* Set APB1 prescaler*/
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LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
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/* Set APB2 prescaler*/
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LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
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LL_Init1msTick(64000000);
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/* Update CMSIS variable (which can be updated also through SystemCoreClockUpdate function) */
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LL_SetSystemCoreClock(64000000);
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LL_Init1msTick(4000000);
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LL_SetSystemCoreClock(4000000);
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}
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void gpio_init() {
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@ -119,7 +85,6 @@ void target_init() {
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clock_init();
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rtc_init();
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gpio_init();
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usb_wire_reset();
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}
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