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[FL-2435] SD over SPI improvements (#2204)

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* get rid of BSP layer
* sector_cache: init in any case
* new sd-spi driver: init
* Delete stm32_adafruit_sd.c.old
* Delete spi_sd_hal.c.old
* Storage: faster api lock primitive
* Threads: priority control
* Flags: correct error code
* Spi: dma mode
* SD-card: use DMA for big blocks of SPI data
* Fix wrong SD_TOKEN_START_DATA_MULTIPLE_BLOCK_WRITE value
* do not memset cache if it is NULL
* remove top-level timeouts
* sd hal: disable debug
* Furi HAL: DMA
* Furi HAL RFID: use furi_hal_dma
* Furi HAL DMA: tests
* Furi HAL DMA: docs
* rollback "Furi HAL RFID: use furi_hal_dma"
* 4 channels taken from DMA manager for core HAL.
* Furi HAL DMA: live fast, die young
* RPC tests: increase message buffer
* SPI HAL: use second DMA instance
* sd hal: new CID getter
* SPI hal: use non-DMA version if kernel is not running
* IR hal: generalize DMA definition
* storage: add CID data to sd info
* RFID hal: generalize DMA definition
* SUBGHZ hal: generalize DMA definition. Core hal moved to DMA2.
* Storage: small optimizations, removal of extra mutex
* Storage: redundant macro
* SD hal: more timeouts
* SPI hal: DMA init
* Target: make furi_hal_spi_dma_init symbol private
* Update F18 api symbols

Co-authored-by: Aleksandr Kutuzov <alleteam@gmail.com>
This commit is contained in:
Sergey Gavrilov
2023-02-08 07:41:22 +03:00
committed by GitHub
parent 224d0aefe4
commit e3d473bf42
31 changed files with 1539 additions and 1661 deletions
Download Patch File Download Diff File Expand all files Collapse all files

49
firmware/targets/f7/furi_hal/furi_hal_subghz.c
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@@ -18,6 +18,14 @@
static uint32_t furi_hal_subghz_debug_gpio_buff[2];
/* DMA Channels definition */
#define SUBGHZ_DMA DMA2
#define SUBGHZ_DMA_CH1_CHANNEL LL_DMA_CHANNEL_1
#define SUBGHZ_DMA_CH2_CHANNEL LL_DMA_CHANNEL_2
#define SUBGHZ_DMA_CH1_IRQ FuriHalInterruptIdDma2Ch1
#define SUBGHZ_DMA_CH1_DEF SUBGHZ_DMA, SUBGHZ_DMA_CH1_CHANNEL
#define SUBGHZ_DMA_CH2_DEF SUBGHZ_DMA, SUBGHZ_DMA_CH2_CHANNEL
typedef struct {
volatile SubGhzState state;
volatile SubGhzRegulation regulation;
@@ -525,8 +533,8 @@ static void furi_hal_subghz_async_tx_refill(uint32_t* buffer, size_t samples) {
*buffer = 0;
buffer++;
samples--;
LL_DMA_DisableIT_HT(DMA1, LL_DMA_CHANNEL_1);
LL_DMA_DisableIT_TC(DMA1, LL_DMA_CHANNEL_1);
LL_DMA_DisableIT_HT(SUBGHZ_DMA_CH1_DEF);
LL_DMA_DisableIT_TC(SUBGHZ_DMA_CH1_DEF);
LL_TIM_EnableIT_UPDATE(TIM2);
break;
} else {
@@ -567,17 +575,22 @@ static void furi_hal_subghz_async_tx_refill(uint32_t* buffer, size_t samples) {
static void furi_hal_subghz_async_tx_dma_isr() {
furi_assert(furi_hal_subghz.state == SubGhzStateAsyncTx);
if(LL_DMA_IsActiveFlag_HT1(DMA1)) {
LL_DMA_ClearFlag_HT1(DMA1);
#if SUBGHZ_DMA_CH1_CHANNEL == LL_DMA_CHANNEL_1
if(LL_DMA_IsActiveFlag_HT1(SUBGHZ_DMA)) {
LL_DMA_ClearFlag_HT1(SUBGHZ_DMA);
furi_hal_subghz_async_tx_refill(
furi_hal_subghz_async_tx.buffer, API_HAL_SUBGHZ_ASYNC_TX_BUFFER_HALF);
}
if(LL_DMA_IsActiveFlag_TC1(DMA1)) {
LL_DMA_ClearFlag_TC1(DMA1);
if(LL_DMA_IsActiveFlag_TC1(SUBGHZ_DMA)) {
LL_DMA_ClearFlag_TC1(SUBGHZ_DMA);
furi_hal_subghz_async_tx_refill(
furi_hal_subghz_async_tx.buffer + API_HAL_SUBGHZ_ASYNC_TX_BUFFER_HALF,
API_HAL_SUBGHZ_ASYNC_TX_BUFFER_HALF);
}
#else
#error Update this code. Would you kindly?
#endif
}
static void furi_hal_subghz_async_tx_timer_isr() {
@@ -586,7 +599,7 @@ static void furi_hal_subghz_async_tx_timer_isr() {
if(LL_TIM_GetAutoReload(TIM2) == 0) {
if(furi_hal_subghz.state == SubGhzStateAsyncTx) {
furi_hal_subghz.state = SubGhzStateAsyncTxLast;
LL_DMA_DisableChannel(DMA1, LL_DMA_CHANNEL_1);
LL_DMA_DisableChannel(SUBGHZ_DMA_CH1_DEF);
} else if(furi_hal_subghz.state == SubGhzStateAsyncTxLast) {
furi_hal_subghz.state = SubGhzStateAsyncTxEnd;
//forcibly pulls the pin to the ground so that there is no carrier
@@ -634,11 +647,11 @@ bool furi_hal_subghz_start_async_tx(FuriHalSubGhzAsyncTxCallback callback, void*
dma_config.NbData = API_HAL_SUBGHZ_ASYNC_TX_BUFFER_FULL;
dma_config.PeriphRequest = LL_DMAMUX_REQ_TIM2_UP;
dma_config.Priority = LL_DMA_MODE_NORMAL;
LL_DMA_Init(DMA1, LL_DMA_CHANNEL_1, &dma_config);
furi_hal_interrupt_set_isr(FuriHalInterruptIdDma1Ch1, furi_hal_subghz_async_tx_dma_isr, NULL);
LL_DMA_EnableIT_TC(DMA1, LL_DMA_CHANNEL_1);
LL_DMA_EnableIT_HT(DMA1, LL_DMA_CHANNEL_1);
LL_DMA_EnableChannel(DMA1, LL_DMA_CHANNEL_1);
LL_DMA_Init(SUBGHZ_DMA_CH1_DEF, &dma_config);
furi_hal_interrupt_set_isr(SUBGHZ_DMA_CH1_IRQ, furi_hal_subghz_async_tx_dma_isr, NULL);
LL_DMA_EnableIT_TC(SUBGHZ_DMA_CH1_DEF);
LL_DMA_EnableIT_HT(SUBGHZ_DMA_CH1_DEF);
LL_DMA_EnableChannel(SUBGHZ_DMA_CH1_DEF);
// Configure TIM2
LL_TIM_InitTypeDef TIM_InitStruct = {0};
@@ -696,9 +709,9 @@ bool furi_hal_subghz_start_async_tx(FuriHalSubGhzAsyncTxCallback callback, void*
dma_config.NbData = 2;
dma_config.PeriphRequest = LL_DMAMUX_REQ_TIM2_UP;
dma_config.Priority = LL_DMA_PRIORITY_VERYHIGH;
LL_DMA_Init(DMA1, LL_DMA_CHANNEL_2, &dma_config);
LL_DMA_SetDataLength(DMA1, LL_DMA_CHANNEL_2, 2);
LL_DMA_EnableChannel(DMA1, LL_DMA_CHANNEL_2);
LL_DMA_Init(SUBGHZ_DMA_CH2_DEF, &dma_config);
LL_DMA_SetDataLength(SUBGHZ_DMA_CH2_DEF, 2);
LL_DMA_EnableChannel(SUBGHZ_DMA_CH2_DEF);
}
return true;
@@ -726,16 +739,16 @@ void furi_hal_subghz_stop_async_tx() {
furi_hal_interrupt_set_isr(FuriHalInterruptIdTIM2, NULL, NULL);
// Deinitialize DMA
LL_DMA_DeInit(DMA1, LL_DMA_CHANNEL_1);
LL_DMA_DeInit(SUBGHZ_DMA_CH1_DEF);
furi_hal_interrupt_set_isr(FuriHalInterruptIdDma1Ch1, NULL, NULL);
furi_hal_interrupt_set_isr(SUBGHZ_DMA_CH1_IRQ, NULL, NULL);
// Deinitialize GPIO
furi_hal_gpio_init(&gpio_cc1101_g0, GpioModeAnalog, GpioPullNo, GpioSpeedLow);
// Stop debug
if(furi_hal_subghz_stop_debug()) {
LL_DMA_DisableChannel(DMA1, LL_DMA_CHANNEL_2);
LL_DMA_DisableChannel(SUBGHZ_DMA_CH2_DEF);
}
FURI_CRITICAL_EXIT();