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@@ -21,7 +21,6 @@
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(FLASH_SR_OPERR | FLASH_SR_PROGERR | FLASH_SR_WRPERR | FLASH_SR_PGAERR | FLASH_SR_SIZERR | \
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FLASH_SR_PGSERR | FLASH_SR_MISERR | FLASH_SR_FASTERR | FLASH_SR_RDERR | FLASH_SR_OPTVERR)
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//#define FURI_HAL_FLASH_OB_START_ADDRESS 0x1FFF8000
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#define FURI_HAL_FLASH_OPT_KEY1 0x08192A3B
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#define FURI_HAL_FLASH_OPT_KEY2 0x4C5D6E7F
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#define FURI_HAL_FLASH_OB_TOTAL_WORDS (0x80 / (sizeof(uint32_t) * 2))
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@@ -80,9 +79,13 @@ size_t furi_hal_flash_get_free_page_count() {
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}
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void furi_hal_flash_init() {
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// Errata 2.2.9, Flash OPTVERR flag is always set after system reset
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WRITE_REG(FLASH->SR, FLASH_SR_OPTVERR);
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//__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_OPTVERR);
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/* Errata 2.2.9, Flash OPTVERR flag is always set after system reset */
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// WRITE_REG(FLASH->SR, FLASH_SR_OPTVERR);
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/* Actually, reset all error flags on start */
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if(READ_BIT(FLASH->SR, FURI_HAL_FLASH_SR_ERRORS)) {
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FURI_LOG_E(TAG, "FLASH->SR 0x%08X", FLASH->SR);
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WRITE_REG(FLASH->SR, FURI_HAL_FLASH_SR_ERRORS);
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}
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}
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static void furi_hal_flash_unlock() {
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@@ -91,6 +94,7 @@ static void furi_hal_flash_unlock() {
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/* Authorize the FLASH Registers access */
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WRITE_REG(FLASH->KEYR, FURI_HAL_FLASH_KEY1);
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__ISB();
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WRITE_REG(FLASH->KEYR, FURI_HAL_FLASH_KEY2);
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/* verify Flash is unlocked */
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@@ -110,38 +114,38 @@ static void furi_hal_flash_lock(void) {
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}
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static void furi_hal_flash_begin_with_core2(bool erase_flag) {
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// Take flash controller ownership
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/* Take flash controller ownership */
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while(LL_HSEM_1StepLock(HSEM, CFG_HW_FLASH_SEMID) != 0) {
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furi_thread_yield();
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}
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// Unlock flash operation
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/* Unlock flash operation */
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furi_hal_flash_unlock();
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// Erase activity notification
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/* Erase activity notification */
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if(erase_flag) SHCI_C2_FLASH_EraseActivity(ERASE_ACTIVITY_ON);
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// 64mHz 5us core2 flag protection
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/* 64mHz 5us core2 flag protection */
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for(volatile uint32_t i = 0; i < 35; i++)
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;
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while(true) {
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// Wait till flash controller become usable
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/* Wait till flash controller become usable */
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while(LL_FLASH_IsActiveFlag_OperationSuspended()) {
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furi_thread_yield();
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};
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// Just a little more love
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/* Just a little more love */
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taskENTER_CRITICAL();
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// Actually we already have mutex for it, but specification is specification
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/* Actually we already have mutex for it, but specification is specification */
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if(LL_HSEM_IsSemaphoreLocked(HSEM, CFG_HW_BLOCK_FLASH_REQ_BY_CPU1_SEMID)) {
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taskEXIT_CRITICAL();
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furi_thread_yield();
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continue;
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}
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// Take sempahopre and prevent core2 from anything funky
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/* Take sempahopre and prevent core2 from anything funky */
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if(LL_HSEM_1StepLock(HSEM, CFG_HW_BLOCK_FLASH_REQ_BY_CPU2_SEMID) != 0) {
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taskEXIT_CRITICAL();
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furi_thread_yield();
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@@ -153,10 +157,10 @@ static void furi_hal_flash_begin_with_core2(bool erase_flag) {
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}
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static void furi_hal_flash_begin(bool erase_flag) {
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// Acquire dangerous ops mutex
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/* Acquire dangerous ops mutex */
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furi_hal_bt_lock_core2();
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// If Core2 is running use IPC locking
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/* If Core2 is running use IPC locking */
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if(furi_hal_bt_is_alive()) {
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furi_hal_flash_begin_with_core2(erase_flag);
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} else {
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@@ -165,36 +169,36 @@ static void furi_hal_flash_begin(bool erase_flag) {
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}
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static void furi_hal_flash_end_with_core2(bool erase_flag) {
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// Funky ops are ok at this point
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/* Funky ops are ok at this point */
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LL_HSEM_ReleaseLock(HSEM, CFG_HW_BLOCK_FLASH_REQ_BY_CPU2_SEMID, 0);
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// Task switching is ok
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/* Task switching is ok */
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taskEXIT_CRITICAL();
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// Doesn't make much sense, does it?
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/* Doesn't make much sense, does it? */
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while(READ_BIT(FLASH->SR, FLASH_SR_BSY)) {
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furi_thread_yield();
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}
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// Erase activity over, core2 can continue
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/* Erase activity over, core2 can continue */
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if(erase_flag) SHCI_C2_FLASH_EraseActivity(ERASE_ACTIVITY_OFF);
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// Lock flash controller
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/* Lock flash controller */
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furi_hal_flash_lock();
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// Release flash controller ownership
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/* Release flash controller ownership */
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LL_HSEM_ReleaseLock(HSEM, CFG_HW_FLASH_SEMID, 0);
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}
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static void furi_hal_flash_end(bool erase_flag) {
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// If Core2 is running use IPC locking
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/* If Core2 is running - use IPC locking */
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if(furi_hal_bt_is_alive()) {
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furi_hal_flash_end_with_core2(erase_flag);
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} else {
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furi_hal_flash_lock();
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}
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// Release dangerous ops mutex
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/* Release dangerous ops mutex */
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furi_hal_bt_unlock_core2();
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}
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@@ -226,9 +230,9 @@ bool furi_hal_flash_wait_last_operation(uint32_t timeout) {
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uint32_t error = 0;
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uint32_t countdown = 0;
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// Wait for the FLASH operation to complete by polling on BUSY flag to be reset.
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// Even if the FLASH operation fails, the BUSY flag will be reset and an error
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// flag will be set
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/* Wait for the FLASH operation to complete by polling on BUSY flag to be reset.
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Even if the FLASH operation fails, the BUSY flag will be reset and an error
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flag will be set */
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countdown = timeout;
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while(READ_BIT(FLASH->SR, FLASH_SR_BSY)) {
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if(LL_SYSTICK_IsActiveCounterFlag()) {
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@@ -269,10 +273,10 @@ bool furi_hal_flash_wait_last_operation(uint32_t timeout) {
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return true;
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}
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bool furi_hal_flash_erase(uint8_t page) {
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void furi_hal_flash_erase(uint8_t page) {
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furi_hal_flash_begin(true);
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// Ensure that controller state is valid
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/* Ensure that controller state is valid */
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furi_check(FLASH->SR == 0);
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/* Verify that next operation can be proceed */
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@@ -292,30 +296,31 @@ bool furi_hal_flash_erase(uint8_t page) {
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furi_hal_flush_cache();
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furi_hal_flash_end(true);
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return true;
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}
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static inline bool furi_hal_flash_write_dword_internal(size_t address, uint64_t* data) {
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static inline void furi_hal_flash_write_dword_internal_nowait(size_t address, uint64_t* data) {
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/* Program first word */
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*(uint32_t*)address = (uint32_t)*data;
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// Barrier to ensure programming is performed in 2 steps, in right order
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// (independently of compiler optimization behavior)
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/* Barrier to ensure programming is performed in 2 steps, in right order
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(independently of compiler optimization behavior) */
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__ISB();
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/* Program second word */
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*(uint32_t*)(address + 4U) = (uint32_t)(*data >> 32U);
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}
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static inline void furi_hal_flash_write_dword_internal(size_t address, uint64_t* data) {
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furi_hal_flash_write_dword_internal_nowait(address, data);
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/* Wait for last operation to be completed */
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furi_check(furi_hal_flash_wait_last_operation(FURI_HAL_FLASH_TIMEOUT));
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return true;
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}
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bool furi_hal_flash_write_dword(size_t address, uint64_t data) {
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void furi_hal_flash_write_dword(size_t address, uint64_t data) {
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furi_hal_flash_begin(false);
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// Ensure that controller state is valid
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/* Ensure that controller state is valid */
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furi_check(FLASH->SR == 0);
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/* Check the parameters */
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@@ -326,7 +331,7 @@ bool furi_hal_flash_write_dword(size_t address, uint64_t data) {
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SET_BIT(FLASH->CR, FLASH_CR_PG);
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/* Do the thing */
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furi_check(furi_hal_flash_write_dword_internal(address, &data));
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furi_hal_flash_write_dword_internal(address, &data);
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/* If the program operation is completed, disable the PG or FSTPG Bit */
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CLEAR_BIT(FLASH->CR, FLASH_CR_PG);
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@@ -335,14 +340,13 @@ bool furi_hal_flash_write_dword(size_t address, uint64_t data) {
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/* Wait for last operation to be completed */
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furi_check(furi_hal_flash_wait_last_operation(FURI_HAL_FLASH_TIMEOUT));
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return true;
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}
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static size_t furi_hal_flash_get_page_address(uint8_t page) {
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return furi_hal_flash_get_base() + page * FURI_HAL_FLASH_PAGE_SIZE;
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}
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bool furi_hal_flash_program_page(const uint8_t page, const uint8_t* data, uint16_t _length) {
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void furi_hal_flash_program_page(const uint8_t page, const uint8_t* data, uint16_t _length) {
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uint16_t length = _length;
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furi_check(length <= FURI_HAL_FLASH_PAGE_SIZE);
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@@ -350,37 +354,63 @@ bool furi_hal_flash_program_page(const uint8_t page, const uint8_t* data, uint16
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furi_hal_flash_begin(false);
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// Ensure that controller state is valid
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furi_check(furi_hal_flash_wait_last_operation(FURI_HAL_FLASH_TIMEOUT));
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/* Ensure that controller state is valid */
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furi_check(FLASH->SR == 0);
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size_t page_start_address = furi_hal_flash_get_page_address(page);
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/* Set PG bit */
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SET_BIT(FLASH->CR, FLASH_CR_PG);
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size_t i_dwords = 0;
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for(i_dwords = 0; i_dwords < (length / 8); ++i_dwords) {
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/* Do the thing */
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size_t data_offset = i_dwords * 8;
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furi_check(furi_hal_flash_write_dword_internal(
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page_start_address + data_offset, (uint64_t*)&data[data_offset]));
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size_t length_written = 0;
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const uint16_t FAST_PROG_BLOCK_SIZE = 512;
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const uint8_t DWORD_PROG_BLOCK_SIZE = 8;
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/* Write as much data as we can in fast mode */
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if(length >= FAST_PROG_BLOCK_SIZE) {
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taskENTER_CRITICAL();
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/* Enable fast flash programming mode */
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SET_BIT(FLASH->CR, FLASH_CR_FSTPG);
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while(length_written < (length / FAST_PROG_BLOCK_SIZE * FAST_PROG_BLOCK_SIZE)) {
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/* No context switch in the middle of the operation */
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furi_hal_flash_write_dword_internal_nowait(
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page_start_address + length_written, (uint64_t*)(data + length_written));
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length_written += DWORD_PROG_BLOCK_SIZE;
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if((length_written % FAST_PROG_BLOCK_SIZE) == 0) {
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/* Wait for block operation to be completed */
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furi_check(furi_hal_flash_wait_last_operation(FURI_HAL_FLASH_TIMEOUT));
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}
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}
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CLEAR_BIT(FLASH->CR, FLASH_CR_FSTPG);
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taskEXIT_CRITICAL();
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}
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if((length % 8) != 0) {
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/* Enable regular (dword) programming mode */
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SET_BIT(FLASH->CR, FLASH_CR_PG);
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if((length % FAST_PROG_BLOCK_SIZE) != 0) {
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/* Write tail in regular, dword mode */
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while(length_written < (length / DWORD_PROG_BLOCK_SIZE * DWORD_PROG_BLOCK_SIZE)) {
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furi_hal_flash_write_dword_internal(
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page_start_address + length_written, (uint64_t*)&data[length_written]);
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length_written += DWORD_PROG_BLOCK_SIZE;
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}
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}
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if((length % DWORD_PROG_BLOCK_SIZE) != 0) {
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/* there are more bytes, not fitting into dwords */
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uint64_t tail_data = 0;
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size_t data_offset = i_dwords * 8;
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for(int32_t tail_i = 0; tail_i < (length % 8); ++tail_i) {
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tail_data |= (((uint64_t)data[data_offset + tail_i]) << (tail_i * 8));
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for(int32_t tail_i = 0; tail_i < (length % DWORD_PROG_BLOCK_SIZE); ++tail_i) {
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tail_data |= (((uint64_t)data[length_written + tail_i]) << (tail_i * 8));
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}
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furi_check(
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furi_hal_flash_write_dword_internal(page_start_address + data_offset, &tail_data));
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furi_hal_flash_write_dword_internal(page_start_address + length_written, &tail_data);
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}
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/* If the program operation is completed, disable the PG or FSTPG Bit */
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/* Disable the PG Bit */
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CLEAR_BIT(FLASH->CR, FLASH_CR_PG);
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furi_hal_flash_end(false);
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return true;
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}
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int16_t furi_hal_flash_get_page_number(size_t address) {
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@@ -462,6 +492,7 @@ static const FuriHalFlashObMapping furi_hal_flash_ob_reg_map[FURI_HAL_FLASH_OB_T
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OB_REG_DEF(FuriHalFlashObRegisterSecureFlash, (NULL)),
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OB_REG_DEF(FuriHalFlashObRegisterC2Opts, (NULL)),
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};
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#undef OB_REG_DEF
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void furi_hal_flash_ob_apply() {
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furi_hal_flash_ob_unlock();
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