[FL-1558] Technical Debt: console, bootloader, targets, stdglue, etc... (#590)
* ApiHal: console abstraction, change uart baud rate to 230400. Bootloader: drop F5. Furi: prevent thread local output to serial console in stdglue. * ApiHal: take control over system initialization, reorder some subsystems in a hope of fixing USB issues. * Main: cleanup dead code. ISR: take care of HSECSS by our self. USB: leave clock configuration alone. * F6 cube: switch RCC to LL. * Cli: rollback return behavior.
This commit is contained in:
@@ -31,16 +31,17 @@ extern "C" {
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#include "stm32wbxx_hal.h"
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#include "stm32wbxx.h"
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#include "stm32wbxx_ll_i2c.h"
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#include "stm32wbxx_ll_bus.h"
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#include "stm32wbxx_ll_cortex.h"
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#include "stm32wbxx_ll_crs.h"
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#include "stm32wbxx_ll_rcc.h"
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#include "stm32wbxx_ll_bus.h"
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#include "stm32wbxx_ll_system.h"
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#include "stm32wbxx_ll_exti.h"
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#include "stm32wbxx_ll_cortex.h"
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#include "stm32wbxx_ll_utils.h"
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#include "stm32wbxx_ll_pwr.h"
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#include "stm32wbxx_ll_gpio.h"
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#include "stm32wbxx_ll_dma.h"
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#include "stm32wbxx_ll_exti.h"
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#include "stm32wbxx_ll_usart.h"
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#include "stm32wbxx_ll_gpio.h"
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/* Private includes ----------------------------------------------------------*/
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/* USER CODE BEGIN Includes */
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@@ -55,7 +55,7 @@
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#define HAL_SPI_MODULE_ENABLED
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#define HAL_TIM_MODULE_ENABLED
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/*#define HAL_TSC_MODULE_ENABLED */
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#define HAL_UART_MODULE_ENABLED
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/*#define HAL_UART_MODULE_ENABLED */
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/*#define HAL_USART_MODULE_ENABLED */
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/*#define HAL_WWDG_MODULE_ENABLED */
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#define HAL_EXTI_MODULE_ENABLED
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@@ -31,8 +31,6 @@ extern "C" {
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/* USER CODE END Includes */
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extern UART_HandleTypeDef huart1;
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/* USER CODE BEGIN Private defines */
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/* USER CODE END Private defines */
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@@ -1,5 +1,5 @@
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##########################################################################################################################
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# File automatically-generated by tool: [projectgenerator] version: [3.11.2] date: [Sun May 16 12:24:45 MSK 2021]
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# File automatically-generated by tool: [projectgenerator] version: [3.13.0-B3] date: [Tue Jul 20 02:23:07 MSK 2021]
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##########################################################################################################################
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# ------------------------------------------------
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@@ -94,8 +94,8 @@ Src/stm32wbxx_hal_msp.c \
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/Users/aku/STM32Cube/Repository/STM32Cube_FW_WB_V1.10.1/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_spi_ex.c \
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/Users/aku/STM32Cube/Repository/STM32Cube_FW_WB_V1.10.1/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_tim.c \
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/Users/aku/STM32Cube/Repository/STM32Cube_FW_WB_V1.10.1/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_tim_ex.c \
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/Users/aku/STM32Cube/Repository/STM32Cube_FW_WB_V1.10.1/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_uart.c \
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/Users/aku/STM32Cube/Repository/STM32Cube_FW_WB_V1.10.1/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_uart_ex.c \
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/Users/aku/STM32Cube/Repository/STM32Cube_FW_WB_V1.10.1/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_ll_usart.c \
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/Users/aku/STM32Cube/Repository/STM32Cube_FW_WB_V1.10.1/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_ll_rcc.c \
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Src/system_stm32wbxx.c \
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/Users/aku/STM32Cube/Repository/STM32Cube_FW_WB_V1.10.1/Middlewares/Third_Party/FreeRTOS/Source/croutine.c \
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/Users/aku/STM32Cube/Repository/STM32Cube_FW_WB_V1.10.1/Middlewares/Third_Party/FreeRTOS/Source/event_groups.c \
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@@ -178,7 +178,6 @@ C_INCLUDES = \
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-I/Users/aku/STM32Cube/Repository/STM32Cube_FW_WB_V1.10.1/Middlewares/ST/STM32_USB_Device_Library/Core/Inc \
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-I/Users/aku/STM32Cube/Repository/STM32Cube_FW_WB_V1.10.1/Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Inc \
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-I/Users/aku/STM32Cube/Repository/STM32Cube_FW_WB_V1.10.1/Drivers/CMSIS/Device/ST/STM32WBxx/Include \
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-I/Users/aku/STM32Cube/Repository/STM32Cube_FW_WB_V1.10.1/Drivers/CMSIS/Include \
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-I/Users/aku/STM32Cube/Repository/STM32Cube_FW_WB_V1.10.1/Drivers/CMSIS/Include
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@@ -105,7 +105,6 @@ int main(void)
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MX_RTC_Init();
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MX_SPI1_Init();
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MX_SPI2_Init();
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MX_USART1_UART_Init();
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MX_USB_Device_Init();
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MX_TIM1_Init();
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MX_TIM2_Init();
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@@ -117,6 +116,7 @@ int main(void)
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MX_AES1_Init();
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MX_AES2_Init();
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MX_CRC_Init();
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MX_USART1_UART_Init();
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/* USER CODE BEGIN 2 */
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/* USER CODE END 2 */
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@@ -145,87 +145,106 @@ int main(void)
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*/
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void SystemClock_Config(void)
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{
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RCC_OscInitTypeDef RCC_OscInitStruct = {0};
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RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
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RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
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LL_FLASH_SetLatency(LL_FLASH_LATENCY_3);
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while(LL_FLASH_GetLatency() != LL_FLASH_LATENCY_3)
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{
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}
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/** Configure LSE Drive Capability
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*/
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HAL_PWR_EnableBkUpAccess();
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__HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_MEDIUMLOW);
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/** Configure the main internal regulator output voltage
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*/
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__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
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/** Initializes the RCC Oscillators according to the specified parameters
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* in the RCC_OscInitTypeDef structure.
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*/
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_HSE
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|RCC_OSCILLATORTYPE_LSE;
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RCC_OscInitStruct.HSEState = RCC_HSE_ON;
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RCC_OscInitStruct.LSEState = RCC_LSE_ON;
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RCC_OscInitStruct.HSIState = RCC_HSI_ON;
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RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
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RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
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RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV2;
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RCC_OscInitStruct.PLL.PLLN = 8;
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RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
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RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
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RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
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if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
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/* HSE configuration and activation */
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LL_RCC_HSE_Enable();
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while(LL_RCC_HSE_IsReady() != 1)
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{
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Error_Handler();
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}
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/** Configure the SYSCLKSource, HCLK, PCLK1 and PCLK2 clocks dividers
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*/
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RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK4|RCC_CLOCKTYPE_HCLK2
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|RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
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|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
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RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
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RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
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RCC_ClkInitStruct.AHBCLK2Divider = RCC_SYSCLK_DIV2;
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RCC_ClkInitStruct.AHBCLK4Divider = RCC_SYSCLK_DIV1;
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if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK)
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/* HSI configuration and activation */
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LL_RCC_HSI_Enable();
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while(LL_RCC_HSI_IsReady() != 1)
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{
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}
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LL_PWR_EnableBkUpAccess();
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LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_MEDIUMLOW);
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LL_RCC_LSE_Enable();
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/* Wait till LSE is ready */
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while(LL_RCC_LSE_IsReady() != 1)
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{
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}
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LL_RCC_HSE_EnableCSS();
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LL_RCC_LSE_EnableCSS();
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/* Main PLL configuration and activation */
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LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSE, LL_RCC_PLLM_DIV_2, 8, LL_RCC_PLLR_DIV_2);
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LL_RCC_PLL_Enable();
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LL_RCC_PLL_EnableDomain_SYS();
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while(LL_RCC_PLL_IsReady() != 1)
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{
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}
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LL_RCC_PLLSAI1_ConfigDomain_48M(LL_RCC_PLLSOURCE_HSE, LL_RCC_PLLM_DIV_2, 6, LL_RCC_PLLSAI1Q_DIV_2);
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LL_RCC_PLLSAI1_ConfigDomain_ADC(LL_RCC_PLLSOURCE_HSE, LL_RCC_PLLM_DIV_2, 6, LL_RCC_PLLSAI1R_DIV_2);
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LL_RCC_PLLSAI1_Enable();
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LL_RCC_PLLSAI1_EnableDomain_48M();
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LL_RCC_PLLSAI1_EnableDomain_ADC();
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/* Wait till PLLSAI1 is ready */
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while(LL_RCC_PLLSAI1_IsReady() != 1)
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{
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}
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/* Sysclk activation on the main PLL */
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/* Set CPU1 prescaler*/
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LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
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/* Set CPU2 prescaler*/
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LL_C2_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_2);
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LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
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while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
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{
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}
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/* Set AHB SHARED prescaler*/
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LL_RCC_SetAHB4Prescaler(LL_RCC_SYSCLK_DIV_1);
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/* Set APB1 prescaler*/
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LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
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/* Set APB2 prescaler*/
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LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
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/* Disable MSI */
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LL_RCC_MSI_Disable();
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while(LL_RCC_MSI_IsReady() != 0)
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{
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}
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/* Update CMSIS variable (which can be updated also through SystemCoreClockUpdate function) */
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LL_SetSystemCoreClock(64000000);
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/* Update the time base */
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if (HAL_InitTick (TICK_INT_PRIORITY) != HAL_OK)
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{
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Error_Handler();
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}
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/** Initializes the peripherals clocks
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*/
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PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SMPS|RCC_PERIPHCLK_RFWAKEUP
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|RCC_PERIPHCLK_RTC|RCC_PERIPHCLK_USART1
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|RCC_PERIPHCLK_I2C1|RCC_PERIPHCLK_CLK48SEL
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|RCC_PERIPHCLK_USB|RCC_PERIPHCLK_RNG
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|RCC_PERIPHCLK_ADC;
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PeriphClkInitStruct.PLLSAI1.PLLN = 6;
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PeriphClkInitStruct.PLLSAI1.PLLP = RCC_PLLP_DIV2;
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PeriphClkInitStruct.PLLSAI1.PLLQ = RCC_PLLQ_DIV2;
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PeriphClkInitStruct.PLLSAI1.PLLR = RCC_PLLR_DIV2;
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PeriphClkInitStruct.PLLSAI1.PLLSAI1ClockOut = RCC_PLLSAI1_USBCLK|RCC_PLLSAI1_ADCCLK;
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PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
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PeriphClkInitStruct.I2c1ClockSelection = RCC_I2C1CLKSOURCE_PCLK1;
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PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLLSAI1;
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PeriphClkInitStruct.RngClockSelection = RCC_RNGCLKSOURCE_CLK48;
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PeriphClkInitStruct.AdcClockSelection = RCC_ADCCLKSOURCE_PLLSAI1;
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PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSE;
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PeriphClkInitStruct.RFWakeUpClockSelection = RCC_RFWKPCLKSOURCE_LSE;
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PeriphClkInitStruct.SmpsClockSelection = RCC_SMPSCLKSOURCE_HSE;
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PeriphClkInitStruct.SmpsDivSelection = RCC_SMPSCLKDIV_RANGE1;
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if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
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if(LL_RCC_GetRTCClockSource() != LL_RCC_RTC_CLKSOURCE_LSE)
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{
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Error_Handler();
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LL_RCC_ForceBackupDomainReset();
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LL_RCC_ReleaseBackupDomainReset();
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LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE);
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}
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LL_RCC_EnableRTC();
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LL_RCC_SetUSARTClockSource(LL_RCC_USART1_CLKSOURCE_PCLK2);
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LL_RCC_SetADCClockSource(LL_RCC_ADC_CLKSOURCE_PLLSAI1);
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LL_RCC_SetI2CClockSource(LL_RCC_I2C1_CLKSOURCE_PCLK1);
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LL_RCC_SetRNGClockSource(LL_RCC_RNG_CLKSOURCE_CLK48);
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LL_RCC_SetUSBClockSource(LL_RCC_USB_CLKSOURCE_PLLSAI1);
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LL_RCC_SetSMPSClockSource(LL_RCC_SMPS_CLKSOURCE_HSE);
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LL_RCC_SetSMPSPrescaler(LL_RCC_SMPS_DIV_1);
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LL_RCC_SetRFWKPClockSource(LL_RCC_RFWKP_CLKSOURCE_LSE);
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/* USER CODE BEGIN Smps */
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/* USER CODE END Smps */
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/** Enables the Clock Security System
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*/
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HAL_RCC_EnableCSS();
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/** Enables the Clock Security System
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*/
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HAL_RCCEx_EnableLSECSS();
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}
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/* USER CODE BEGIN 4 */
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@@ -79,7 +79,6 @@ void NMI_Handler(void)
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/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
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/* USER CODE END NonMaskableInt_IRQn 0 */
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HAL_RCC_NMI_IRQHandler();
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/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
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while (1)
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{
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@@ -24,96 +24,59 @@
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/* USER CODE END 0 */
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UART_HandleTypeDef huart1;
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/* USART1 init function */
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void MX_USART1_UART_Init(void)
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{
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LL_USART_InitTypeDef USART_InitStruct = {0};
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huart1.Instance = USART1;
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huart1.Init.BaudRate = 115200;
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huart1.Init.WordLength = UART_WORDLENGTH_8B;
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huart1.Init.StopBits = UART_STOPBITS_1;
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huart1.Init.Parity = UART_PARITY_NONE;
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huart1.Init.Mode = UART_MODE_TX_RX;
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huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
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huart1.Init.OverSampling = UART_OVERSAMPLING_16;
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huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
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huart1.Init.ClockPrescaler = UART_PRESCALER_DIV1;
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huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
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if (HAL_UART_Init(&huart1) != HAL_OK)
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LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
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/* Peripheral clock enable */
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LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_USART1);
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LL_AHB2_GRP1_EnableClock(LL_AHB2_GRP1_PERIPH_GPIOB);
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/**USART1 GPIO Configuration
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PB6 ------> USART1_TX
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PB7 ------> USART1_RX
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*/
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GPIO_InitStruct.Pin = LL_GPIO_PIN_6|LL_GPIO_PIN_7;
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GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
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GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;
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GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
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GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
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GPIO_InitStruct.Alternate = LL_GPIO_AF_7;
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LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
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|
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USART_InitStruct.PrescalerValue = LL_USART_PRESCALER_DIV1;
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USART_InitStruct.BaudRate = 115200;
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USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B;
|
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USART_InitStruct.StopBits = LL_USART_STOPBITS_1;
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USART_InitStruct.Parity = LL_USART_PARITY_NONE;
|
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USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX;
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USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE;
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USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16;
|
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LL_USART_Init(USART1, &USART_InitStruct);
|
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LL_USART_SetTXFIFOThreshold(USART1, LL_USART_FIFOTHRESHOLD_1_8);
|
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LL_USART_SetRXFIFOThreshold(USART1, LL_USART_FIFOTHRESHOLD_1_8);
|
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LL_USART_DisableFIFO(USART1);
|
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LL_USART_EnableAutoBaudRate(USART1);
|
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LL_USART_SetAutoBaudRateMode(USART1, LL_USART_AUTOBAUD_DETECT_ON_STARTBIT);
|
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LL_USART_ConfigAsyncMode(USART1);
|
||||
|
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/* USER CODE BEGIN WKUPType USART1 */
|
||||
|
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/* USER CODE END WKUPType USART1 */
|
||||
|
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LL_USART_Enable(USART1);
|
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|
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/* Polling USART1 initialisation */
|
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while((!(LL_USART_IsActiveFlag_TEACK(USART1))) || (!(LL_USART_IsActiveFlag_REACK(USART1))))
|
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{
|
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Error_Handler();
|
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}
|
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if (HAL_UARTEx_SetTxFifoThreshold(&huart1, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
|
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{
|
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Error_Handler();
|
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}
|
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if (HAL_UARTEx_SetRxFifoThreshold(&huart1, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
|
||||
{
|
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Error_Handler();
|
||||
}
|
||||
if (HAL_UARTEx_DisableFifoMode(&huart1) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
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}
|
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|
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}
|
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|
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void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
|
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{
|
||||
|
||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
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if(uartHandle->Instance==USART1)
|
||||
{
|
||||
/* USER CODE BEGIN USART1_MspInit 0 */
|
||||
|
||||
/* USER CODE END USART1_MspInit 0 */
|
||||
/* USART1 clock enable */
|
||||
__HAL_RCC_USART1_CLK_ENABLE();
|
||||
|
||||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||
/**USART1 GPIO Configuration
|
||||
PB6 ------> USART1_TX
|
||||
PB7 ------> USART1_RX
|
||||
*/
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
|
||||
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||
|
||||
/* USER CODE BEGIN USART1_MspInit 1 */
|
||||
|
||||
/* USER CODE END USART1_MspInit 1 */
|
||||
}
|
||||
}
|
||||
|
||||
void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle)
|
||||
{
|
||||
|
||||
if(uartHandle->Instance==USART1)
|
||||
{
|
||||
/* USER CODE BEGIN USART1_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END USART1_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_USART1_CLK_DISABLE();
|
||||
|
||||
/**USART1 GPIO Configuration
|
||||
PB6 ------> USART1_TX
|
||||
PB7 ------> USART1_RX
|
||||
*/
|
||||
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_6|GPIO_PIN_7);
|
||||
|
||||
/* USER CODE BEGIN USART1_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END USART1_MspDeInit 1 */
|
||||
}
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN 1 */
|
||||
|
||||
/* USER CODE END 1 */
|
||||
|
File diff suppressed because it is too large
Load Diff
Reference in New Issue
Block a user