132 lines
3.3 KiB
C
132 lines
3.3 KiB
C
#include "bq25896.h"
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#include "bq25896_reg.h"
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#include <furi-hal-i2c.h>
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#include <stddef.h>
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uint8_t bit_reverse(uint8_t b) {
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b = (b & 0xF0) >> 4 | (b & 0x0F) << 4;
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b = (b & 0xCC) >> 2 | (b & 0x33) << 2;
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b = (b & 0xAA) >> 1 | (b & 0x55) << 1;
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return b;
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}
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bool bq25896_read(uint8_t address, uint8_t* data, size_t size) {
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bool ret;
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with_furi_hal_i2c(
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bool, &ret, () {
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return furi_hal_i2c_trx(
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POWER_I2C, BQ25896_ADDRESS, &address, 1, data, size, BQ25896_I2C_TIMEOUT);
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});
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return ret;
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}
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bool bq25896_read_reg(uint8_t address, uint8_t* data) {
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bq25896_read(address, data, 1);
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return true;
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}
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bool bq25896_write_reg(uint8_t address, uint8_t* data) {
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uint8_t buffer[2] = {address, *data};
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bool ret;
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with_furi_hal_i2c(
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bool, &ret, () {
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return furi_hal_i2c_tx(POWER_I2C, BQ25896_ADDRESS, buffer, 2, BQ25896_I2C_TIMEOUT);
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});
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return ret;
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}
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typedef struct {
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REG00 r00;
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REG01 r01;
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REG02 r02;
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REG03 r03;
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REG04 r04;
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REG05 r05;
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REG06 r06;
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REG07 r07;
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REG08 r08;
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REG09 r09;
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REG0A r0A;
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REG0B r0B;
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REG0C r0C;
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REG0D r0D;
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REG0E r0E;
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REG0F r0F;
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REG10 r10;
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REG11 r11;
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REG12 r12;
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REG13 r13;
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REG14 r14;
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} bq25896_regs_t;
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static bq25896_regs_t bq25896_regs;
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void bq25896_init() {
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bq25896_regs.r14.REG_RST = 1;
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bq25896_write_reg(0x14, (uint8_t*)&bq25896_regs.r14);
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// Readout all registers
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bq25896_read(0x00, (uint8_t*)&bq25896_regs, sizeof(bq25896_regs));
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// Poll ADC forever
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bq25896_regs.r02.CONV_START = 1;
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bq25896_regs.r02.CONV_RATE = 1;
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bq25896_write_reg(0x02, (uint8_t*)&bq25896_regs.r02);
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bq25896_regs.r07.WATCHDOG = WatchdogDisable;
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bq25896_write_reg(0x07, (uint8_t*)&bq25896_regs.r07);
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bq25896_read(0x00, (uint8_t*)&bq25896_regs, sizeof(bq25896_regs));
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}
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void bq25896_poweroff() {
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bq25896_regs.r09.BATFET_DIS = 1;
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bq25896_write_reg(0x09, (uint8_t*)&bq25896_regs.r09);
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}
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bool bq25896_is_charging() {
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bq25896_read(0x00, (uint8_t*)&bq25896_regs, sizeof(bq25896_regs));
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bq25896_read_reg(0x0B, (uint8_t*)&bq25896_regs.r0B);
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return bq25896_regs.r0B.CHRG_STAT != ChrgStatNo;
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}
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void bq25896_enable_otg() {
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bq25896_regs.r03.OTG_CONFIG = 1;
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bq25896_write_reg(0x03, (uint8_t*)&bq25896_regs.r03);
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}
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void bq25896_disable_otg() {
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bq25896_regs.r03.OTG_CONFIG = 0;
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bq25896_write_reg(0x03, (uint8_t*)&bq25896_regs.r03);
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}
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uint16_t bq25896_get_vbus_voltage() {
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bq25896_read_reg(0x11, (uint8_t*)&bq25896_regs.r11);
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if(bq25896_regs.r11.VBUS_GD) {
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return (uint16_t)bq25896_regs.r11.VBUSV * 100 + 2600;
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} else {
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return 0;
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}
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}
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uint16_t bq25896_get_vsys_voltage() {
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bq25896_read_reg(0x0F, (uint8_t*)&bq25896_regs.r0F);
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return (uint16_t)bq25896_regs.r0F.SYSV * 20 + 2304;
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}
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uint16_t bq25896_get_vbat_voltage() {
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bq25896_read_reg(0x0E, (uint8_t*)&bq25896_regs.r0E);
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return (uint16_t)bq25896_regs.r0E.BATV * 20 + 2304;
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}
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uint16_t bq25896_get_vbat_current() {
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bq25896_read_reg(0x12, (uint8_t*)&bq25896_regs.r12);
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return (uint16_t)bq25896_regs.r12.ICHGR * 50;
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}
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uint32_t bq25896_get_ntc_mpct() {
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bq25896_read_reg(0x10, (uint8_t*)&bq25896_regs.r10);
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return (uint32_t)bq25896_regs.r10.TSPCT * 465 + 21000;
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}
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