1f761d7fbb
* maxim crc function * one wire template device and ds1990 classes * 3 fields for addr * cyfral emulator lib * add cyfral read mode, refract rendering and events * add ADC1_IN14, add adc interrupt * cyfral read mode * rename and move api-hal includes folder * build onewire libs only if we build app * start in mode 0
48 lines
1.5 KiB
C++
48 lines
1.5 KiB
C++
#include "maxim_crc.h"
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uint8_t maxim_crc8(const uint8_t* data, const uint8_t data_size, const uint8_t crc_init) {
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uint8_t crc = crc_init;
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for(uint8_t index = 0; index < data_size; ++index) {
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uint8_t input_byte = data[index];
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for(uint8_t bit_position = 0; bit_position < 8; ++bit_position) {
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const uint8_t mix = (crc ^ input_byte) & static_cast<uint8_t>(0x01);
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crc >>= 1;
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if(mix != 0) crc ^= 0x8C;
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input_byte >>= 1;
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}
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}
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return crc;
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}
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uint16_t maxim_crc16(const uint8_t* address, const uint8_t length, const uint16_t init) {
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uint16_t crc = init;
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static const uint8_t odd_parity[16] = {0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0};
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for(uint8_t i = 0; i < length; ++i) {
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uint16_t cdata = address[i];
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cdata = (cdata ^ crc) & static_cast<uint16_t>(0xff);
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crc >>= 8;
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if((odd_parity[cdata & 0x0F] ^ odd_parity[cdata >> 4]) != 0) crc ^= 0xC001;
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cdata <<= 6;
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crc ^= cdata;
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cdata <<= 1;
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crc ^= cdata;
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}
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return crc;
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}
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uint16_t maxim_crc16(uint8_t value, uint16_t crc) {
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static const uint8_t odd_parity[16] = {0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0};
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value = (value ^ static_cast<uint8_t>(crc));
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crc >>= 8;
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if((odd_parity[value & 0x0F] ^ odd_parity[value >> 4]) != 0) crc ^= 0xC001;
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uint16_t cdata = (static_cast<uint16_t>(value) << 6);
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crc ^= cdata;
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crc ^= (static_cast<uint16_t>(cdata) << 1);
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return crc;
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} |