Allow pins 0 and 1 as RTS/DTR for USB UART Bridge (#1864)
* Allow pins 0 and 1 as RTS/DTR for USB UART Bridge * add logic to gpio_scene_usb_uart_config, fix flow_pins * fixing count of pins * disable PC0,PC1 RTS/DTR when using LPUART * add logic to ensure flow pins dont overlap with uart lines Co-authored-by: あく <alleteam@gmail.com>
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56f760aa07
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@ -24,6 +24,7 @@ struct GpioApp {
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Widget* widget;
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VariableItemList* var_item_list;
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VariableItem* var_item_flow;
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GpioTest* gpio_test;
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GpioUsbUart* gpio_usb_uart;
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UsbUartBridge* usb_uart_bridge;
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@ -13,7 +13,7 @@ static UsbUartConfig* cfg_set;
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static const char* vcp_ch[] = {"0 (CLI)", "1"};
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static const char* uart_ch[] = {"13,14", "15,16"};
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static const char* flow_pins[] = {"None", "2,3", "6,7"};
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static const char* flow_pins[] = {"None", "2,3", "6,7", "16,15"};
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static const char* baudrate_mode[] = {"Host"};
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static const uint32_t baudrate_list[] = {
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2400,
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@ -33,6 +33,24 @@ bool gpio_scene_usb_uart_cfg_on_event(void* context, SceneManagerEvent event) {
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return false;
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}
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void line_ensure_flow_invariant(GpioApp* app) {
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// GPIO pins PC0, PC1 (16,15) are unavailable for RTS/DTR when LPUART is
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// selected. This function enforces that invariant by resetting flow_pins
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// to None if it is configured to 16,15 when LPUART is selected.
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uint8_t available_flow_pins = cfg_set->uart_ch == FuriHalUartIdLPUART1 ? 3 : 4;
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VariableItem* item = app->var_item_flow;
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variable_item_set_values_count(item, available_flow_pins);
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if(cfg_set->flow_pins >= available_flow_pins) {
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cfg_set->flow_pins = 0;
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usb_uart_set_config(app->usb_uart_bridge, cfg_set);
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variable_item_set_current_value_index(item, cfg_set->flow_pins);
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variable_item_set_current_value_text(item, flow_pins[cfg_set->flow_pins]);
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}
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}
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static void line_vcp_cb(VariableItem* item) {
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GpioApp* app = variable_item_get_context(item);
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uint8_t index = variable_item_get_current_value_index(item);
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@ -54,6 +72,7 @@ static void line_port_cb(VariableItem* item) {
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else if(index == 1)
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cfg_set->uart_ch = FuriHalUartIdLPUART1;
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usb_uart_set_config(app->usb_uart_bridge, cfg_set);
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line_ensure_flow_invariant(app);
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}
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static void line_flow_cb(VariableItem* item) {
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@ -116,9 +135,12 @@ void gpio_scene_usb_uart_cfg_on_enter(void* context) {
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variable_item_set_current_value_index(item, cfg_set->uart_ch);
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variable_item_set_current_value_text(item, uart_ch[cfg_set->uart_ch]);
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item = variable_item_list_add(var_item_list, "RTS/DTR Pins", 3, line_flow_cb, app);
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item = variable_item_list_add(
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var_item_list, "RTS/DTR Pins", COUNT_OF(flow_pins), line_flow_cb, app);
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variable_item_set_current_value_index(item, cfg_set->flow_pins);
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variable_item_set_current_value_text(item, flow_pins[cfg_set->flow_pins]);
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app->var_item_flow = item;
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line_ensure_flow_invariant(app);
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variable_item_list_set_selected_item(
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var_item_list, scene_manager_get_scene_state(app->scene_manager, GpioAppViewUsbUartCfg));
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@ -14,6 +14,7 @@
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static const GpioPin* flow_pins[][2] = {
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{&gpio_ext_pa7, &gpio_ext_pa6}, // 2, 3
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{&gpio_ext_pb2, &gpio_ext_pc3}, // 6, 7
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{&gpio_ext_pc0, &gpio_ext_pc1}, // 16, 15
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};
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typedef enum {
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@ -396,6 +396,10 @@ void variable_item_set_current_value_index(VariableItem* item, uint8_t current_v
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item->current_value_index = current_value_index;
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}
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void variable_item_set_values_count(VariableItem* item, uint8_t values_count) {
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item->values_count = values_count;
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}
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void variable_item_set_current_value_text(VariableItem* item, const char* current_value_text) {
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furi_string_set(item->current_value_text, current_value_text);
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}
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@ -81,6 +81,13 @@ uint8_t variable_item_list_get_selected_item_index(VariableItemList* variable_it
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*/
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void variable_item_set_current_value_index(VariableItem* item, uint8_t current_value_index);
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/** Set number of values for item
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*
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* @param item VariableItem* instance
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* @param values_count The new values count
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*/
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void variable_item_set_values_count(VariableItem* item, uint8_t values_count);
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/** Set item current selected text
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*
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* @param item VariableItem* instance
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