Allow pins 0 and 1 as RTS/DTR for USB UART Bridge (#1864)

* Allow pins 0 and 1 as RTS/DTR for USB UART Bridge
* add logic to gpio_scene_usb_uart_config, fix flow_pins
* fixing count of pins
* disable PC0,PC1 RTS/DTR when using LPUART
* add logic to ensure flow pins dont overlap with uart lines

Co-authored-by: あく <alleteam@gmail.com>
This commit is contained in:
Kevin Kwok
2022-10-18 08:06:18 -07:00
committed by GitHub
parent 56f760aa07
commit 72713d6f4e
5 changed files with 37 additions and 2 deletions

View File

@@ -24,6 +24,7 @@ struct GpioApp {
Widget* widget;
VariableItemList* var_item_list;
VariableItem* var_item_flow;
GpioTest* gpio_test;
GpioUsbUart* gpio_usb_uart;
UsbUartBridge* usb_uart_bridge;