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[FL-635] Enable LSE CSS (#371)

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* LSE CSS: explicitly configure and start LSE + LSI1 and enable LSECSS at boot, enable LSECSS interrupt in firmware.
* F4: backport LSE CSS shenanigans.
* Split LSE/HSE CSS handling routines, add TODO for missing notification.
This commit is contained in:
あく
2021-03-08 18:55:51 +03:00
committed by GitHub
parent 73e5379520
commit 9df4d8e2ed
8 changed files with 48 additions and 38 deletions
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12
bootloader/targets/f4/target.c
View File

@@ -31,6 +31,8 @@
#define BOOT_USB_DP_PIN LL_GPIO_PIN_12
#define BOOT_USB_PIN (BOOT_USB_DM_PIN | BOOT_USB_DP_PIN)
#define RTC_CLOCK_IS_READY() (LL_RCC_LSE_IsReady() && LL_RCC_LSI1_IsReady())
void target_led_control(char* c) {
LL_GPIO_SetOutputPin(LED_RED_PORT, LED_RED_PIN);
LL_GPIO_SetOutputPin(LED_GREEN_PORT, LED_GREEN_PIN);
@@ -98,17 +100,19 @@ void gpio_init() {
void rtc_init() {
// LSE and RTC
LL_PWR_EnableBkUpAccess();
if(!LL_RCC_LSE_IsReady()) {
if(!RTC_CLOCK_IS_READY()) {
// Start LSI1 needed for CSS
LL_RCC_LSI1_Enable();
// Try to start LSE normal way
LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_MEDIUMLOW);
LL_RCC_LSE_Enable();
uint32_t c = 0;
while(!LL_RCC_LSE_IsReady() && c < 200) {
while(!RTC_CLOCK_IS_READY() && c < 200) {
LL_mDelay(10);
c++;
}
// Plan B: reset backup domain
if(!LL_RCC_LSE_IsReady()) {
if(!RTC_CLOCK_IS_READY()) {
target_led_control("-R.R.R.");
LL_RCC_ForceBackupDomainReset();
LL_RCC_ReleaseBackupDomainReset();
@@ -116,6 +120,8 @@ void rtc_init() {
}
// Set RTC domain clock to LSE
LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE);
// Enable LSE CSS
LL_RCC_LSE_EnableCSS();
}
// Enable clocking
LL_RCC_EnableRTC();

12
bootloader/targets/f5/target.c
View File

@@ -23,6 +23,8 @@
#define BOOT_USB_DP_PIN LL_GPIO_PIN_12
#define BOOT_USB_PIN (BOOT_USB_DM_PIN | BOOT_USB_DP_PIN)
#define RTC_CLOCK_IS_READY() (LL_RCC_LSE_IsReady() && LL_RCC_LSI1_IsReady())
void target_led_control(char* c) {
api_hal_light_set(LightRed, 0x00);
api_hal_light_set(LightGreen, 0x00);
@@ -80,17 +82,19 @@ void gpio_init() {
void rtc_init() {
// LSE and RTC
LL_PWR_EnableBkUpAccess();
if(!LL_RCC_LSE_IsReady()) {
if(!RTC_CLOCK_IS_READY()) {
// Start LSI1 needed for CSS
LL_RCC_LSI1_Enable();
// Try to start LSE normal way
LL_RCC_LSE_SetDriveCapability(LL_RCC_LSEDRIVE_MEDIUMLOW);
LL_RCC_LSE_Enable();
uint32_t c = 0;
while(!LL_RCC_LSE_IsReady() && c < 200) {
while(!RTC_CLOCK_IS_READY() && c < 200) {
LL_mDelay(10);
c++;
}
// Plan B: reset backup domain
if(!LL_RCC_LSE_IsReady()) {
if(!RTC_CLOCK_IS_READY()) {
target_led_control("-R.R.R.");
LL_RCC_ForceBackupDomainReset();
LL_RCC_ReleaseBackupDomainReset();
@@ -98,6 +102,8 @@ void rtc_init() {
}
// Set RTC domain clock to LSE
LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE);
// Enable LSE CSS
LL_RCC_LSE_EnableCSS();
}
// Enable clocking
LL_RCC_EnableRTC();