[FL-1146] GD0 self-test

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あく 2021-05-08 22:24:05 +03:00 committed by GitHub
parent 2844743370
commit a975fb6dc5
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GPG Key ID: 4AEE18F83AFDEB23
7 changed files with 102 additions and 31 deletions

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@ -114,15 +114,15 @@ bool subghz_static_input(InputEvent* event, void* context) {
uint8_t bit = i % 8;
bool value = (key[byte] >> (7 - bit)) & 1;
// Payload send
hal_gpio_write(&cc1101_g0_gpio, false);
hal_gpio_write(&gpio_cc1101_g0, false);
delay_us(value ? SUBGHZ_PT_ONE : SUBGHZ_PT_ZERO);
hal_gpio_write(&cc1101_g0_gpio, true);
hal_gpio_write(&gpio_cc1101_g0, true);
delay_us(value ? SUBGHZ_PT_ZERO : SUBGHZ_PT_ONE);
}
// Last bit
hal_gpio_write(&cc1101_g0_gpio, false);
hal_gpio_write(&gpio_cc1101_g0, false);
delay_us(SUBGHZ_PT_ONE);
hal_gpio_write(&cc1101_g0_gpio, true);
hal_gpio_write(&gpio_cc1101_g0, true);
// Guard time
delay_us(10600);
}
@ -144,8 +144,8 @@ void subghz_static_enter(void* context) {
api_hal_subghz_reset();
api_hal_subghz_load_preset(ApiHalSubGhzPresetOokAsync);
hal_gpio_init(&cc1101_g0_gpio, GpioModeOutputPushPull, GpioPullNo, GpioSpeedLow);
hal_gpio_write(&cc1101_g0_gpio, true);
hal_gpio_init(&gpio_cc1101_g0, GpioModeOutputPushPull, GpioPullNo, GpioSpeedLow);
hal_gpio_write(&gpio_cc1101_g0, true);
with_view_model(
subghz_static->view, (SubghzStaticModel * model) {

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@ -105,12 +105,12 @@ bool subghz_test_basic_input(InputEvent* event, void* context) {
}
if(model->status == SubghzTestBasicModelStatusRx) {
hal_gpio_init(&cc1101_g0_gpio, GpioModeInput, GpioPullNo, GpioSpeedLow);
hal_gpio_init(&gpio_cc1101_g0, GpioModeInput, GpioPullNo, GpioSpeedLow);
api_hal_subghz_rx();
osTimerStart(subghz_test_basic->timer, 1024 / 4);
} else {
hal_gpio_init(&cc1101_g0_gpio, GpioModeOutputPushPull, GpioPullNo, GpioSpeedLow);
hal_gpio_write(&cc1101_g0_gpio, false);
hal_gpio_init(&gpio_cc1101_g0, GpioModeOutputPushPull, GpioPullNo, GpioSpeedLow);
hal_gpio_write(&gpio_cc1101_g0, false);
api_hal_subghz_tx();
}
@ -127,7 +127,7 @@ void subghz_test_basic_enter(void* context) {
api_hal_subghz_reset();
api_hal_subghz_load_preset(ApiHalSubGhzPresetOokAsync);
hal_gpio_init(&cc1101_g0_gpio, GpioModeInput, GpioPullNo, GpioSpeedLow);
hal_gpio_init(&gpio_cc1101_g0, GpioModeInput, GpioPullNo, GpioSpeedLow);
with_view_model(
subghz_test_basic->view, (SubghzTestBasicModel * model) {

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@ -134,7 +134,7 @@ void subghz_test_packet_enter(void* context) {
api_hal_subghz_reset();
api_hal_subghz_load_preset(ApiHalSubGhzPreset2FskPacket);
hal_gpio_init(&cc1101_g0_gpio, GpioModeInput, GpioPullNo, GpioSpeedLow);
hal_gpio_init(&gpio_cc1101_g0, GpioModeInput, GpioPullNo, GpioSpeedLow);
with_view_model(
subghz_test_packet->view, (SubghzTestPacketModel * model) {

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@ -18,7 +18,10 @@ const size_t input_pins_count = sizeof(input_pins) / sizeof(InputPin);
const GpioPin vibro_gpio = {.port = VIBRO_GPIO_Port, .pin = VIBRO_Pin};
const GpioPin ibutton_gpio = {.port = iBTN_GPIO_Port, .pin = iBTN_Pin};
const GpioPin cc1101_g0_gpio = {.port = CC1101_G0_GPIO_Port, .pin = CC1101_G0_Pin};
const GpioPin gpio_cc1101_g0 = {.port = CC1101_G0_GPIO_Port, .pin = CC1101_G0_Pin};
const GpioPin gpio_rf_sw_0 = {.port = RF_SW_0_GPIO_Port, .pin = RF_SW_0_Pin};
const GpioPin gpio_rf_sw_1 = {.port = RF_SW_1_GPIO_Port, .pin = RF_SW_1_Pin};
const GpioPin gpio_subghz_cs = {.port = CC1101_CS_GPIO_Port, .pin = CC1101_CS_Pin};
const GpioPin gpio_display_cs = {.port = DISPLAY_CS_GPIO_Port, .pin = DISPLAY_CS_Pin};

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@ -55,7 +55,10 @@ extern const size_t input_pins_count;
extern const GpioPin vibro_gpio;
extern const GpioPin ibutton_gpio;
extern const GpioPin cc1101_g0_gpio;
extern const GpioPin gpio_cc1101_g0;
extern const GpioPin gpio_rf_sw_0;
extern const GpioPin gpio_rf_sw_1;
extern const GpioPin gpio_subghz_cs;
extern const GpioPin gpio_display_cs;

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@ -1,10 +1,11 @@
#include "api-hal-subghz.h"
#include <stm32wbxx_ll_gpio.h>
#include <api-hal-gpio.h>
#include <api-hal-spi.h>
#include <api-hal-resources.h>
#include <furi.h>
#include <cc1101.h>
#include <stdio.h>
#include "main.h"
static const uint8_t api_hal_subghz_preset_ook_async_regs[][2] = {
/* Base setting */
@ -37,17 +38,24 @@ static const uint8_t api_hal_subghz_preset_2fsk_packet_patable[8] = {
};
void api_hal_subghz_init() {
LL_GPIO_SetPinMode(RF_SW_0_GPIO_Port, RF_SW_0_Pin, LL_GPIO_MODE_OUTPUT);
LL_GPIO_SetPinSpeed(RF_SW_0_GPIO_Port, RF_SW_0_Pin, LL_GPIO_SPEED_FREQ_LOW);
LL_GPIO_SetPinOutputType(RF_SW_0_GPIO_Port, RF_SW_0_Pin, LL_GPIO_OUTPUT_PUSHPULL);
LL_GPIO_SetPinMode(RF_SW_1_GPIO_Port, RF_SW_1_Pin, LL_GPIO_MODE_OUTPUT);
LL_GPIO_SetPinSpeed(RF_SW_1_GPIO_Port, RF_SW_1_Pin, LL_GPIO_SPEED_FREQ_LOW);
LL_GPIO_SetPinOutputType(RF_SW_1_GPIO_Port, RF_SW_1_Pin, LL_GPIO_OUTPUT_PUSHPULL);
hal_gpio_init(&gpio_rf_sw_0, GpioModeOutputPushPull, GpioPullNo, GpioSpeedLow);
hal_gpio_init(&gpio_rf_sw_1, GpioModeOutputPushPull, GpioPullNo, GpioSpeedLow);
const ApiHalSpiDevice* device = api_hal_spi_device_get(ApiHalSpiDeviceIdSubGhz);
// Reset and shutdown
cc1101_reset(device);
cc1101_write_reg(device, CC1101_IOCFG0, 0x2E); // High impedance 3-state
// Prepare GD0 for power on self test
hal_gpio_init(&gpio_cc1101_g0, GpioModeInput, GpioPullNo, GpioSpeedLow);
// GD0 low
cc1101_write_reg(device, CC1101_IOCFG0, CC1101IocfgHW);
while(hal_gpio_read(&gpio_cc1101_g0) != false);
// GD0 high
cc1101_write_reg(device, CC1101_IOCFG0, CC1101IocfgHW | CC1101_IOCFG_INV);
while(hal_gpio_read(&gpio_cc1101_g0) != true);
// Reset GD0 to floating state
cc1101_write_reg(device, CC1101_IOCFG0, CC1101IocfgHighImpedance);
hal_gpio_init(&gpio_cc1101_g0, GpioModeAnalog, GpioPullNo, GpioSpeedLow);
// Turn off oscillator
cc1101_shutdown(device);
api_hal_spi_device_return(device);
}
@ -164,18 +172,18 @@ uint32_t api_hal_subghz_set_frequency(uint32_t value) {
void api_hal_subghz_set_path(ApiHalSubGhzPath path) {
if (path == ApiHalSubGhzPath1) {
LL_GPIO_ResetOutputPin(RF_SW_0_GPIO_Port, RF_SW_0_Pin);
LL_GPIO_SetOutputPin(RF_SW_1_GPIO_Port, RF_SW_1_Pin);
hal_gpio_write(&gpio_rf_sw_0, 0);
hal_gpio_write(&gpio_rf_sw_1, 1);
} else if (path == ApiHalSubGhzPath2) {
LL_GPIO_SetOutputPin(RF_SW_0_GPIO_Port, RF_SW_0_Pin);
LL_GPIO_ResetOutputPin(RF_SW_1_GPIO_Port, RF_SW_1_Pin);
hal_gpio_write(&gpio_rf_sw_0, 1);
hal_gpio_write(&gpio_rf_sw_1, 0);
} else if (path == ApiHalSubGhzPath3) {
LL_GPIO_SetOutputPin(RF_SW_0_GPIO_Port, RF_SW_0_Pin);
LL_GPIO_SetOutputPin(RF_SW_1_GPIO_Port, RF_SW_1_Pin);
hal_gpio_write(&gpio_rf_sw_0, 1);
hal_gpio_write(&gpio_rf_sw_1, 1);
} else if (path == ApiHalSubGhzPathIsolate) {
LL_GPIO_ResetOutputPin(RF_SW_0_GPIO_Port, RF_SW_0_Pin);
LL_GPIO_ResetOutputPin(RF_SW_1_GPIO_Port, RF_SW_1_Pin);
hal_gpio_write(&gpio_rf_sw_0, 0);
hal_gpio_write(&gpio_rf_sw_1, 0);
} else {
furi_check(0);
}
}

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@ -99,6 +99,63 @@ extern "C" {
#define CC1101_PATABLE 0x3E /** PATABLE register number, an 8-byte table that defines the PA control settings */
#define CC1101_FIFO 0x3F /** FIFO register nunmber, can be combined with CC1101_WRITE and/or CC1101_BURST */
#define CC1101_IOCFG_INV (1<<6) /** IOCFG inversion */
typedef enum {
CC1101IocfgRxFifoThreshold=0x00,
CC1101IocfgRxFifoThresholdOrPacket=0x01,
CC1101IocfgTxFifoThreshold=0x02,
CC1101IocfgTxFifoFull=0x03,
CC1101IocfgRxOverflow=0x04,
CC1101IocfgTxUnderflow=0x05,
CC1101IocfgSyncWord=0x06,
CC1101IocfgPacket=0x07,
CC1101IocfgPreamble=0x08,
CC1101IocfgClearChannel=0x09,
CC1101IocfgLockDetector=0x0A,
CC1101IocfgSerialClock=0x0B,
CC1101IocfgSerialSynchronousDataOutput=0x0C,
CC1101IocfgSerialDataOutput=0x0D,
CC1101IocfgCarrierSense=0x0E,
CC1101IocfgCrcOk=0x0F,
/* Reserved range: 0x10 - 0x15 */
CC1101IocfgRxHardData1=0x16,
CC1101IocfgRxHardData0=0x17,
/* Reserved range: 0x18 - 0x1A */
CC1101IocfgPaPd=0x1B,
CC1101IocfgLnaPd=0x1C,
CC1101IocfgRxSymbolTick=0x1D,
/* Reserved range: 0x1E - 0x23 */
CC1101IocfgWorEvnt0=0x24,
CC1101IocfgWorEvnt1=0x25,
CC1101IocfgClk256=0x26,
CC1101IocfgClk32k=0x27,
/* Reserved: 0x28 */
CC1101IocfgChpRdyN=0x29,
/* Reserved: 0x2A */
CC1101IocfgXoscStable=0x2B,
/* Reserved range: 0x2C - 0x2D */
CC1101IocfgHighImpedance=0x2E,
CC1101IocfgHW=0x2F,
/* Only one CC1101IocfgClkXoscN can be selected as an output at any time */
CC1101IocfgClkXosc1=0x30,
CC1101IocfgClkXosc1_5=0x31,
CC1101IocfgClkXosc2=0x32,
CC1101IocfgClkXosc3=0x33,
CC1101IocfgClkXosc4=0x34,
CC1101IocfgClkXosc6=0x35,
CC1101IocfgClkXosc8=0x36,
CC1101IocfgClkXosc12=0x37,
CC1101IocfgClkXosc16=0x38,
CC1101IocfgClkXosc24=0x39,
CC1101IocfgClkXosc32=0x3A,
CC1101IocfgClkXosc48=0x3B,
CC1101IocfgClkXosc64=0x3C,
CC1101IocfgClkXosc96=0x3D,
CC1101IocfgClkXosc128=0x3E,
CC1101IocfgClkXosc192=0x3F,
} CC1101Iocfg;
typedef enum {
CC1101StateIDLE=0b000, /** IDLE state */
CC1101StateRX=0b001, /** Receive mode */