72713d6f4e
* Allow pins 0 and 1 as RTS/DTR for USB UART Bridge * add logic to gpio_scene_usb_uart_config, fix flow_pins * fixing count of pins * disable PC0,PC1 RTS/DTR when using LPUART * add logic to ensure flow pins dont overlap with uart lines Co-authored-by: あく <alleteam@gmail.com>
40 lines
947 B
C
40 lines
947 B
C
#pragma once
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#include "gpio_app.h"
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#include "gpio_item.h"
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#include "scenes/gpio_scene.h"
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#include "gpio_custom_event.h"
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#include "usb_uart_bridge.h"
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#include <gui/gui.h>
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#include <gui/view_dispatcher.h>
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#include <gui/scene_manager.h>
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#include <gui/modules/submenu.h>
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#include <notification/notification_messages.h>
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#include <gui/modules/variable_item_list.h>
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#include <gui/modules/widget.h>
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#include "views/gpio_test.h"
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#include "views/gpio_usb_uart.h"
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struct GpioApp {
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Gui* gui;
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NotificationApp* notifications;
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ViewDispatcher* view_dispatcher;
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SceneManager* scene_manager;
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Widget* widget;
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VariableItemList* var_item_list;
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VariableItem* var_item_flow;
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GpioTest* gpio_test;
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GpioUsbUart* gpio_usb_uart;
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UsbUartBridge* usb_uart_bridge;
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};
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typedef enum {
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GpioAppViewVarItemList,
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GpioAppViewGpioTest,
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GpioAppViewUsbUart,
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GpioAppViewUsbUartCfg,
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GpioAppViewUsbUartCloseRpc,
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} GpioAppView;
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